Syscon Thermal Config/structs: Difference between revisions
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u8 duty_min; | u8 duty_min; | ||
u8 duty_max; | u8 duty_max; | ||
u8 fanconpolicy; // | u8 fanconpolicy; // 00=Full, 01=Auto, 02=Manual | ||
u8 fantbl_select; // FF=RAM | u8 fantbl_select; // 00=EEPROM, FF=RAM | ||
u8 active; // FF=Active | u8 active; // 00=Inactive, FF=Active | ||
}; | }; | ||
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struct thermal_config { | struct thermal_config { | ||
#ifdef | #ifdef mullion_flash | ||
fan_table_40 cell; // fancon=0, tzone=0x00 "1st BE Primary" | fan_table_40 cell; // fancon=0, tzone=0x00 "1st BE Primary" | ||
fan_table_40 rsx; // fancon=1, tzone=0x01 "RSX Primary" | fan_table_40 rsx; // fancon=1, tzone=0x01 "RSX Primary" | ||
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special_section_cxrf; | special_section_cxrf; | ||
#endif | #endif | ||
#ifdef | #ifdef mullion_old | ||
fan_table_40 cell; // fancon=0, tzone=0x00 "1st BE Primary" | fan_table_40 cell; // fancon=0, tzone=0x00 "1st BE Primary" | ||
fan_table_40 rsx; // fancon=1, tzone=0x01 "RSX Primary" | fan_table_40 rsx; // fancon=1, tzone=0x01 "RSX Primary" | ||
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special_section_cxr; | special_section_cxr; | ||
#endif | #endif | ||
#ifdef | #ifdef mullion_new | ||
fan_table_80 cell; // fancon=0, tzone=0x00 "1st BE Primary" | fan_table_80 cell; // fancon=0, tzone=0x00 "1st BE Primary" | ||
fan_table_80 rsx; // fancon=1, tzone=0x01 "RSX Primary" | fan_table_80 rsx; // fancon=1, tzone=0x01 "RSX Primary" |
Revision as of 13:02, 14 January 2022
This page is only intended to show some code samples, feel free to improve them, please provide a proof if an important change is made, and use the related Discussion page/s for the dicussions and speculations
ps3_syscon_eeprom_thermal_config_region.c
// SYSCON | BOARDS | //--------------------------- // CXR713F120A | MPU-501, TMU-520, COOKIE-XX prototypes // CXR713120-201GB | COK-001 // CXR713120-202GB | COK-002 // CXR713120-203GB | SEM-001 // CXR714120-301GB | DIA-001 // CXR714120-302GB | DIA-002, DEB-001 // CXR714120-303GB | COK-002 (refurb 65nm RSX) // CXR714120-304GB | COK-001 (refurb 40nm RSX), DIA-001 (refurb 40nm RSX) // SW-301 | VER-001 // SW-302 | VER-001 // SW2-301 | DYN-001 // SW2-302 | SUR-001 // SW2-303 | JTP-001, JSD-001 // SW3-301 | KTE-001 // SW3-302 | MSX-001, MPX-001, NPX-001 // SW3-303 | ? // SW3-304 | PQX-001, PPX-001, RTX-001, REX-001 struct fan_table_common { u8 duty_min; u8 duty_max; u8 fanconpolicy; // 00=Full, 01=Auto, 02=Manual u8 fantbl_select; // 00=EEPROM, FF=RAM u8 active; // 00=Inactive, FF=Active }; struct fan_table_sw { u8 fantbl_duty; u16 fantbl_tempu; u16 fantbl_tempd; }; struct fan_table_40 { u8 fantbl_duty[0xA]; u16 fantbl_tempu[0xA]; u16 fantbl_tempd[0xA]; fan_table_common; u8 reserved[0x9]; }; // 0x40 struct fan_table_80 { u8 fantbl_duty[0x14]; u16 fantbl_tempu[0x14]; u16 fantbl_tempd[0x14]; fan_table_common; u8 reserved[0x17]; }; // 0x80 struct fan_table_70 { fan_table_sw[0x14]; fan_table_common; u8 reserved[0x7]; }; // 0x70 struct special_section_temps { u16 trp; // Thermal Protection ? (usually 1ºC lower than tshutdown) u16 tshutdown; // Thermal Shutdown (usually the same temperature than the highest value of TempU) u16 hyst; // Hysteresis (usually 2ºC) }; struct special_section_unk_1 { u8 unk_1_cell; // always 0xFF u8 unk_1_rsx; // always 0xFF u8 unk_1_bevr; // always 0xFF u8 unk_1_sb; // always 0xFF u8 unk_1_eegs; // always 0xFF }; struct special_section_unk_2 { u8 unk_2_cell; // directly or indirectly related with cell revision u8 unk_2_rsx; // directly or indirectly related with rsx revision u8 unk_2_bevr; // directly or indirectly related with bevr revision u8 unk_2_sb; // directly or indirectly related with sb revision u8 unk_2_eegs; // directly or indirectly related with eegs revision }; struct special_section_unk_3 { u8 unk_3_cell; // identical to unk_2_cell u8 unk_3_rsx; // identical to unk_2_rsx u8 unk_3_bevr; // always 0xFF, bevr fan table is not active u8 unk_3_sb; // identical to unk_2_sb u8 unk_3_eegs; // always 0xFF, eegs fan table is not active }; // struct special_section_cxrf { u8 use_eeprom_values; // (00 = yes) u8 reserved; special_section_temps cell; special_section_temps rsx; special_section_temps xdr; special_section_temps intake; special_section_temps gbe; special_section_temps sb; u8 reserved[0xA]; u16 tshutdown_time; // TShutdown Time:%d[s](0x%04x) u8 unknown_0; // related to thermal errors u8 fan_shutdown_time; u8 reserved [0xC]; u8 rsx_thermal_limit_unk0; u8 rsx_thermal_limit_unk1; u8 rsx_thermal_limit_unk2; u8 rsx_thermal_limit_unk3; u8 rsx_thermal_limit_unk4; u8 rsx_thermal_limit_unk5; u8 reserved [0xA]; u8 unknown_1; // fan config u8 unknown_2; // fan config u8 unknown_3; // fan config u8 reserved [0xD]; u8 unknown_4; // fan config (set to 0xE0) u16 unknown_5; // fan config u16 unknown_6; // fan config u16 unknown_7; // fan config u16 unknown_8; // fan config u16 unknown_9; // fan config u8 reserved [0x95]; }; // 0x100 struct special_section_cxr { u16 tshutdown_time; // TShutdown Time:%d[s](0x%04x) u8 unk_00; // Fan shutdown time ? u8 fan_initial_duty; // Fan initial duty: %d%%(0x%02x) u8 fan_initial_time; // Fan initial time: %d(ms) special_section_unk_1; special_section_unk_2; u8 unk_FF; special_section_temps cell; special_section_temps rsx; special_section_temps bevr; special_section_temps sb; special_section_temps eegs; special_section_unk_3; u8 reserved[0x4B]; u16 checksum; }; // 0x80 struct special_section_sw { u16 tshutdown_time; // TShutdown Time:%d[s](0x%04x) u16 unk_0000; // Fan shutdown time ?, length increased to 2 bytes for sherwoods ? u8 fan_initial_duty; // Fan initial duty: %d%%(0x%02x) u8 fan_initial_time; // Fan initial time: %d(ms) special_section_unk_1; special_section_unk_2; special_section_temps cell; special_section_temps rsx; special_section_temps sb; u8 reserved[0x8E]; }; // 0xB0 struct thermal_config { #ifdef mullion_flash fan_table_40 cell; // fancon=0, tzone=0x00 "1st BE Primary" fan_table_40 rsx; // fancon=1, tzone=0x01 "RSX Primary" fan_table_40 unk_z20; // fancon=2, tzone=0x20 unknown fan_table_40 unk_z21; // fancon=3, tzone=0x21 unknown fan_table_40 xdr; // fancon=4, tzone=0x02 "XDR Primary" fan_table_40 intake; // fancon=7, tzone=0x0A "Air Intake" fan_table_40 gbe; // fancon=6, tzone=0x0F "GbE" fan_table_40 sb; // fancon=5, tzone=0x14 "SB" special_section_cxrf; #endif #ifdef mullion_old fan_table_40 cell; // fancon=0, tzone=0x00 "1st BE Primary" fan_table_40 rsx; // fancon=1, tzone=0x01 "RSX Primary" fan_table_40 bevr; // fancon=?, tzone=0x03 "BE VR" fan_table_40 sb; // fancon=3, tzone=0x14 "SB" fan_table_40 eegs; // fancon=?, tzone=0x15 "EE+GS" fan_table_40 reserved special_section_cxr; #endif #ifdef mullion_new fan_table_80 cell; // fancon=0, tzone=0x00 "1st BE Primary" fan_table_80 rsx; // fancon=1, tzone=0x01 "RSX Primary" fan_table_80 sb; // fancon=2, tzone=0x14 "SB" special_section_cxr; #endif #ifdef sherwood fan_table_70 cell; // fancon=0, tzone=0x00 "1st BE Primary" fan_table_70 rsx; // fancon=1, tzone=0x01 "RSX Primary" fan_table_70 sb; // fancon=?, tzone=0x14 "SB" special_section_sw; #endif };