South Bridge: Difference between revisions

From PS3 Developer wiki
Jump to navigation Jump to search
 
(7 intermediate revisions by 2 users not shown)
Line 27: Line 27:
| [[DECR-1400]] || [[DEB-001]] || 1-879-845-xx || [[CXD2984AGB]] ||  ||  || non-retail
| [[DECR-1400]] || [[DEB-001]] || 1-879-845-xx || [[CXD2984AGB]] ||  ||  || non-retail
|-
|-
| [[CECH-20xx]] || [[DYN-00x|DYN-001]] || 1-880-055-xx || rowspan="7" | [[CXD9963GB]] ||  ||  ||  
| [[CECH-20xx]] || [[DYN-00x|DYN-001]] || 1-880-055-xx || rowspan="8" | [[CXD9963GB]] ||  ||  ||  
|-
|-
| [[CECH-21xx]] || [[SUR-00x|SUR-001]] || 1-881-945-xx ||  ||  ||  
| [[CECH-21xx]] || [[SUR-00x|SUR-001]] || 1-881-945-xx ||  ||  ||  
Line 40: Line 40:
|-
|-
| [[CECH-40xx]] || [[MPX-00x|MPX-001]] || 1-887-233-xx ||  ||  ||  
| [[CECH-40xx]] || [[MPX-00x|MPX-001]] || 1-887-233-xx ||  ||  ||  
|-
| [[CECH-43xx]] || [[REX-00x|REX-001]] ||  ||  ||  ||
|-
|-
|}
|}
===Alternative list===
*{{South Bridge pad layout 39x39}}
**CXD2973xxx Series
*{{South Bridge pad layout 31x31}}
**CXD2979xxx Series
*{{South Bridge pad layout 30x30}}
**CXD2984xxx Series
*{{South Bridge pad layout 22x22}}
**CXD9963xxx Series


= Revisions =
= Revisions =
Line 48: Line 60:
|-
|-
! Revision !! Bus ID !! Name !! [[System_Software|Lv0 support]] || [[Motherboard_Revisions|Used by]]
! Revision !! Bus ID !! Name !! [[System_Software|Lv0 support]] || [[Motherboard_Revisions|Used by]]
|-
|-{{cellcolors|lightgrey}}
|-{{cellcolors|lightgrey}}
| colspan="5" style="text-align:center" | SPIDER DX
| colspan="5" style="text-align:center" | STINGER (SPIDER prototype implemented using FPGA)
|-
| ? || ? || ? || ? || < [[CEB-1000]]
|-
| colspan="5" style="border-left:hidden; border-right:hidden" | &nbsp;
|-
! Revision !! Bus ID !! Name !! [[System_Software|Lv0 support]] || [[Motherboard_Revisions|Used by]]
|-{{cellcolors|lightgrey}}
| colspan="5" style="text-align:center" | SPIDER DX (CXD2973xxx Series 39x39 pads ?)
|-
|-
| 0x010 || 0x01000101 || DX 1.0 || 010.XXX+ || ? <!-- CEB-1000, CEB-1020, CEB-2000 -->
| 0x010 || 0x01000101 || DX 1.0 || 010.XXX+ || ? <!-- CEB-1000, CEB-1020, CEB-2000 -->
Line 63: Line 84:
| 0x032 || 0x01000303 || DX 3.2 || [[0.8.1.003.r010|081.003]]+ || [[TMU-520]]
| 0x032 || 0x01000303 || DX 3.2 || [[0.8.1.003.r010|081.003]]+ || [[TMU-520]]
|-{{cellcolors|lightgrey}}
|-{{cellcolors|lightgrey}}
| colspan="5" style="text-align:center" | SPIDER PX
| colspan="5" style="text-align:center" | SPIDER PX (CXD2979xxx Series 31x31 pads ?)
|-
|-
| 0x110 || 0x02000101 || PX 1.0 || [[0.8.1.003.r010|081.003]]+ || ?
| 0x110 || 0x02000101 || PX 1.0 || [[0.8.1.003.r010|081.003]]+ || [[COK-002]] ?
|-
|-
| 0x120 || 0x02000102 || PX 1.1 || [[0.8.4.001.r010|084.001]]+ || ?
| 0x120 || 0x02000102 || PX 1.1 || [[0.8.4.001.r010|084.001]]+ || [[COK-002]] ?
|-{{cellcolors|lightgrey}}
|-{{cellcolors|lightgrey}}
| colspan="5" style="text-align:center" | SPIDER SX
| colspan="5" style="text-align:center" | SPIDER SX (CXD2984xxx Series 30x30 pads ?)
|-
|-
| 0x210 || 0x03000101 || SX 1.0 || [[0.8.1.003.r010|081.003]]+ || ?
| 0x210 || 0x03000101 || SX 1.0 || [[0.8.1.003.r010|081.003]]+ || [[SEM-001]] ?
|-
|-
| 0x220 || 0x03000102 || SX 1.1 || [[0.8.4.001.r010|084.001]]+ || ?
| 0x220 || 0x03000102 || SX 1.1 || [[0.8.4.001.r010|084.001]]+ || [[DIA-001]] ?
|-
|-
| 0x230 || 0x03000103 || SX 1.2 || [[2.45 CEX|2.45]]+ || [[DIA-002|DIA-002 (refurbished)]], [[VER-001]]
| 0x230 || 0x03000103 || SX 1.2 || [[2.45 CEX|2.45]]+ || [[DIA-002|DIA-002 (refurbished)]], [[VER-001]]
|-{{cellcolors|lightgrey}}
|-{{cellcolors|lightgrey}}
| colspan="5" style="text-align:center" | SPIDER ZX
| colspan="5" style="text-align:center" | SPIDER ZX (CXD9963xxx Series 22x22 pads ?)
<!-- |-
<!-- |-
| 0x310 || 0x04000100 || ZX 1.0 seems to be wrong, the revision 0x310 is duplicated, and the busID seems to have a typo, all the other versions 1.0 ends in 0x....101-->
| 0x310 || 0x04000100 || ZX 1.0 seems to be wrong, the revision 0x310 is duplicated, and the busID seems to have a typo, all the other versions 1.0 ends in 0x....101-->
|-
|-
| 0x310 || 0x04000101 || ZX 1.0 || [[2.70 CEX|2.70]]+ || ?
| 0x310 || 0x04000101 || ZX 1.0 || [[2.70 CEX|2.70]]+ || [[DYN-001]] ?
|-
|-
| 0x320 || 0x04000102 || ZX 1.1 || [[2.70 CEX|2.70]]+ || [[DYN-001]]
| 0x320 || 0x04000102 || ZX 1.1 || [[2.70 CEX|2.70]]+ || [[DYN-001]]
|-
|-
| 0x330 || 0x04000103 || ZX 1.2 || [[3.20 CEX|3.20]]+ || ?
| 0x330 || 0x04000103 || ZX 1.2 || [[3.20 CEX|3.20]]+ || [[KTE-001]]
|-
|-{{cellcolors|lightgrey}}
| colspan="5" style="text-align:center" | STINGER
|-
| ? || ? || ? || ? || {{unk|Mambo}}
|-
|}
|}


Note:
Note:

Latest revision as of 07:16, 25 March 2023

Southbridge[edit | edit source]

Located between the CPU (CELL BE) and the lower I/O devices (SATA/PATA: Bluray Drive/Harddrive, USB, GbLAN, Wifi/Bluetooth, Flash (Hardware): Starship2+NAND / NOR, MultiCardReader etc) via a Flex I/O bus (CellBE : BIC / IOIF1).

Chipnumbers @ SKU's[edit | edit source]

PS3 Southbridge
CXD2973GB
with heatplate

PS3 Southbridge
CXD2979GB
without heatplate

PS3 Southbridge
CXD2984AGB

PS3 Southbridge
CXD9963GB
PS3 SouthBridge
PS3 Model Mobo Model Mobo serial SB Serial part no. Comp.ID Notes
CEB-2030
CEB-2040		 MPU-501 ? ? non-retail
DECR-1000 TMU-520 1-871-645-xx CXD2973AGB-4 IC4001 non-retail
CECHAxx
CECHBxx		 COK-001 1-871-868-xx CXD2973GB 8-753-257-50 IC3001
CECHCxx
CECHExx		 COK-002 1-873-513-xx CXD2979GB 8-753-273-22 IC3002
CECHGxx SEM-001 1-875-384-xx CXD2984GB IC3001
CECHHxx DIA-001 1-875-368-xx
CECHJxx
CECHKxx		 DIA-002 1-876-912-xx
CECHLxx
CECHMxx
CECHPxx
CECHQxx		 VER-001 1-878-196-xx CXD2984AGB
DECR-1400 DEB-001 1-879-845-xx CXD2984AGB non-retail
CECH-20xx DYN-001 1-880-055-xx CXD9963GB
CECH-21xx SUR-001 1-881-945-xx
CECH-25xx JTP-001 1-882-481-xx
CECH-25xx JSD-001 1-882-770-xx
CECH-30xx KTE-001 1-884-749-xx
CECH-40xx MSX-001 1-886-928-xx
CECH-40xx MPX-001 1-887-233-xx
CECH-43xx REX-001

Alternative list[edit | edit source]

Revisions[edit | edit source]

Revision Bus ID Name Lv0 support Used by
STINGER (SPIDER prototype implemented using FPGA)
? ? ? ? < CEB-1000
 
Revision Bus ID Name Lv0 support Used by
SPIDER DX (CXD2973xxx Series 39x39 pads ?)
0x010 0x01000101 DX 1.0 010.XXX+ ?
0x011 0x01000102 DX 1.1 010.XXX+ ?
0x020 0x01000201 DX 2.0 030.XXX+ MPU-501
0x030 0x01000301 DX 3.0 040.005+ ?
0x031 0x01000302 DX 3.1 040.005+ TMU-510, COK-001
0x032 0x01000303 DX 3.2 081.003+ TMU-520
SPIDER PX (CXD2979xxx Series 31x31 pads ?)
0x110 0x02000101 PX 1.0 081.003+ COK-002 ?
0x120 0x02000102 PX 1.1 084.001+ COK-002 ?
SPIDER SX (CXD2984xxx Series 30x30 pads ?)
0x210 0x03000101 SX 1.0 081.003+ SEM-001 ?
0x220 0x03000102 SX 1.1 084.001+ DIA-001 ?
0x230 0x03000103 SX 1.2 2.45+ DIA-002 (refurbished), VER-001
SPIDER ZX (CXD9963xxx Series 22x22 pads ?)
0x310 0x04000101 ZX 1.0 2.70+ DYN-001 ?
0x320 0x04000102 ZX 1.1 2.70+ DYN-001
0x330 0x04000103 ZX 1.2 3.20+ KTE-001


Note:

  • Bus ID can be fetched directly from 0x24000087000 or from LV1 repository node:
    • get node index (XX) with name busXX.type where value == 0x04 (SB bus)
    • get value from node with name busXX.id

Documentation[edit | edit source]


Syscon
CXR713F Series
CELL
90 nm
65 nm
45 nm
RSX
90 nm
65 nm
40 nm
28 nm
CELL RAM
(XDR)
Elpida
Qimonda
Samsung
RSX RAM
(GDDR3 or 5)
Elpida
Infineon & Qimonda
Samsung
Hynix
PS2
Compatibility
EEGS
RDRAM
Bridge
South Bridge
Starship2
Flash
NAND
Samsung
NOR
Macronix
Samsung
Spansion
eMMC
Samsung
Panasonic
BD SATA/PATA
BD Controllers
On BD board
Sony
Renesas SCEI
Integrated
Sony
Renesas SCEI
Others
IDT SCEI
Wireless
Connectors
Other
Diverse Comp.
Retrieved from "http://www.psdevwiki.com/ps3/index.php?title=South_Bridge&oldid=69778"