Syscon Thermal Config/structs: Difference between revisions

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This page is '''only''' intended to show some code samples, feel free to improve them, please provide a proof if an important change is made, and use the related {{talk}} page/s for the dicussions and speculations
#REDIRECT [[Syscon Thermal Configs/structs]]
 
{{Boxcode|title=ps3_syscon_eeprom_thermal_config_region.c|code=<syntaxhighlight lang="c">
//      SYSCON    | BOARDS |
//---------------------------
// CXR713F120A    | MPU-501, TMU-520, COOKIE-XX prototypes
// CXR713120-201GB | COK-001
// CXR713120-202GB | COK-002
// CXR713120-203GB | SEM-001
// CXR714120-301GB | DIA-001
// CXR714120-302GB | DIA-002, DEB-001
// CXR714120-303GB | COK-002 (refurb 65nm RSX)
// CXR714120-304GB | COK-001 (refurb 40nm RSX), DIA-001 (refurb 40nm RSX)
// SW-301          | VER-001
// SW-302          | VER-001
// SW2-301        | DYN-001
// SW2-302        | SUR-001
// SW2-303        | JTP-001, JSD-001
// SW3-301        | KTE-001
// SW3-302        | MSX-001, MPX-001, NPX-001
// SW3-303        | ?
// SW3-304        | PQX-001, PPX-001, RTX-001, REX-001
 
struct fancon_footer {
u8 duty_min;      // Always 0x33 (PS3 Fats and Slims DYN-001, SUR-001, JTP-001, JSD-001), or always 0x34 (PS3 Slim KTE-001 and SuperSlims)
u8 duty_max;      // Always 0xFF
u8 policy;        // 0x00=Full, 0x01=Auto, 0x02=Manual
u8 select;        // 0x00=EEPROM, 0xFF=RAM
u8 active;        // 0x00=Inactive, 0xFF=Active
};
 
struct fancon_40 {
u8  duty[0xA];
u16 tempu[0xA];
u16 tempd[0xA];
fancon_footer;
u8 reserved[0x9];
}; // 0x40
 
struct fancon_80 {
u8  duty[0x14];
u16 tempu[0x14];
u16 tempd[0x14];
fancon_footer;
u8 reserved[0x17];
}; // 0x80
 
struct fancon_sw {
u8  duty;
u16 tempu;
u16 tempd;
};
 
struct fancon_70 {
fancon_sw[0x14];
fancon_footer;
u8 reserved[0x7];
}; // 0x70
 
 
struct config_footer_temps  {
u16 trp;      // Thermal Protection ? (usually 1ºC lower than tshutdown)
u16 tshutdown; // Thermal Shutdown (usually the same temperature than the highest value of TempU)
u16 hyst;      // Hysteresis (usually 2ºC)
};
 
struct config_footer_unk_1  {
u8 unk_1_cell; // always 0xFF
u8 unk_1_rsx;  // always 0xFF
u8 unk_1_bevr; // always 0xFF
u8 unk_1_sb;  // always 0xFF
u8 unk_1_eegs; // always 0xFF
};
 
struct config_footer_unk_2  {
u8 unk_2_cell; // directly or indirectly related with cell revision
u8 unk_2_rsx;  // directly or indirectly related with rsx revision
u8 unk_2_bevr; // directly or indirectly related with bevr revision
u8 unk_2_sb;  // directly or indirectly related with sb revision
u8 unk_2_eegs; // directly or indirectly related with eegs revision
};
 
struct config_footer_unk_3  {
u8 unk_3_cell; // identical to unk_2_cell (only mullion, sherwood doesnt seems to use this area)
u8 unk_3_rsx;  // identical to unk_2_rsx (only mullion, sherwood doesnt seems to use this area)
u8 unk_3_bevr; // always 0xFF, bevr fan table is not active (only mullion, sherwood doesnt seems to use this area)
u8 unk_3_sb;  // identical to unk_2_sb (only mullion, sherwood doesnt seems to use this area)
u8 unk_3_eegs; // always 0xFF, eegs fan table is not active (only mullion, sherwood doesnt seems to use this area)
}; //
 
 
struct config_footer_cxrf {
u8  use_eeprom_values; // (00 = yes)
u8  reserved;
config_footer_temps cell;
config_footer_temps rsx;
config_footer_temps xdr;
config_footer_temps intake;
config_footer_temps gbe;
config_footer_temps sb;
u8  reserved[0xA];
u16 tshutdown_time; // TShutdown Time:%d[s](0x%04x)
u8  unknown_0; // related to thermal errors
u8  fan_shutdown_time;
u8  reserved [0xC];
u8  rsx_thermal_limit_unk0;
u8  rsx_thermal_limit_unk1;
u8  rsx_thermal_limit_unk2;
u8  rsx_thermal_limit_unk3;
u8  rsx_thermal_limit_unk4;
u8  rsx_thermal_limit_unk5;
u8  reserved [0xA];
u8  unknown_1; // fan config
u8  unknown_2; // fan config
u8  unknown_3; // fan config
u8  reserved [0xD];
u8  unknown_4; // fan config (set to 0xE0)
u16 unknown_5; // fan config
u16 unknown_6; // fan config
u16 unknown_7; // fan config
u16 unknown_8; // fan config
u16 unknown_9; // fan config
u8  reserved [0x95];
}; // 0x100
 
struct config_footer_cxr {
u16 tshutdown_time;        // TShutdown Time:%d[s](0x%04x). Always 0xFF
u8  unk_00;                // Fan shutdown time ?
u8  fan_initial_duty;      // Fan initial duty: %d%%(0x%02x). Always 0x4D (PS3 Fats with mullion)
u8  fan_initial_time;      // Fan initial time: %d(ms). Always 0x14
config_footer_unk_1;
config_footer_unk_2;
u8  unk_FF;
config_footer_temps cell;
config_footer_temps rsx;
config_footer_temps bevr;
config_footer_temps sb;
config_footer_temps eegs;
config_footer_unk_3;
u8  reserved[0x4B];
u16 checksum;
}; // 0x80
 
struct config_footer_sw {
u16 tshutdown_time;        // TShutdown Time:%d[s](0x%04x). Always 0xFF
u16 unk_0000;              // Fan shutdown time ?, length increased to 2 bytes for sherwoods ?
u8  fan_initial_duty;      // Fan initial duty: %d%%(0x%02x). 0x4D (PS3 Fat VER-001 and Slim DYN-001), or 0x40 (Slims SUR-001, JTP-001, JSD-001), or 0x41 (Slim KTE-001 and SuperSlims)
u8  fan_initial_time;      // Fan initial time: %d(ms). Always 0x14
config_footer_unk_1;
config_footer_unk_2;
config_footer_temps cell;
config_footer_temps rsx;
config_footer_temps sb;
u8  reserved[0x8E];
}; // 0xB0
 
 
struct thermal_config {
#ifdef mullion_flash
fancon_40 cell;      // FanconNo=0, TZoneNo=0x00 "1st BE Primary"
fancon_40 rsx;        // FanconNo=1, TZoneNo=0x01 "RSX Primary"
fancon_40 unk_z20;    // FanconNo=2, TZoneNo=0x20 unknown
fancon_40 unk_z21;    // FanconNo=3, TZoneNo=0x21 unknown
fancon_40 xdr;        // FanconNo=4, TZoneNo=0x02 "XDR Primary"
fancon_40 intake;    // FanconNo=7, TZoneNo=0x0A "Air Intake"
fancon_40 gbe;        // FanconNo=6, TZoneNo=0x0F "GbE"
fancon_40 sb;        // FanconNo=5, TZoneNo=0x14 "SB"
config_footer_cxrf;
#endif
#ifdef mullion_old
fancon_40 cell;      // FanconNo=0, TZoneNo=0x00 "1st BE Primary"
fancon_40 rsx;        // FanconNo=1, TZoneNo=0x01 "RSX Primary"
fancon_40 bevr;      // FanconNo=?, TZoneNo=0x03 "BE VR"
fancon_40 sb;        // FanconNo=3, TZoneNo=0x14 "SB"
fancon_40 eegs;      // FanconNo=?, TZoneNo=0x15 "EE+GS"
fancon_40 reserved
config_footer_cxr;
#endif
#ifdef mullion_new
fancon_80 cell;      // FanconNo=0, TZoneNo=0x00 "1st BE Primary"
fancon_80 rsx;        // FanconNo=1, TZoneNo=0x01 "RSX Primary"
fancon_80 sb;        // FanconNo=2, TZoneNo=0x14 "SB"
config_footer_cxr;
#endif
#ifdef sherwood
fancon_70 cell;      // FanconNo=0, TZoneNo=0x00 "1st BE Primary"
fancon_70 rsx;        // FanconNo=1, TZoneNo=0x01 "RSX Primary"
fancon_70 sb;        // FanconNo=?, TZoneNo=0x14 "SB"
config_footer_sw;
#endif
};
</syntaxhighlight>}}
 
{{Reverse engineering}}<noinclude>[[Category:Main]]</noinclude>

Latest revision as of 15:27, 22 January 2022

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