User talk:Strike Venom: Difference between revisions
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NSC Boot Loader Version 0.2.1 (2006/04/07) <built 23:02:51, 04/07/06 JST> | NSC Boot Loader Version 0.2.1 (2006/04/07) <built 23:02:51, 04/07/06 JST> | ||
= If possible try this in the CEB-2030 = | |||
<pre> | |||
How to dump the complete CXR Syscon flash: | |||
*0x3800000 = 0x05; | |||
*0x1005554 = 0x55; | |||
*0x100AAAA = 0xA0; | |||
Read 0x1000000-0x107FFFF: | |||
0x1000000-0x101FFFF Backup Bank | |||
0x1020000-0x107FFFF Main Bank | |||
</pre> | |||
source : | |||
* https://twitter.com/MinaRalwasser/status/1204043262618681344 | |||
To fix the heartbeat on a CEB with SYSCON flashed from a DECR, send the command | |||
<pre> | |||
cp ready | |||
</pre> | |||
Via UART | |||
credit to MinaRalwasser for the findings | |||
Latest revision as of 15:39, 27 June 2021
You wouldn't happen to have that 0.90 PROTO firmware on you would you?
Foo
- +1 =)
Keperfear
- I do have more Prototype FW's, but the people who gave them to me disagree with releasing them.
Media Markt (in Hamburg) ? ;) - MediaMarkt in .de yup, Hamburg nop ^^
Mysis 08:13, 30 December 2012 (CET)
You happen to have a CEB2010-2060? :)
- About a year and a half ago I had access to a CEB-2040, but this lastet only half a year. :(
Strike Venom
- What about updater for CEB2000? :)
Zecoxao
- You seem to know a lot about SYSCON's architecture. do you know what crypto algorithm is used in the SC patches/updates?
Zecoxao
- You seem to know a lot about SYSCON's architecture. do you know what crypto algorithm is used in the SC patches/updates?
Whooo[edit source]
1.00 DECR BOOTROM
Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 0032A8A0 53 79 73 74 65 6D 20 44 65 62 75 67 67 65 72 20 System Debugger 0032A8B0 69 73 20 65 6E 61 62 6C 65 64 2E is enabled......
Full thing:
lv2(2): System Debugger is enabled. lv2(2): REG 00 INTST : 0x00000000 lv2(2): REG 04 INTEN : 0x00000000 lv2(2): REG 08 COMM0 : 0x00000000 lv2(2): REG 0c COMM1 : 0x00000000 lv2(2): lv2(2): DESC 00 TX_ST : 0x00000000 lv2(2): DESC 04 TX_SRC : 0xffffffff lv2(2): DESC 08 TX_DST : 0xc0010000 lv2(2): DESC 0c TX_LEN : 0xffffffff lv2(2): DESC 10 RX_ST : 0x00000000 lv2(2): DESC 14 RX_SRC : 0xc0000000 lv2(2): DESC 18 RX_DST : 0xffffffff lv2(2): DESC 1c RX_LEN : 0x00000000 lv2(2): DESC 20 LP_STA : 0x00000002 lv2(2): lv2(2): ----------------------------------------------------------------------- lv2(2): Dump mem 0x8000000030080000 - 64 bytes lv2(2): 0000 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 lv2(2): 0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 lv2(2): 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 lv2(2): 0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 lv2(2): -----------------------------------------------------------------------
2.43 CEX JIG
Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 0030B860 54 68 65 20 73 79 73 74 65 6D 20 64 65 62 75 67 The system debug 0030B870 67 65 72 20 69 73 20 65 6E 61 62 6C 65 64 2E 20 ger is enabled. 0030B880 20 54 68 65 20 73 79 73 74 65 6D 20 64 65 62 75 The system debu 0030B890 67 67 65 72 20 69 73 20 61 62 6C 65 20 74 6F 20 gger is able to 0030B8A0 63 6F 6E 6E 65 63 74 20 74 6F 20 61 6E 64 20 64 connect to and d 0030B8B0 65 62 75 67 20 74 68 65 20 74 61 72 67 65 74 2C ebug the target, 0030B8C0 20 6E 6F 77 now
NSC Boot Loader Version 0.2.1 (2006/04/07) <built 23:02:51, 04/07/06 JST>
If possible try this in the CEB-2030[edit source]
How to dump the complete CXR Syscon flash: *0x3800000 = 0x05; *0x1005554 = 0x55; *0x100AAAA = 0xA0; Read 0x1000000-0x107FFFF: 0x1000000-0x101FFFF Backup Bank 0x1020000-0x107FFFF Main Bank
source :
To fix the heartbeat on a CEB with SYSCON flashed from a DECR, send the command
cp ready
Via UART
credit to MinaRalwasser for the findings