PCI: Difference between revisions
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* no support for optional JTAG signals, nor for the 64-bit PCI extension defined in the PCI Local Bus Specification | * no support for optional JTAG signals, nor for the 64-bit PCI extension defined in the PCI Local Bus Specification | ||
=== | === [[South Bridge]] serial === | ||
{| class="wikitable sortable" | {| class="wikitable sortable" | ||
|- | |- | ||
! | ! Pad !! Name !! Usage !! Remark | ||
|- | |- | ||
| | | JL9385 || +3.3V_SB_VDDIO || VCC || | ||
|- | |- | ||
| | | JL9386 || GND || Ground || | ||
|- | |- | ||
| | | JL9387 || SB_SIO0-RXD || Receive || | ||
|- | |- | ||
| | | JL9388 || SB_SIO0-TXT || Tranceive || | ||
|- | |- | ||
|} | |} |
Revision as of 17:52, 12 February 2013
PCI
Bus, resembling Conventional PCI 2.3, directly connected to South Bridge, with 80 exposed pads
Major differences from PCI standard:
- smaller formfactor (80 pin, instead of miniPCI 100P-type I/II or MiniPCI 124P-Type III)
- no use of miniPCI standard sideband signals for audio and communications
- no support of the miniPCI standard CLKRUN# signal defined in the PCI Mobile Design Guide
- no support for optional JTAG signals, nor for the 64-bit PCI extension defined in the PCI Local Bus Specification
South Bridge serial
Pad | Name | Usage | Remark |
---|---|---|---|
JL9385 | +3.3V_SB_VDDIO | VCC | |
JL9386 | GND | Ground | |
JL9387 | SB_SIO0-RXD | Receive | |
JL9388 | SB_SIO0-TXT | Tranceive |