Editing User talk:Kozarovv

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Line 396: Line 396:
0x73E818 ppc_emitter_clrlwi_0
0x73E818 ppc_emitter_clrlwi_0
0x73E830 ppc_emitter_clrlwi_0_
0x73E830 ppc_emitter_clrlwi_0_
</pre>
===ps2_gxemu ppu emitter by opd (4.75?)===
<pre>
0x6557D0  ppu_emitter_xoris
0x6557E8  ppu_emitter_srwi
0x655800  ppu_emitter_slwi
0x655818  sub_101FBC
0x655830  ppu_emitter_extrwi_unconfirmed_____todo
0x655848  ppu_emitter_sldi
0x655860  ppu_emitter_extldi
0x655878  ppu_emitter_subf_____todo (used only in visub)
0x655890  ppu_emitter_srdi
0x6558A8  ppu_emitter_li
0x6558C0  ppu_emitter_add
0x6558D8  ppu_emitter_addc
0x6558F0  ppu_emitter_addco
0x655908  ppu_emitter_adde
0x655920  ppu_emitter_adde_____todo
0x655938  ppu_emitter_addi
0x655950  ppu_emitter_addic
0x655968  ppu_emitter_lis
0x655980  ppu_emitter_addme
0x655998  ppu_emitter_addmeo
0x6559B0  ppu_emitter_addo
0x6559C8  ppu_emitter_addze
0x6559E0  ppu_emitter_addzeo
0x6559F8  ppu_emitter_and
0x655A10  ppu_emitter_andc
0x655A28  ppu_emitter_andi.
0x655A40  ppu_emitter_andis.
0x655A58  ppu_emitter_b
0x655A70  ppu_emitter_ba
0x655A88  ppu_emitter_bdnzf
0x655AA0  ppu_emitter_bdnzfa
0x655AB8  ppu_emitter_bcctr
0x655AD0  ppu_emitter_bcctrl
0x655AE8  ppu_emitter_bdnzfl
0x655B00  ppu_emitter_bdnzfla
0x655B18  ppu_emitter_bdnzflr
0x655B30  ppu_emitter_bdnzflrl
0x655B48  ppu_emitter_bctr
0x655B60  ppu_emitter_bctrl
0x655B78  ppu_emitter_beq
0x655B90  ppu_emitter_beql
0x655BA8  ppu_emitter_bgt
0x655BC0  ppu_emitter_bgtl
0x655BD8  ppu_emitter_bl
0x655BF0  ppu_emitter_bla
0x655C08  ppu_emitter_blr
0x655C20  ppu_emitter_blt
0x655C38  ppu_emitter_bltl
0x655C50  ppu_emitter_bne
0x655C68  ppu_emitter_bnel
0x655C80  ppu_emitter_unk_used_in_r5900_break
0x655C98  ppu_emitter_clrldi
0x655CB0  ppu_emitter_clrldi.
0x655CC8  ppu_emitter_cmpd
0x655CE0  ppu_emitter_cmpdi
0x655CF8  ppu_emitter_cmpld
0x655D10  ppu_emitter_cmpldi
0x655D28  ppu_emitter_cmplw
0x655D40  ppu_emitter_cmplwi
0x655D58  ppu_emitter_cmpw
0x655D70  ppu_emitter_cmpwi
0x655D88  ppu_emitter_cntlzd
0x655DA0  ppu_emitter_cntlzw
0x655DB8  ppu_emitter_crand
0x655DD0  ppu_emitter_crandc
0x655DE8  ppu_emitter_crset
0x655E00  ppu_emitter_crnand
0x655E18  ppu_emitter_crnot
0x655E30  ppu_emitter_crmove
0x655E48  ppu_emitter_crorc
0x655E60  ppu_emitter_crclr
0x655E78  ppu_emitter_divd
0x655E90  ppu_emitter_divdo
0x655EA8  ppu_emitter_divdu
0x655EC0  ppu_emitter_divduo
0x655ED8  ppu_emitter_divw
0x655EF0  ppu_emitter_divwo
0x655F08  ppu_emitter_divwu
0x655F20  ppu_emitter_divwuo
0x655F38  ppu_emitter_mbar
0x655F50  ppu_emitter_eqv
0x655F68  ppu_emitter_extsb
0x655F80  ppu_emitter_extsh
0x655F98  ppu_emitter_extsw
0x655FB0  ppu_emitter_fabs
0x655FC8  ppu_emitter_fadd
0x655FE0  ppu_emitter_fadds
0x655FF8  ppu_emitter_fcfid
0x656010  ppu_emitter_fcmpo
0x656028  ppu_emitter_fcmpu
0x656040  ppu_emitter_fctid
0x656058  ppu_emitter_fctidz
0x656070  ppu_emitter_fctiw
0x656088  ppu_emitter_fctiwz
0x6560A0  ppu_emitter_fdiv
0x6560B8  ppu_emitter_fdivs
0x6560D0  ppu_emitter_fmadd
0x6560E8  ppu_emitter_fmadds
0x656100  ppu_emitter_fmr
0x656118  ppu_emitter_fmsub
0x656130  ppu_emitter_fmsubs
0x656148  ppu_emitter_fmul
0x656160  ppu_emitter_fmuls
0x656178  ppu_emitter_fnabs
0x656190  ppu_emitter_fneg
0x6561A8  ppu_emitter_fnmadd
0x6561C0  ppu_emitter_fnmadds
0x6561D8  ppu_emitter_fsub_with_4_regs
0x6561F0  ppu_emitter_fnmsubs
0x656208  ppu_emitter_fres
0x656220  ppu_emitter_frsp
0x656238  ppu_emitter_frsqrte
0x656250  ppu_emitter_fsel
0x656268  ppu_emitter_fsqrt
0x656280  ppu_emitter_fsqrts
0x656298  ppu_emitter_fsub
0x6562B0  ppu_emitter_fsubs
0x6562C8  ppu_emitter_isync
0x6562E0  ppu_emitter_lb
0x6562F8  ppu_emitter_lbzu
0x656310  ppu_emitter_lbzx
0x656328  ppu_emitter_ld
0x656340  ppu_emitter_ldbrx
0x656358  ppu_emitter_ldx
0x656370  ppu_emitter_lfd
0x656388  ppu_emitter_lfdx
0x6563A0  ppu_emitter_lfs
0x6563B8  ppu_emitter_lfsx
0x6563D0  ppu_emitter_lhbrx
0x6563E8  ppu_emitter_lhz
0x656400  ppu_emitter_lhzu
0x656418  ppu_emitter_lhzx
0x656430  ppu_emitter_lvebx
0x656448  ppu_emitter_lvehx
0x656460  ppu_emitter_lvewx
0x656478  ppu_emitter_lvlx
0x656490  ppu_emitter_lvsl
0x6564A8  ppu_emitter_lvsr
0x6564C0  ppu_emitter_lvx
0x6564D8  ppu_emitter_lvxl
0x6564F0  ppu_emitter_lwbrx
0x656508  ppu_emitter_lwsync
0x656520  ppu_emitter_lwz
0x656538  ppu_emitter_lwzu
0x656550  ppu_emitter_lwzx
0x656568  ppu_emitter_mfcr
0x656580  ppu_emitter_mfctr
0x656598  ppu_emitter_mflr
0x6565B0  ppu_emitter_mfocrf
0x6565C8  ppu_emitter_mftb
0x6565E0  ppu_emitter_mfvscr
0x6565F8  ppu_emitter_mtcrf
0x656610  ppu_emitter_mtctr
0x656628  ppu_emitter_mtlr
0x656640  ppu_emitter_mtocrf
0x656658  ppu_emitter_mtvscr
0x656670  ppu_emitter_mullhd
0x656688  ppu_emitter_mullhdu
0x6566A0  ppu_emitter_mullhw
0x6566B8  ppu_emitter_mullhwu
0x6566D0  ppu_emitter_mulld
0x6566E8  ppu_emitter_mulldo
0x656700  ppu_emitter_mulli
0x656718  ppu_emitter_mullw
0x656730  ppu_emitter_mullwo
0x656748  ppu_emitter_nand
0x656760  ppu_emitter_neg
0x656778  ppu_emitter_neg__________todo
0x656790  ppu_emitter_nor
0x6567A8  ppu_emitter_or
0x6567C0  ppu_emitter_orc
0x6567D8  ppu_emitter_ori
0x6567F0  ppu_emitter_oris
0x656808  ppu_emitter_ptesync
0x656820  ppu_emitter_rldcl
0x656838  ppu_emitter_rldcr
0x656850  ppu_emitter_rldir
0x656868  ppu_emitter_rldicl
0x656880  ppu_emitter_rldicl___________todo
0x656898  ppu_emitter_rldicr
0x6568B0  ppu_emitter_rldimi
0x6568C8  ppu_emitter_rlwimi
0x6568E0  ppu_emitter_rlwinm
0x6568F8  ppu_emitter_rlwnm
0x656910  ppu_emitter_rotld
0x656928  ppu_emitter_rlwnm_mb31
0x656940  ppu_emitter_sld
0x656958  ppu_emitter_slw
0x656970  ppu_emitter_srad
0x656988  ppu_emitter_sradi
0x6569A0  ppu_emitter_sraw
0x6569B8  ppu_emitter_srawi
0x6569D0  ppu_emitter_srd
0x6569E8  ppu_emitter_srw
0x656A00  ppu_emitter_stb
0x656A18  ppu_emitter_stbu
0x656A30  ppu_emitter_stbx
0x656A48  ppu_emitter_std
0x656A60  ppu_emitter_stdbrx
0x656A78  ppu_emitter_stdx
0x656A90  ppu_emitter_stfd
0x656AA8  ppu_emitter_stfdx
0x656AC0  ppu_emitter_stfiwx
0x656AD8  ppu_emitter_stfs
0x656AF0  ppu_emitter_stfsux
0x656B08  ppu_emitter_stfsx
0x656B20  ppu_emitter_sth
0x656B38  ppu_emitter_sthbrx
0x656B50  ppu_emitter_sthu
0x656B68  ppu_emitter_sthx
0x656B80  ppu_emitter_stvebx
0x656B98  ppu_emitter_stvehx
0x656BB0  ppu_emitter_stvewx
0x656BC8  ppu_emitter_stvx
0x656BE0  ppu_emitter_stvxl
0x656BF8  ppu_emitter_stw
0x656C10  ppu_emitter_stwbrx
0x656C28  ppu_emitter_stwu
0x656C40  ppu_emitter_stwx
0x656C58  ppu_emitter_subf
0x656C70  ppu_emitter_subfc
0x656C88  ppu_emitter_subfco
0x656CA0  ppu_emitter_subfco.
0x656CB8  ppu_emitter_subfe
0x656CD0  ppu_emitter_subfe________todo
0x656CE8  ppu_emitter_subfic
0x656D00  ppu_emitter_subfme
0x656D18  ppu_emitter_subfmeo
0x656D30  ppu_emitter_subfo
0x656D48  ppu_emitter_subfze
0x656D60  ppu_emitter_subfzeo
0x656D78  ppu_emitter_sync
0x656D90  ppu_emitter_td
0x656DA8  ppu_emitter_tdi
0x656DC0  ppu_emitter_tw
0x656DD8  ppu_emitter_twi
0x656DF0  ppu_emitter_vaddfp
0x656E08  ppu_emitter_vaddsbs
0x656E20  ppu_emitter_vaddshs
0x656E38  ppu_emitter_vaddsws
0x656E50  ppu_emitter_vaddubm
0x656E68  ppu_emitter_vaddubs
0x656E80  ppu_emitter_vaddcuw
0x656E98  ppu_emitter_vadduhm
0x656EB0  ppu_emitter_vadduhs
0x656EC8  ppu_emitter_vadduwm
0x656EE0  ppu_emitter_vadduws
0x656EF8  ppu_emitter_vand
0x656F10  ppu_emitter_vandc
0x656F28  ppu_emitter_vavgsb
0x656F40  ppu_emitter_vavgsh
0x656F58  ppu_emitter_vavgsw
0x656F70  ppu_emitter_vavgub
0x656F88  ppu_emitter_vavguh
0x656FA0  ppu_emitter_vavguw
0x656FB8  ppu_emitter_vcfsx
0x656FD0  ppu_emitter_vcfux
0x656FE8  ppu_emitter_vcmpbfp
0x657000  ppu_emitter_vcmpbfp.
0x657018  ppu_emitter_vcmpeqfp
0x657030  ppu_emitter_vcmpeqfp.
0x657048  ppu_emitter_vcmpequb
0x657060  ppu_emitter_vcmpequb.
0x657078  ppu_emitter_vcmpequh
0x657090  ppu_emitter_vcmpequh.
0x6570A8  ppu_emitter_vcmpequw
0x6570C0  ppu_emitter_vcmpequw.
0x6570D8  ppu_emitter_vcmpgefp
0x6570F0  ppu_emitter_vcmpgefp.
0x657108  ppu_emitter_vcmpgtfp
0x657120  ppu_emitter_vcmpgtfp.
0x657138  ppu_emitter_vcmpgtsb
0x657150  ppu_emitter_vcmpgtsb.
0x657168  ppu_emitter_vcmpgtsh
0x657180  ppu_emitter_vcmpgtsh.
0x657198  ppu_emitter_vcmpgtsw
0x6571B0  ppu_emitter_vcmpgtsw.
0x6571C8  ppu_emitter_vcmpgtub
0x6571E0  ppu_emitter_vcmpgtub.
0x6571F8  ppu_emitter_vcmpgtuh
0x657210  ppu_emitter_vcmpgtuh.
0x657228  ppu_emitter_vcmpgtuw
0x657240  ppu_emitter_vcmpgtuw.
0x657258  ppu_emitter_vctsxs
0x657270  ppu_emitter_vctuxs
0x657288  ppu_emitter_vexptefp
0x6572A0  ppu_emitter_vlogefp
0x6572B8  ppu_emitter_vmaddfp
0x6572D0  ppu_emitter_vmaxfp
0x6572E8  ppu_emitter_vmaxsb
0x657300  ppu_emitter_vmaxsh
0x657318  ppu_emitter_vmaxsw
0x657330  ppu_emitter_vmaxub
0x657348  ppu_emitter_vmaxuh
0x657360  ppu_emitter_vmaxuw
0x657378  ppu_emitter_vmhaddshs
0x657390  ppu_emitter_vmhraddshs
0x6573A8  ppu_emitter_vminfp
0x6573C0  ppu_emitter_vminsb
0x6573D8  ppu_emitter_vminsh
0x6573F0  ppu_emitter_vminsw
0x657408  ppu_emitter_vminub
0x657420  ppu_emitter_vminuh
0x657438  ppu_emitter_vminuw
0x657450  ppu_emitter_vmladduhm
0x657468  ppu_emitter_vmrghb
0x657480  ppu_emitter_vmrghh
0x657498  ppu_emitter_vmrghw
0x6574B0  ppu_emitter_vmrglb
0x6574C8  ppu_emitter_vmrglh
0x6574E0  ppu_emitter_vmrglw
0x6574F8  ppu_emitter_vmsummbm
0x657510  ppu_emitter_vmsumuhs
0x657528  ppu_emitter_vmsumshm
0x657540  ppu_emitter_vmsumshs
0x657558  ppu_emitter_vmsumubm
0x657570  ppu_emitter_vmsumuhm
0x657588  ppu_emitter_vmulesb
0x6575A0  ppu_emitter_vmulesh
0x6575B8  ppu_emitter_vmuleub
0x6575D0  ppu_emitter_vmuleuh
0x6575E8  ppu_emitter_vmulouw
0x657600  ppu_emitter_vmulosh
0x657618  ppu_emitter_vmuloub
0x657630  ppu_emitter_vmulouh
0x657648  ppu_emitter_vnmsubfp
0x657660  ppu_emitter_vnot
0x657678  ppu_emitter_vmr_vor
0x657690  ppu_emitter_vperm
0x6576A8  ppu_emitter_vpkpx
0x6576C0  ppu_emitter_vpkshss
0x6576D8  ppu_emitter_vpkshus
0x6576F0  ppu_emitter_vpkswss
0x657708  ppu_emitter_vpkswus
0x657720  ppu_emitter_vpkuhum
0x657738  ppu_emitter_vpkuhus
0x657750  ppu_emitter_vpkuwum
0x657768  ppu_emitter_vpkuwus
0x657780  ppu_emitter_vrefp
0x657798  ppu_emitter_vlogefp_
0x6577B0  ppu_emitter_vlogefp__
0x6577C8  ppu_emitter_vlogefp___
0x6577E0  ppu_emitter_vlogefp____
0x6577F8  ppu_emitter_vrlb
0x657810  ppu_emitter_vrlh
0x657828  ppu_emitter_vrlw
0x657840  ppu_emitter_vrsqrtefp
0x657858  ppu_emitter_vsel
0x657870  ppu_emitter_vsl
0x657888  ppu_emitter_vslb
0x6578A0  ppu_emitter_vsldoi
0x6578B8  ppu_emitter_vslh
0x6578D0  ppu_emitter_vslo
0x6578E8  ppu_emitter_vslw
0x657900  ppu_emitter_vspltb
0x657918  ppu_emitter_vsplth
0x657930  ppu_emitter_vspltisb
0x657948  ppu_emitter_vspltish
0x657960  ppu_emitter_vspltisw
0x657978  ppu_emitter_vspltw
0x657990  ppu_emitter_vsr
0x6579A8  ppu_emitter_vsrab
0x6579C0  ppu_emitter_vsrah
0x6579D8  ppu_emitter_vsraw
0x6579F0  ppu_emitter_vsrb
0x657A08  ppu_emitter_vsrh
0x657A20  ppu_emitter_vsro
0x657A38  ppu_emitter_vsrw
0x657A50  ppu_emitter_vsubcuw
0x657A68  ppu_emitter_vsubfp
0x657A80  ppu_emitter_vsubsbs
0x657A98  ppu_emitter_vsubshs
0x657AB0  ppu_emitter_vsubsws
0x657AC8  ppu_emitter_vsububm
0x657AE0  ppu_emitter_vsububs
0x657AF8  ppu_emitter_vsubuhm
0x657B10  ppu_emitter_vsubuhs
0x657B28  ppu_emitter_vsubuwm
0x657B40  ppu_emitter_vsubuws
0x657B58  ppu_emitter_vsum2sws
0x657B70  ppu_emitter_vsum4sbs
0x657B88  ppu_emitter_vsum4shs
0x657BA0  ppu_emitter_vsum4ubs
0x657BB8  ppu_emitter_vsumsws
0x657BD0  ppu_emitter_vupkhpx
0x657BE8  ppu_emitter_vupkhsb
0x657C00  ppu_emitter_vupkhsh
0x657C18  ppu_emitter_vupklpx
0x657C30  ppu_emitter_vupklsb
0x657C48  ppu_emitter_vupklsh
0x657C60  ppu_emitter_vxor
0x657C78  ppu_emitter_watchpoint
0x657C90  ppu_emitter_xor
0x657CA8  ppu_emitter_xori
</pre>
</pre>


Line 827: Line 429:
0x737048 sub_1469AC
0x737048 sub_1469AC
0x737060 VU_REC_xgkick_146A6C
0x737060 VU_REC_xgkick_146A6C
</pre>
===ps2_gxemu vu1-to-spu emitter===
I need to clean this up little bit before posting on ps2 emu page. This is opd list of recompiler functions that are responsible for emitting vu1 to spu translated opcodes (so called VRC). #ToDo sub_xxx are unknown, or unused (so i was too lazy to look at them).
<pre>
0x6583F8  spu_emitter_stop_0x1234
0x658410  sub_146084
0x658428  spu_emitter_brasl_0x8B00_xgkick
0x658440  spu_emitter_ai_r57_r57_0x10
0x658458  spu_emitter_rt_rb_ra_rc
0x658470  spu_emitter_rb_ra_rt
0x658488  sub_146568
0x6584A0  sub_146670
0x6584B8  spu_emitter_i16_rt
0x6584D0  spu_emitter_brasl_efu_helpers___todo
0x6584E8  spu_emitter_brasl_efu_helpers
0x658500  sub_1469AC
0x658518  sub_146A88
0x658530  sub_146B6C
0x658548  sub_146C74
0x658560  sub_146D94
0x658578  sub_146EB4
0x658590  spu_emitter_binz_r60_r62_______todo_more
0x6585A8  spu_emitter_move_r53_r54
0x6585C0  spu_emitter_move_r55_r56
0x6585D8  sub_1472CC
0x6585F0  sub_1473B0
0x658608  spu_emitter_brasl_0x8A80
</pre>
</pre>


===EE recompiler===
===EE recompiler===
Generally main r5900 recompiler subruntime is located at 0x174188 for ps2_netemu and at 0xC9C38 for gxemu. This is the place where r5900 (MIPS/COP0/COP1(FPU)/COP2(VU0-macromode)) opcodes are directed to emitter and analyzed. Jump table as is. Many opcodes jump out to different runtime due to complicated EE nature.
Generally main r5900 recompiler subruntime is located at 0x174188. This is the place where r5900 (MIPS/COP0/COP1(FPU)/COP2(VU0-macromode)) opcodes are directed to emitter and analyzed. Jump table as is. Many opcodes jump out to different runtime due to complicated EE nature.
<pre>
<pre>
jpt_1741D8: // net
jpt_1741D8:
jpt_C9C7C:  // gx
---------debug_stuff------------
---------debug_stuff------------
case 0:
case 0:
ee_r
ee_r
ee_NOP   (real op, gxemu have flag to REALLY emit or r31,r31,r31)
ee_NOP
ee_SPECIAL
ee_SPECIAL
ee_REGIMM
ee_REGIMM
Line 1,288: Line 861:


===VU0 recompiler===
===VU0 recompiler===
[sarcasm mode ON] Due to totally lovely, and 100% sane Emotion Engine architecture [sarcasm mode OFF] VU0 run on PPC because running VU0 on SPU is not able to give needed timings/sync with EE mips core. Direct function addresses here. Few "accurate"/"inaccurate" functions are missing on that list, but you really can see pattern on other ones if needed.
[sarcasm mode ON] Due to totally lovely, and 100% sane Emotion Engine architecture [sarcasm mode OFF] VU0 recompiler run on PPC because running VU0 on SPU is not able to give needed timings/sync with EE mips core. Direct function addresess here. Few "accurate"/"inaccurate" functions are missing on that list, bur you really can see pattern on other ones if needed.
<pre>
<pre>
.VU0_NOP_ 0x147910
.VU0_NOP_ 0x147910
Line 1,588: Line 1,161:
  unused_ee_ADDI_UNK2      0x17000C 0x6C
  unused_ee_ADDI_UNK2      0x17000C 0x6C
  unused_ee_JR              0x170C1C 0xB0
  unused_ee_JR              0x170C1C 0xB0
== Softemu questions ==
Hi,
You are clearly the one familiar with ps2 emus on ps3. I'm researching stuff about softemu, and I wanted to try and run some games on it. There used to be a list of the games that ran on tortuga-cave site ( can be accessed through wayback archive). Anyways, I also noticed the only emulator that was tested was version 2.6 ? But softemu was however still released up to FW 4.01. Did nobody test the latest revision of it? I was trying to record some gameplays because it's a fun topic and nobody has really recorded gameplays from it directly. But I can't for the love of god get any games to work. I tried on a slim and now on CECHL. I only have a couple of official disc games, and I tried to run them from FSM mode. PS2 discs are recognised but go to black screen. I suppose my games were not supported all that well. So I was wondering could you make some type of emulator-switcher tool that would simply allow us to switch back to softemu on latest firmwares? Something that would work on evilnat perhaps?
* I think testing on tortuga was done on 3.41 emulator (they used cobra dongle which i think was first available somewhere around 3.55 fw). I'm not familiar with FSM method, i read about it on wiki, but never heard about it working anywhere else. Your best bet will be downgrade to firmware like 3.55 and try there. Getting softemu to run on newer firmware require more work. Simple fact that softemu is old enough to use different keyset makes it impossible to just switch emus. Sadly, i can't help with getting it to run. I only know emulator side of things, firmware patches required to get it to work is not something i can do by myself. I know you want to do this for fun, but softemu had broken HW shaders and its compatibility was rather pure due to few different factors. Broken HW shaders mean visual glitches in many titles. Rushed development resulted in mostly copy pasted SPU code from gxemu, which was later heavily changed for netemu (dedicated software renderer on SPU, abandon of magic gate which allowed to use one more SPE core for emu, etc.). Like i said above your best bet is downgrade to 3.55 and trying there. Maybe searching for Cobra dongle with firmware for 3.55 too, but they will be probably highly overpriced now due to collectible value. --[[User:Kozarovv|Kozarovv]] ([[User talk:Kozarovv|talk]]) 22:31, 7 August 2024 (CEST)
Well I have tested the version you shared with your friend mrjaredbeta. The one taken from fw 4.01. And it's great, but cannot recognise memory cards. So I finally got the cobra dongle, and turns out that one is able to recognise memory cards and save games.  But cobra dongle thing only works with its own firmware sadly. I tried to replace the softemu file with 4.01 , the one you patched and also ofw one, but it would not boot any games with those. So now I am wondering, could it be possible to patch softemu 4.01 so that would also work with cobra dongle? I can send you the one that cobra uses , maybe you can take a look. I know the emulator is glitched and all, but I have a strange obsession with it lol.
* Getting new emu to work with cobra is not easy. Getting all hooks ported, etc. I have no plan to do that. Cobra version recognizes memory cards because cobra launches emulator with prepared ps2bootparam. Probably patch to handle one memory card with hardcoded name can be done to make it work on new emu, not sure. I don't think there is anything i can do to help you with any of that.--[[User:Kozarovv|Kozarovv]] ([[User talk:Kozarovv|talk]]) 09:10, 11 September 2024 (CEST)
Another question related to how ps2 upscaler works on CECHA consoles. So when the ps2 upscaler setting is on, some PAL PS2 games load into black screen on CECHAs. So I was wondering if anybody has researched how that upscaler functions or why it prevents PAL games to boot correctly? Is it something that can be potentially fixed? Do you know if this problem is present on DECHA consoles ?
* I never heard about issue like that. It's probably TV that don't like mix of 50Hz and some resolutions. I know someone who have CECH A and DECH A, everything works fine for him regardless of applied settings and game region, but he lives in EU, so TV is 50/60Hz ready for whole range of screen resolutions. I know that some 60Hz TVs don't like 576i input in PSX games on PS3 too. --[[User:Kozarovv|Kozarovv]] ([[User talk:Kozarovv|talk]]) 20:03, 27 September 2024 (CEST)
It is actually a known issue (well, known to people who have tried it). I have several PAL-games that will not boot on CECHAs unless upscaler is turned off. Call of Duty Finest hour and Death by Degrees are two examples of that. I also live in EU and my TV does support both 50 and 60hz too. Hmm, not sure about specific resolutions though. It also could be that your friend got lucky and never tried those specific games. I don't have a DECHA to test it out though, maybe he could try to test the games I mentioned?
* My friend tested that on his PS3 and indeed Death by Degrees is throwing no signal after memory card check when upscaler is active (btw. it's important to know when exactly issue occur, this helps people without CECHA look into it). I don't know how this is known issue when people that can potentially fix it are not aware of it. :) Anyway. You may want to create thread on psx-place or other place with active Cobra/CFW developers to let them know that issue exist. Info which games fail at which point will be help too. Without that there is slim chance to fix it. --[[User:Kozarovv|Kozarovv]] ([[User talk:Kozarovv|talk]]) 09:33, 30 September 2024 (CEST)
I suppose you are correct, I wrongly assumed it is a known issue. But maybe it is not. Devs seem to often ignore CECHA models, they focus on slims and the later ones. But I can post a message, yeah. Btw, I have seen your latest progress on gx-emu, and I was also wondering if you can check if it is realistically possible to add GSM options to ps2-emu (on CECHAs) ? Because GSM is a tool that can force ps2 games into different video modes, like 1080i. And since it works on CECHAs as well (through OPL), perhaps it could be integrated somehow into the emulator to simply switch resolutions when opening the settings? I am talking about this tool https://www.ps2-home.com/forum/viewtopic.php?f=12&t=53
* GSM operates by intercepting communications between EE and GS to set required registers. There is no way to do that on ps2_emu, since EE+GS is not exposing this communication outside of chip.
== Syscon Thermal Zones ==
*0x00: 1st BE Primary
*0x01: RSX Primary
*0x02: XDR Primary
*0x03: BE VR
*0x04: RSX VR
*0x05: GDDR3 VR
*0x06: XDR VR
*0x07: AC/DC
*0x08: BD Primary
*0x09: BD Secondary
*0x0A: Air Intake
*0x0B: inside chasis
*0x0C: XIO trace
*0x0D: IOIF0 trace
*0x0E: IOIF1 trace
*0x0F: GbE
*0x10: USB
*0x11: misc
*0x12: 1st HDD
*0x13: 2nd HDD
*0x14: SB
*0x15: EE+GS
Most of that is unavailable even in late Cytology...
== fsck on ps3 ==
Write to 0x10520 raw HDD offset (using ps3 "simple fs"). This match UFS2 superblock offset 0x520, which is "fs_flags". Write old value ored with 4. Value 4 means FS_NEEDSFSCK. All this is quite standard UFS2 behavior.
== Temp - Waiting for release ==
{{BoxcommGX|id=0x2C|net_id=0x0A|data=FIXME|}}
Patch 32 bit opcodes of EE executable code. '''Warning! This is custom command and it is not available in not patched emulator!'''
Format:
32 bit ID  | 32 bit align | 64bit ptr to emu memory | 32 bit count | 32 bit align
0x0000002C |  0x00000000  |  0x0000000000341190    |  0x00000002  |  0x00000000
Additional example data at 0x341190 looks like this:
  32 bit EE offset  | 32 bit align | 32 bit original opcode | 32 bit align | 32 bit replace opcode | 32 bit align 
    0x00122780    |  0x00000000  |      0x27BDFE10      |  0x00000000  |      0x27BDFD00      |  0x00000000
due to patch count == 2 in this example, there is next set of data right after first one:
  32 bit EE offset  | 32 bit align | 32 bit original opcode | 32 bit align | 32 bit replace opcode | 32 bit align 
    0x00122AE8    |  0x00000000  |      0x27BD01F0      |  0x00000000  |      0x27BD0300      |  0x00000000
<div class="mw-collapsible mw-collapsed" data-expandtext="{{int:Show}}" data-collapsetext="{{int:Hide}}" style="width:1000px; background:#cccccc;">'''More info'''
<div class="mw-collapsible-content" style="text-align:left;">
This command read and write opcodes as a 32 bit value. Command implementation helps with netemu 0x0A ports.
Example ps2_netemu 0x0A config translation.
<br>Original config.
3D 00 00 00 57 44 00 00 <-- not relevant.
0A 00 00 00 02 00 00 00 <-- CMD 0x0A, count 0x02
80 27 12 00 10 FE BD 27 00 FD BD 27 <-- addr, org opcode, replace opcode
E8 2A 12 00 F0 01 BD 27 00 03 BD 27 <-- addr, org opcode, replace opcode
Gx config.
00 00 00 84 79 85 29 05 00 34 11 78 00 00 00 01 <-- single command in this example, count is elsewhere
00 00 00 2C 00 00 00 00 00 00 00 00 00 34 11 90 00 00 00 02 00 00 00 00 <-- CMD 0x2C, ptr to command data, count 0x02.
00 12 27 80 00 00 00 00 27 BD FE 10 00 00 00 00 27 BD FD 00 00 00 00 00 <-- addr, org opcode, replace opcode
00 12 2A E8 00 00 00 00 27 BD 01 F0 00 00 00 00 27 BD 03 00 00 00 00 00 <-- addr, org opcode, replace opcode
Single line explanation, gx command is big endian, netemu is little endian:
    00 12 27 80    | 00 00 00 00 |  27 BD FE 10  | 00 00 00 00 |  27 BD FD 00  | 00 00 00 00
ee addr from 0x0A |    align    | original opcode |    align    | replace opcode |    align
</div>
</div>
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