Editing Template:CELL pad layout 90nm

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<span style="font-size:175%; font-family:Times New Roman;">Pinout</span>
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</includeonly><div style="float:right">[[File:CELL-GRID-bw-pcbview.png|300px|thumb|left|CELL BE, padlayout<br>PCB view facing BGA<br>A1 marker:northwest/topleft]]<br>[[File:CELL-GRID-color-vcc-gnd-spi-pcbview.png|300px|thumb|left|CELL BE, padlayout<br>PCB view facing BGA<br>A1 marker:northwest/topleft]]<br>[[File:CELL-GRID-bw-cpu-bottomside.png|300px|thumb|left|CELL BE, padlayout<br>CPU view facing BGA<br>A1 marker:northeast/topright]]</div>

<div style="overflow:auto; <includeonly>height:1200px;</includeonly>">
{| class="wikitable mw-datatable sortable" style="width:100%; line-height:1em; font-size:0.85em"
|+ {{captionlinks|CELL pad layout 90nm}}
! style="border-bottom:hidden; padding:2px" | Pad !! colspan="2" | Name !! style="border-bottom:hidden; padding:2px" | Type !! style="border-bottom:hidden" | Description
|-
! style="border-top:hidden; padding:0px; background-position:50%" | !! style="width:25px; min-width:25px; padding-right:0px" | Internal !! style="width:25px; min-width:25px; padding-right:0px" | External !! style="border-top:hidden; background-position:50%" | !! style="border-top:hidden; background-position:50%" | 
|-
| data-sort-value="0A01" | A1 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0A02" | A2 || Y0_DQ1N_5 || Y0_XDR0_DQN10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0A03" | A3 || Y0_DQ1N_2 || data-sort-value="Y0_XDR0_DQN06" | Y0_XDR0_DQN6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0A04" | A4 || Y0_DQ0N_6 || Y0_XDR0_DQN14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0A05" | A5 || Y0_DQ0N_4 || data-sort-value="Y0_XDR0_DQN02" | Y0_XDR0_DQN2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0A06" | A6 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0A07" | A7 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0A08" | A8 || Y0_DQ0N_1 || Y0_XDR1_DQN14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0A09" | A9 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0A10" | A10 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0A11" | A11 || Y0_DQ0_RLOAD || BE_Y0_DQ0_RLOAD || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="0A12" | A12 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A13" | A13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0A14" | A14 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A15" | A15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0A16" | A16 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A17" | A17 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0A18" | A18 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A19" | A19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0A20" | A20 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A21" | A21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0A22" | A22 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A23" | A23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0A24" | A24 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A25" | A25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0A26" | A26 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A27" | A27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0A28" | A28 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A29" | A29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0A30" | A30 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A31" | A31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0A32" | A32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A33" | A33 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0A34" | A34 || {{cellcolors|#333|#fff}} RC_XCLK_EN || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0A35" | A35 || RC_SCAN_CLK2 ||  || {{pin}} || R1001 470K to GND
|-
| data-sort-value="0A36" | A36 || RC_SCAN_CLK1 ||  || {{pin}} || R1002 470K to GND
|-
| data-sort-value="0A37" | A37 || RC_SCAN_CLK0 ||  || {{pin}} || R1003 470K to GND
|-
| data-sort-value="0A38" | A38 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0A39" | A39 || {{cellcolors|#943|#fff}} RC_VDDIO || data-sort-value="+1.2V_YC_RC_VDDIO" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="0A40" | A40 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0A41" | A41 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
! data-sort-value="0A99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0B01" | B1 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0B02" | B2 || Y0_DQ1_5 || Y0_XDR0_DQ10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0B03" | B3 || Y0_DQ1_2 || data-sort-value="Y0_XDR0_DQ06" | Y0_XDR0_DQ6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0B04" | B4 || Y0_DQ0_6 || Y0_XDR0_DQ14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0B05" | B5 || Y0_DQ0_4 || data-sort-value="Y0_XDR0_DQ02" | Y0_XDR0_DQ2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0B06" | B6 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0B07" | B7 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0B08" | B8 || Y0_DQ0_1 || Y0_XDR1_DQ14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0B09" | B9 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0B10" | B10 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0B11" | B11 || {{cellcolors|#a63|#fff}} Y0_DQ0_VREF || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0B12" | B12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0B13" | B13 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0B14" | B14 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0B15" | B15 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0B16" | B16 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0B17" | B17 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0B18" | B18 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0B19" | B19 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0B20" | B20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0B21" | B21 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0B22" | B22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0B23" | B23 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0B24" | B24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0B25" | B25 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0B26" | B26 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0B27" | B27 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0B28" | B28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0B29" | B29 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0B30" | B30 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0B31" | B31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0B32" | B32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0B33" | B33 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0B34" | B34 || RC_SCAN_CLK3 ||  || {{pin}} || R1004 470K to GND
|-
| data-sort-value="0B35" | B35 || TX0_TXN1 || BE_TX0_TXN1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0B36" | B36 || TX0_TXP1 || BE_TX0_TXP1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0B37" | B37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0B38" | B38 || TX0_TXN2 || BE_TX0_TXN2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0B39" | B39 || TX0_TXP2 || BE_TX0_TXP2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0B40" | B40 || TX0_TXN0 || BE_TX0_TXN0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0B41" | B41 || TX0_TXP0 || BE_TX0_TXP0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="0B99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0C01" | C1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C02" | C2 || Y0_DQ1N_6 || data-sort-value="Y0_XDR0_DQN00" | Y0_XDR0_DQN0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0C03" | C3 || Y0_DQ1N_4 || Y0_XDR0_DQN12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0C04" | C4 || Y0_DQ0N_0 || data-sort-value="Y0_XDR0_DQN04" | Y0_XDR0_DQN4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0C05" | C5 || Y0_DQ0N_5 || data-sort-value="Y0_XDR0_DQN08" | Y0_XDR0_DQN8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0C06" | C6 || Y0_DQ1N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="0C07" | C7 || Y0_DQ1N_3 || Y0_XDR1_DQN10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0C08" | C8 || Y0_DQ1N_1 || data-sort-value="Y0_XDR1_DQN06" | Y0_XDR1_DQN6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0C09" | C9 || Y0_DQ0N_3 || data-sort-value="Y0_XDR1_DQN02" | Y0_XDR1_DQN2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0C10" | C10 || Y0_DQ0N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="0C11" | C11 || {{cellcolors|#e83|#fff}} VDDS1 || BE_VDDS1 || {{pino}} || Connected to [[Regulators#OnSemi_NCP5318FTR2G_.28Two.2FThree.2FFour-Phase_Buck_CPU_Controller.29| Onsemi NCP5318FTR2G]] pin 5 (VFFB) and 11 (VFB)
|-
| data-sort-value="0C12" | C12 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0C13" | C13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C14" | C14 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0C15" | C15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C16" | C16 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0C17" | C17 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C18" | C18 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0C19" | C19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C20" | C20 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0C21" | C21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C22" | C22 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0C23" | C23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C24" | C24 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0C25" | C25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C26" | C26 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0C27" | C27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C28" | C28 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0C29" | C29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C30" | C30 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0C31" | C31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C32" | C32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0C33" | C33 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C34" | C34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C35" | C35 || TX0_TXN3 || BE_TX0_TXN3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0C36" | C36 || TX0_TXP3 || BE_TX0_TXP3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0C37" | C37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0C38" | C38 || TX0_TXCLKN || BE_TX0_TXCLKN || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0C39" | C39 || TX0_TXCLKP || BE_TX0_TXCLKP || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0C40" | C40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0C41" | C41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="0C99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0D01" | D1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0D02" | D2 || Y0_DQ1_6 || data-sort-value="Y0_XDR0_DQ00" | Y0_XDR0_DQ0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0D03" | D3 || Y0_DQ1_4 || Y0_XDR0_DQ12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0D04" | D4 || Y0_DQ0_0 || data-sort-value="Y0_XDR0_DQ04" | Y0_XDR0_DQ4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0D05" | D5 || Y0_DQ0_5 || data-sort-value="Y0_XDR0_DQ08" | Y0_XDR0_DQ8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0D06" | D6 || Y0_DQ1_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="0D07" | D7 || Y0_DQ1_3 || Y0_XDR1_DQ10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0D08" | D8 || Y0_DQ1_1 || data-sort-value="Y0_XDR1_DQ06" | Y0_XDR1_DQ6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0D09" | D9 || Y0_DQ0_3 || data-sort-value="Y0_XDR1_DQ02" | Y0_XDR1_DQ2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0D10" | D10 || Y0_DQ0_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="0D11" | D11 || {{cellcolors|#e83|#fff}} VDDS2 || BE_VDDS2 || {{pino}} || Connected to [[Regulators#OnSemi_NCP5318FTR2G_.28Two.2FThree.2FFour-Phase_Buck_CPU_Controller.29| Onsemi NCP5318FTR2G]] pin 9 (SGND)
|-
| data-sort-value="0D12" | D12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0D13" | D13 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0D14" | D14 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0D15" | D15 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0D16" | D16 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0D17" | D17 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0D18" | D18 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0D19" | D19 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0D20" | D20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0D21" | D21 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0D22" | D22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0D23" | D23 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0D24" | D24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0D25" | D25 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0D26" | D26 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0D27" | D27 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0D28" | D28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0D29" | D29 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0D30" | D30 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0D31" | D31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0D32" | D32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0D33" | D33 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0D34" | D34 || {{cellcolors|#333|#fff}} TX0_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0D35" | D35 || TX0_TXN5 || BE_TX0_TXN5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0D36" | D36 || TX0_TXP5 || BE_TX0_TXP5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0D37" | D37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0D38" | D38 || TX0_TXN6 || BE_TX0_TXN6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0D39" | D39 || TX0_TXP6 || BE_TX0_TXP6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0D40" | D40 || TX0_TXN4 || BE_TX0_TXN4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0D41" | D41 || TX0_TXP4 || BE_TX0_TXP4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="0D99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0E01" | E1 || Y0_RQ_RST || BE_Y0_RQ_RST || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad C15. Serial reset
|-
| data-sort-value="0E02" | E2 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E03" | E3 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0E04" | E4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E05" | E5 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0E06" | E6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E07" | E7 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0E08" | E8 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0E09" | E9 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E10" | E10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E11" | E11 || {{cellcolors|#333|#fff}} VDDE || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E12" | E12 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0E13" | E13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E14" | E14 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0E15" | E15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E16" | E16 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0E17" | E17 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E18" | E18 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0E19" | E19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E20" | E20 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0E21" | E21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E22" | E22 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0E23" | E23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E24" | E24 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0E25" | E25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E26" | E26 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0E27" | E27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E28" | E28 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0E29" | E29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E30" | E30 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0E31" | E31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E32" | E32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0E33" | E33 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0E34" | E34 || {{cellcolors|#c33|#fff}} TX0_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="0E35" | E35 || RX0_RXP7 || BE_RX0_RXP7 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0E36" | E36 || RX0_RXN7 || BE_RX0_RXN7 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0E37" | E37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0E38" | E38 || TX0_TXN7 || BE_TX0_TXN7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0E39" | E39 || TX0_TXP7 || BE_TX0_TXP7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0E40" | E40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0E41" | E41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="0E99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0F01" | F1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F02" | F2 || data-sort-value="Y0_RQ00" {{cellcolors|#ff0}} Y0_RQ0 || data-sort-value="BE_Y0_RQ00" | BE_Y0_RQ0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad C3. 12-bit request/command bus
|-
| data-sort-value="0F03" | F3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F04" | F4 || data-sort-value="Y0_RQ01" {{cellcolors|#ff0}} Y0_RQ1 || data-sort-value="BE_Y0_RQ01" | BE_Y0_RQ1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad D13. 12-bit request/command bus
|-
| data-sort-value="0F05" | F5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F06" | F6 || Y0_RQ_SRD || BE_Y0_RQ_SRD || {{pini}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad C16. Serial data in/out ?
|-
| data-sort-value="0F07" | F7 || Y0_DQ1N_7 || data-sort-value="Y0_XDR1_DQN00" | Y0_XDR1_DQN0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0F08" | F8 || Y0_DQ1N_0 || Y0_XDR1_DQN12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0F09" | F9 || Y0_DQ0N_7 || data-sort-value="Y0_XDR1_DQN04" | Y0_XDR1_DQN4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0F10" | F10 || Y0_DQ0N_2 || data-sort-value="Y0_XDR1_DQN08" | Y0_XDR1_DQN8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0F11" | F11 || {{cellcolors|#333|#fff}} YC_SCAN_CLK4 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F12" | F12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F13" | F13 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0F14" | F14 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F15" | F15 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0F16" | F16 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F17" | F17 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0F18" | F18 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F19" | F19 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0F20" | F20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F21" | F21 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0F22" | F22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F23" | F23 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0F24" | F24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F25" | F25 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0F26" | F26 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F27" | F27 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0F28" | F28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F29" | F29 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0F30" | F30 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F31" | F31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0F32" | F32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F33" | F33 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0F34" | F34 || {{cellcolors|#c33|#fff}} RX0_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="0F35" | F35 || RX0_RXP5 || BE_RX0_RXP5 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0F36" | F36 || RX0_RXN5 || BE_RX0_RXN5 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0F37" | F37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0F38" | F38 || RX0_RXP4 || BE_RX0_RXP4 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0F39" | F39 || RX0_RXN4 || BE_RX0_RXN4 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0F40" | F40 || RX0_RXP6 || BE_RX0_RXP6 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0F41" | F41 || RX0_RXN6 || BE_RX0_RXN6 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="0F99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0G01" | G1 || data-sort-value="Y0_RQ03" {{cellcolors|#ff0}} Y0_RQ3 || data-sort-value="BE_Y0_RQ03" | BE_Y0_RQ3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad D4. 12-bit request/command bus
|-
| data-sort-value="0G02" | G2 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G03" | G3 || data-sort-value="Y0_RQ05" {{cellcolors|#ff0}} Y0_RQ5 || data-sort-value="BE_Y0_RQ05" | BE_Y0_RQ5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad E14. 12-bit request/command bus
|-
| data-sort-value="0G04" | G4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G05" | G5 || data-sort-value="Y0_RQ02" {{cellcolors|#ff0}} Y0_RQ2 || data-sort-value="BE_Y0_RQ02" | BE_Y0_RQ2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad D14. 12-bit request/command bus
|-
| data-sort-value="0G06" | G6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G07" | G7 || Y0_DQ1_7 || data-sort-value="Y0_XDR1_DQ00" | Y0_XDR1_DQ0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0G08" | G8 || Y0_DQ1_0 || Y0_XDR1_DQ12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0G09" | G9 || Y0_DQ0_7 || data-sort-value="Y0_XDR1_DQ04" | Y0_XDR1_DQ4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0G10" | G10 || Y0_DQ0_2 || data-sort-value="Y0_XDR1_DQ08" | Y0_XDR1_DQ8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0G11" | G11 || {{cellcolors|#333|#fff}} YC_SCAN_CLK3 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G12" | G12 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0G13" | G13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G14" | G14 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0G15" | G15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G16" | G16 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0G17" | G17 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G18" | G18 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0G19" | G19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G20" | G20 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0G21" | G21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G22" | G22 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0G23" | G23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G24" | G24 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0G25" | G25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G26" | G26 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0G27" | G27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G28" | G28 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0G29" | G29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G30" | G30 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0G31" | G31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G32" | G32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0G33" | G33 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G34" | G34 || {{cellcolors|#333|#fff}} RX0_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G35" | G35 || RX0_RXP3 || BE_RX0_RXP3 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0G36" | G36 || RX0_RXN3 || BE_RX0_RXN3 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0G37" | G37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0G38" | G38 || RX0_RXCLKP || BE_RX0_RXCLKP || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0G39" | G39 || RX0_RXCLKN || BE_RX0_RXCLKN || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0G40" | G40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0G41" | G41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="0G99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0H01" | H1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H02" | H2 || data-sort-value="Y0_RQ04" {{cellcolors|#ff0}} Y0_RQ4 || data-sort-value="BE_Y0_RQ04" | BE_Y0_RQ4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad D3. 12-bit request/command bus
|-
| data-sort-value="0H03" | H3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H04" | H4 || data-sort-value="Y0_RQ06" {{cellcolors|#ff0}} Y0_RQ6 || data-sort-value="BE_Y0_RQ06" | BE_Y0_RQ6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad G14. 12-bit request/command bus
|-
| data-sort-value="0H05" | H5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H06" | H6 || Y0_RQ_VREF || BE_Y0_RQ_VREF || {{pini}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) power circuit
|-
| data-sort-value="0H07" | H7 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H08" | H8 || {{cellcolors|#c33|#fff}} Y0_DQ0_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
| data-sort-value="0H09" | H9 || {{cellcolors|#333|#fff}} Y0_DQ0_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H10" | H10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H11" | H11 || {{cellcolors|#333|#fff}} YC_SCAN_CLK2 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H12" | H12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H13" | H13 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0H14" | H14 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H15" | H15 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0H16" | H16 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H17" | H17 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0H18" | H18 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H19" | H19 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0H20" | H20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H21" | H21 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0H22" | H22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H23" | H23 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0H24" | H24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H25" | H25 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0H26" | H26 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H27" | H27 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0H28" | H28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H29" | H29 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0H30" | H30 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H31" | H31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0H32" | H32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H33" | H33 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0H34" | H34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0H35" | H35 || RX0_RXP1 || BE_RX0_RXP1 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0H36" | H36 || RX0_RXN1 || BE_RX0_RXN1 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0H37" | H37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0H38" | H38 || RX0_RXP0 || BE_RX0_RXP0 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0H39" | H39 || RX0_RXN0 || BE_RX0_RXN0 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0H40" | H40 || RX0_RXP2 || BE_RX0_RXP2 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0H41" | H41 || RX0_RXN2 || BE_RX0_RXN2 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="0H99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0J01" | J1 || Y0_RQ_CTMP || BE_Y0_RQ_CTM || {{pini}} || Connected to [[Timebases#ICS_ICS9218AGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9218AGLFT]] (IC5002) pin 24 (Clock To Master)
|-
| data-sort-value="0J02" | J2 || Y0_RQ_CTMN || BE_Y0_RQ_CTMN || {{pini}} || Connected to [[Timebases#ICS_ICS9218AGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9218AGLFT]] (IC5002) pin 25 (Clock To Master)
|-
| data-sort-value="0J03" | J3 || data-sort-value="Y0_RQ07" {{cellcolors|#ff0}} Y0_RQ7 || data-sort-value="BE_Y0_RQ07" | BE_Y0_RQ7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad G13. 12-bit request/command bus
|-
| data-sort-value="0J04" | J4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J05" | J5 || data-sort-value="Y0_RQ08" {{cellcolors|#ff0}} Y0_RQ8 || data-sort-value="BE_Y0_RQ08" | BE_Y0_RQ8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad H14. 12-bit request/command bus
|-
| data-sort-value="0J06" | J6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J07" | J7 || Y0_DQC_ROLREF || BE_Y0_DQC_ROLREF || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="0J08" | J8 || {{cellcolors|#c33|#fff}} Y0_DQ1_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
| data-sort-value="0J09" | J9 || {{cellcolors|#333|#fff}} NC_OPEN25 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J10" | J10 || {{cellcolors|#333|#fff}} YC_SCAN_CLK0 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J11" | J11 || {{cellcolors|#333|#fff}} YC_SCAN_CLK1 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J12" | J12 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0J13" | J13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J14" | J14 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0J15" | J15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J16" | J16 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0J17" | J17 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J18" | J18 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0J19" | J19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J20" | J20 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0J21" | J21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J22" | J22 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0J23" | J23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J24" | J24 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0J25" | J25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J26" | J26 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0J27" | J27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J28" | J28 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0J29" | J29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J30" | J30 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0J31" | J31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J32" | J32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0J33" | J33 || {{cellcolors|#333|#fff}} NC_OPEN50 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0J34" | J34 || RC_VOLGND0 || BE_RC_VOLGND0 || {{pini}} || Capacitor 0.1u@10v to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="0J35" | J35 || NT_TST03 || {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="0J36" | J36 || RC_VOLREF0 || BE_RC_VOLREF0 || {{pini}} || Resistor 56.2 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="0J37" | J37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0J38" | J38 || {{cellcolors|#a63|#fff}} RC_ROLREF0 || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0J39" | J39 || RC_RLOAD0 || BE_RC_RLOAD0 || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="0J40" | J40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0J41" | J41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="0J99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0K01" | K1 || Y0_RQ_CFMN || BE_Y0_RQ_CFMN || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad G4. (Clock From Master)
|-
| data-sort-value="0K02" | K2 || Y0_RQ_CFMP || BE_Y0_RQ_CFM || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad G3. (Clock From Master)
|-
| data-sort-value="0K03" | K3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K04" | K4 || data-sort-value="Y0_RQ09" {{cellcolors|#ff0}} Y0_RQ9 || data-sort-value="BE_Y0_RQ09" | BE_Y0_RQ9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad H13. 12-bit request/command bus
|-
| data-sort-value="0K05" | K5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K06" | K6 || Y0_RQ_SCK || BE_Y0_RQ_SCK || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad J15. Serial clock
|-
| data-sort-value="0K07" | K7 || Y0_DQC_VOLGND || BE_Y0_DQC_VOLGND || {{pini}} || Capacitor 0.1u@10v to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="0K08" | K8 || {{cellcolors|#333|#fff}} Y0_DQ1_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K09" | K9 || {{cellcolors|#333|#fff}} NC_OPEN24 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K10" | K10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K11" | K11 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0K12" | K12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K13" | K13 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0K14" | K14 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K15" | K15 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0K16" | K16 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K17" | K17 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0K18" | K18 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K19" | K19 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0K20" | K20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K21" | K21 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0K22" | K22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K23" | K23 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0K24" | K24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K25" | K25 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0K26" | K26 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K27" | K27 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0K28" | K28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K29" | K29 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0K30" | K30 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K31" | K31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0K32" | K32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K33" | K33 || {{cellcolors|#333|#fff}} NC_OPEN49 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K34" | K34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K35" | K35 || TX1_TXN1 || BE_TX1_TXN1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0K36" | K36 || TX1_TXP1 || BE_TX1_TXP1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0K37" | K37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0K38" | K38 || TX1_TXN2 || BE_TX1_TXN2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0K39" | K39 || TX1_TXP2 || BE_TX1_TXP2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0K40" | K40 || TX1_TXN0 || BE_TX1_TXN0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0K41" | K41 || TX1_TXP0 || BE_TX1_TXP0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="0K99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0L01" | L1 || {{cellcolors|#ff0}} Y0_RQ10 || BE_Y0_RQ10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad H3. 12-bit request/command bus
|-
| data-sort-value="0L02" | L2 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L03" | L3 || {{cellcolors|#ff0}} Y0_RQ11 || BE_Y0_RQ11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad H4. 12-bit request/command bus
|-
| data-sort-value="0L04" | L4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L05" | L5 || Y0_RQ_CMD || BE_Y0_RQ_CMD || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad J14. Serial commands
|-
| data-sort-value="0L06" | L6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L07" | L7 || Y0_DQC_VOLREF || BE_Y0_DQC_VOLREF || {{pini}} || Resistor 95.3 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="0L08" | L8 || {{cellcolors|#c33|#fff}} Y0_RQ_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
| data-sort-value="0L09" | L9 || {{cellcolors|#333|#fff}} NC_OPEN23 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L10" | L10 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0L11" | L11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L12" | L12 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0L13" | L13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L14" | L14 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0L15" | L15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L16" | L16 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0L17" | L17 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L18" | L18 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0L19" | L19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L20" | L20 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0L21" | L21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L22" | L22 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0L23" | L23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L24" | L24 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0L25" | L25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L26" | L26 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0L27" | L27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L28" | L28 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0L29" | L29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L30" | L30 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0L31" | L31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L32" | L32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0L33" | L33 || {{cellcolors|#333|#fff}} NC_OPEN48 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L34" | L34 || {{cellcolors|#333|#fff}} TX1_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L35" | L35 || TX1_TXN3 || BE_TX1_TXN3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0L36" | L36 || TX1_TXP3 || BE_TX1_TXP3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0L37" | L37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0L38" | L38 || TX1_TXCLKN || BE_TX1_TXCLKN || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0L39" | L39 || TX1_TXCLKP || BE_TX1_TXCLKP || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0L40" | L40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0L41" | L41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="0L99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0M01" | M1 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0M02" | M2 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0M03" | M3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0M04" | M4 || Y0_DQ2_RLOAD || BE_Y0_DQ2_RLOAD || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="0M05" | M5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0M06" | M6 || {{cellcolors|#a63|#fff}} Y0_DQ2_VREF || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0M07" | M7 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0M08" | M8 || {{cellcolors|#333|#fff}} Y0_RQ_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0M09" | M9 || {{cellcolors|#333|#fff}} NC_OPEN22 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0M10" | M10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0M11" | M11 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0M12" | M12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M13" | M13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M14" | M14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M15" | M15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M16" | M16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M17" | M17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M18" | M18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M19" | M19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M20" | M20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M21" | M21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M22" | M22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M23" | M23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M24" | M24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M25" | M25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M26" | M26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M27" | M27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M28" | M28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M29" | M29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M30" | M30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0M31" | M31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0M32" | M32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0M33" | M33 || {{cellcolors|#333|#fff}} NC_OPEN47 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0M34" | M34 || {{cellcolors|#c33|#fff}} TX1_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="0M35" | M35 || TX1_TXN5 || BE_TX1_TXN5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0M36" | M36 || TX1_TXP5 || BE_TX1_TXP5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0M37" | M37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0M38" | M38 || TX1_TXN6 || BE_TX1_TXN6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0M39" | M39 || TX1_TXP6 || BE_TX1_TXP6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0M40" | M40 || TX1_TXN4 || BE_TX1_TXN4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0M41" | M41 || TX1_TXP4 || BE_TX1_TXP4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="0M99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0N01" | N1 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N02" | N2 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N03" | N3 || Y0_DQ2_4 || Y0_XDR0_DQ11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0N04" | N4 || Y0_DQ2N_4 || Y0_XDR0_DQN11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0N05" | N5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0N06" | N6 || Y0_DQ2_1 || data-sort-value="Y0_XDR0_DQ01" | Y0_XDR0_DQ1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0N07" | N7 || Y0_DQ2N_1 || data-sort-value="Y0_XDR0_DQN01" | Y0_XDR0_DQN1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0N08" | N8 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0N09" | N9 || {{cellcolors|#333|#fff}} NC_OPEN21 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0N10" | N10 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0N11" | N11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0N12" | N12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N13" | N13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N14" | N14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N15" | N15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N16" | N16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N17" | N17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N18" | N18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N19" | N19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N20" | N20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N21" | N21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N22" | N22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N23" | N23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N24" | N24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N25" | N25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N26" | N26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N27" | N27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N28" | N28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N29" | N29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N30" | N30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N31" | N31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0N32" | N32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0N33" | N33 || {{cellcolors|#333|#fff}} NC_OPEN46 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0N34" | N34 || {{cellcolors|#c33|#fff}} RX1_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="0N35" | N35 || RX1_RXP7 || BE_RX1_RXP7 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0N36" | N36 || RX1_RXN7 || BE_RX1_RXN7 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0N37" | N37 || {{cellcolors|#973|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0N38" | N38 || TX1_TXN7 || BE_TX1_TXN7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0N39" | N39 || TX1_TXP7 || BE_TX1_TXP7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0N40" | N40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0N41" | N41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="0N99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0P01" | P1 || Y0_DQ2_3 || data-sort-value="Y0_XDR0_DQ07" | Y0_XDR0_DQ7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0P02" | P2 || Y0_DQ2N_3 || data-sort-value="Y0_XDR0_DQN07" | Y0_XDR0_DQN7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0P03" | P3 || Y0_DQ2_6 || Y0_XDR0_DQ15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0P04" | P4 || Y0_DQ2N_6 || Y0_XDR0_DQN15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0P05" | P5 || {{cellcolors|#984|fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0P06" | P6 || Y0_DQ2_5 || Y0_XDR0_DQ13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0P07" | P7 || Y0_DQ2N_5 || Y0_XDR0_DQN13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0P08" | P8 || {{cellcolors|#984|fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0P09" | P9 || {{cellcolors|#333|#fff}} NC_OPEN20 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0P10" | P10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0P11" | P11 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0P12" | P12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P13" | P13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P14" | P14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P15" | P15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P16" | P16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P17" | P17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P18" | P18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P19" | P19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P20" | P20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P21" | P21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P22" | P22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P23" | P23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P24" | P24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P25" | P25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P26" | P26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P27" | P27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P28" | P28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P29" | P29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P30" | P30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0P31" | P31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0P32" | P32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0P33" | P33 || {{cellcolors|#333|#fff}} NC_OPEN45 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0P34" | P34 || {{cellcolors|#333|#fff}} RX1_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0P35" | P35 || RX1_RXP5 || BE_RX1_RXP5 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0P36" | P36 || RX1_RXN5 || BE_RX1_RXN5 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0P37" | P37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0P38" | P38 || RX1_RXP4 || BE_RX1_RXP4 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0P39" | P39 || RX1_RXN4 || BE_RX1_RXN4 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0P40" | P40 || RX1_RXP6 || BE_RX1_RXP6 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0P41" | P41 || RX1_RXN6 || BE_RX1_RXN6 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="0P99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0R01" | R1 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R02" | R2 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R03" | R3 || Y0_DQ3_4 || data-sort-value="Y0_XDR0_DQ03" | Y0_XDR0_DQ3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0R04" | R4 || Y0_DQ3N_4 || data-sort-value="Y0_XDR0_DQN03" | Y0_XDR0_DQN3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0R05" | R5 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0R06" | R6 || Y0_DQ2_0 || data-sort-value="Y0_XDR0_DQ05" | Y0_XDR0_DQ5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0R07" | R7 || Y0_DQ2N_0 || data-sort-value="Y0_XDR0_DQN05" | Y0_XDR0_DQN5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0R08" | R8 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0R09" | R9 || {{cellcolors|#333|#fff}} NC_OPEN19 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0R10" | R10 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0R11" | R11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0R12" | R12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R13" | R13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R14" | R14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R15" | R15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R16" | R16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R17" | R17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R18" | R18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R19" | R19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R20" | R20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R21" | R21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R22" | R22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R23" | R23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R24" | R24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R25" | R25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R26" | R26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R27" | R27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R28" | R28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R29" | R29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R30" | R30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R31" | R31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0R32" | R32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0R33" | R33 || {{cellcolors|#333|#fff}} NC_OPEN44 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0R34" | R34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0R35" | R35 || RX1_RXP3 || BE_RX1_RXP3 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0R36" | R36 || RX1_RXN3 || BE_RX1_RXN3 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0R37" | R37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0R38" | R38 || RX1_RXCLKP || BE_RX1_RXCLKP || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0R39" | R39 || RX1_RXCLKN || BE_RX1_RXCLKN || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0R40" | R40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0R41" | R41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="0R99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0T01" | T1 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0T02" | T2 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0T03" | T3 || Y0_DQ2_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="0T04" | T4 || Y0_DQ2N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="0T05" | T5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0T06" | T6 || Y0_DQ3_2 || data-sort-value="Y0_XDR0_DQ09" | Y0_XDR0_DQ9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0T07" | T7 || Y0_DQ3N_2 || data-sort-value="Y0_XDR0_DQN09" | Y0_XDR0_DQN9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0T08" | T8 || {{cellcolors|#333|#fff}} Y0_DQ2_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0T09" | T9 || {{cellcolors|#333|#fff}} NC_OPEN18 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0T10" | T10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0T11" | T11 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0T12" | T12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T13" | T13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T14" | T14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T15" | T15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T16" | T16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T17" | T17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T18" | T18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T19" | T19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T20" | T20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T21" | T21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T22" | T22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T23" | T23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T24" | T24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T25" | T25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T26" | T26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T27" | T27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T28" | T28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T29" | T29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T30" | T30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0T31" | T31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0T32" | T32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0T33" | T33 || {{cellcolors|#333|#fff}} NC_OPEN43 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0T34" | T34 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0T35" | T35 || RX1_RXP1 || BE_RX1_RXP1 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0T36" | T36 || RX1_RXN1 || BE_RX1_RXN1 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0T37" | T37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0T38" | T38 || RX1_RXP0 || BE_RX1_RXP0 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0T39" | T39 || RX1_RXN0 || BE_RX1_RXN0 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0T40" | T40 || RX1_RXP2 || BE_RX1_RXP2 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0T41" | T41 || RX1_RXN2 || BE_RX1_RXN2 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="0T99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0U01" | U1 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U02" | U2 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U03" | U3 || Y0_DQ2_7 || Y0_XDR1_DQ11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0U04" | U4 || Y0_DQ2N_7 || Y0_XDR1_DQN11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0U05" | U5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0U06" | U6 || Y0_DQ2_2 || data-sort-value="Y0_XDR1_DQ01" | Y0_XDR1_DQ1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0U07" | U7 || Y0_DQ2N_2 || data-sort-value="Y0_XDR1_DQN01" | Y0_XDR1_DQN1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0U08" | U8 || {{cellcolors|#c33|#fff}} Y0_DQ2_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
| data-sort-value="0U09" | U9 || {{cellcolors|#333|#fff}} NC_OPEN17 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0U10" | U10 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0U11" | U11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0U12" | U12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U13" | U13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U14" | U14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U15" | U15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U16" | U16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U17" | U17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U18" | U18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U19" | U19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U20" | U20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U21" | U21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U22" | U22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U23" | U23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U24" | U24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U25" | U25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U26" | U26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U27" | U27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U28" | U28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U29" | U29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U30" | U30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U31" | U31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0U32" | U32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0U33" | U33 || {{cellcolors|#333|#fff}} NC_OPEN42 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0U34" | U34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0U35" | U35 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0U36" | U36 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0U37" | U37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0U38" | U38 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0U39" | U39 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0U40" | U40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0U41" | U41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="0U99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0V01" | V1 || Y0_DQ3_0 || data-sort-value="Y0_XDR1_DQ07" | Y0_XDR1_DQ7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0V02" | V2 || Y0_DQ3N_0 || data-sort-value="Y0_XDR1_DQN07" | Y0_XDR1_DQN7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0V03" | V3 || Y0_DQ3_5 || Y0_XDR1_DQ15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0V04" | V4 || Y0_DQ3N_5 || Y0_XDR1_DQN15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0V05" | V5 || {{cellcolors|#984|fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0V06" | V6 || Y0_DQ3_1 || Y0_XDR1_DQ13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0V07" | V7 || Y0_DQ3N_1 || Y0_XDR1_DQN13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0V08" | V8 || {{cellcolors|#c33|#fff}} Y0_DQ3_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
| data-sort-value="0V09" | V9 || {{cellcolors|#333|#fff}} NC_OPEN16 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0V10" | V10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0V11" | V11 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0V12" | V12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V13" | V13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V14" | V14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V15" | V15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V16" | V16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V17" | V17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V18" | V18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V19" | V19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V20" | V20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V21" | V21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V22" | V22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V23" | V23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V24" | V24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V25" | V25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V26" | V26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V27" | V27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V28" | V28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V29" | V29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V30" | V30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0V31" | V31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0V32" | V32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0V33" | V33 || {{cellcolors|#333|#fff}} NC_OPEN41 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0V34" | V34 || {{cellcolors|#333|#fff}} TX2_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0V35" | V35 || TX2_TXN1 || BE_TX2_TXN1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0V36" | V36 || TX2_TXP1 || BE_TX2_TXP1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0V37" | V37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0V38" | V38 || TX2_TXN2 || BE_TX2_TXN2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0V39" | V39 || TX2_TXP2 || BE_TX2_TXP2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0V40" | V40 || TX2_TXN0 || BE_TX2_TXN0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0V41" | V41 || TX2_TXP0 || BE_TX2_TXP0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="0V99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0W01" | W1 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W02" | W2 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W03" | W3 || Y0_DQ3_6 || data-sort-value="Y0_XDR1_DQ03" | Y0_XDR1_DQ3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0W04" | W4 || Y0_DQ3N_6 || data-sort-value="Y0_XDR1_DQN03" | Y0_XDR1_DQN3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0W05" | W5 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0W06" | W6 || Y0_DQ3_3 || data-sort-value="Y0_XDR1_DQ05" | Y0_XDR1_DQ5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0W07" | W7 || Y0_DQ3N_3 || data-sort-value="Y0_XDR1_DQN05" | Y0_XDR1_DQN5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0W08" | W8 || {{cellcolors|#333|#fff}} Y0_DQ3_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0W09" | W9 || {{cellcolors|#333|#fff}} NC_OPEN15 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0W10" | W10 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0W11" | W11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0W12" | W12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W13" | W13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W14" | W14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W15" | W15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W16" | W16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W17" | W17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W18" | W18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W19" | W19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W20" | W20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W21" | W21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W22" | W22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W23" | W23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W24" | W24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W25" | W25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W26" | W26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W27" | W27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W28" | W28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W29" | W29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W30" | W30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W31" | W31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0W32" | W32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0W33" | W33 || {{cellcolors|#333|#fff}} NC_OPEN40 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0W34" | W34 || {{cellcolors|#c33|#fff}} TX2_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="0W35" | W35 || TX2_TXN3 || BE_TX2_TXN3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0W36" | W36 || TX2_TXP3 || BE_TX2_TXP3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0W37" | W37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0W38" | W38 || TX2_TXCLKN || BE_TX2_TXCLKN || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0W39" | W39 || TX2_TXCLKP || BE_TX2_TXCLKP || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0W40" | W40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0W41" | W41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="0W99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="0Y01" | Y1 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0Y02" | Y2 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0Y03" | Y3 || Y0_DQ3_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="0Y04" | Y4 || Y0_DQ3N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="0Y05" | Y5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0Y06" | Y6 || Y0_DQ3_7 || data-sort-value="Y0_XDR1_DQ09" | Y0_XDR1_DQ9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0Y07" | Y7 || Y0_DQ3N_7 || data-sort-value="Y0_XDR1_DQN09" | Y0_XDR1_DQN9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0Y08" | Y8 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0Y09" | Y9 || {{cellcolors|#333|#fff}} NC_OPEN14 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0Y10" | Y10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0Y11" | Y11 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0Y12" | Y12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y13" | Y13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y14" | Y14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y15" | Y15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y16" | Y16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y17" | Y17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y18" | Y18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y19" | Y19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y20" | Y20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y21" | Y21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y22" | Y22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y23" | Y23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y24" | Y24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y25" | Y25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y26" | Y26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y27" | Y27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y28" | Y28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y29" | Y29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y30" | Y30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="0Y31" | Y31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0Y32" | Y32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0Y33" | Y33 || {{cellcolors|#333|#fff}} NC_OPEN39 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="0Y34" | Y34 || {{cellcolors|#c33|#fff}} RX2_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="0Y35" | Y35 || TX2_TXN5 || BE_TX2_TXN5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0Y36" | Y36 || TX2_TXP5 || BE_TX2_TXP5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0Y37" | Y37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0Y38" | Y38 || TX2_TXN6 || BE_TX2_TXN6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0Y39" | Y39 || TX2_TXP6 || BE_TX2_TXP6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0Y40" | Y40 || TX2_TXN4 || BE_TX2_TXN4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="0Y41" | Y41 || TX2_TXP4 || BE_TX2_TXP4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="0Y99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AA01" | AA1 || Y1_DQ0_RLOAD || BE_Y1_DQ0_RLOAD || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="AA02" | AA2 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AA03" | AA3 || {{cellcolors|#a63|#fff}} Y1_DQ0_VREF<!--the name YQ_DQ0_VREF in the service manual seems to be a typo--> || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AA04" | AA4 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AA05" | AA5 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AA06" | AA6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AA07" | AA7 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AA08" | AA8 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AA09" | AA9 || {{cellcolors|#333|#fff}} NC_OPEN13 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AA10" | AA10 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AA11" | AA11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AA12" | AA12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA13" | AA13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA14" | AA14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA15" | AA15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA16" | AA16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA17" | AA17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA18" | AA18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA19" | AA19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA20" | AA20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA21" | AA21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA22" | AA22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA23" | AA23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA24" | AA24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA25" | AA25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA26" | AA26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA27" | AA27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA28" | AA28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA29" | AA29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA30" | AA30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA31" | AA31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AA32" | AA32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AA33" | AA33 || {{cellcolors|#333|#fff}} NC_OPEN38 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AA34" | AA34 || {{cellcolors|#333|#fff}} RX2_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AA35" | AA35 || RX2_RXP7 || BE_RX2_RXP7 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AA36" | AA36 || RX2_RXN7 || BE_RX2_RXN7 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AA37" | AA37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AA38" | AA38 || TX2_TXN7 || BE_TX2_TXN7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AA39" | AA39 || TX2_TXP7 || BE_TX2_TXP7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AA40" | AA40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AA41" | AA41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="AA99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AB01" | AB1 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AB02" | AB2 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AB03" | AB3 || Y1_DQ0_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AB04" | AB4 || Y1_DQ0N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AB05" | AB5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AB06" | AB6 || Y1_DQ0_1 || data-sort-value="Y1_XDR1_DQ08" | Y1_XDR1_DQ8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AB07" | AB7 || Y1_DQ0N_1 || data-sort-value="Y1_XDR1_DQN08" | Y1_XDR1_DQN8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AB08" | AB8 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AB09" | AB9 || {{cellcolors|#333|#fff}} NC_OPEN12 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AB10" | AB10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AB11" | AB11 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AB12" | AB12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB13" | AB13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB14" | AB14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB15" | AB15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB16" | AB16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB17" | AB17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB18" | AB18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB19" | AB19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB20" | AB20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB21" | AB21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB22" | AB22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB23" | AB23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB24" | AB24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB25" | AB25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB26" | AB26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB27" | AB27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB28" | AB28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB29" | AB29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB30" | AB30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AB31" | AB31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AB32" | AB32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AB33" | AB33 || {{cellcolors|#333|#fff}} NC_OPEN37 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AB34" | AB34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AB35" | AB35 || RX2_RXP5 || BE_RX2_RXP5 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AB36" | AB36 || RX2_RXN5 || BE_RX2_RXN5 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AB37" | AB37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AB38" | AB38 || RX2_RXP4 || BE_RX2_RXP4 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AB39" | AB39 || RX2_RXN4 || BE_RX2_RXN4 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AB40" | AB40 || RX2_RXP6 || BE_RX2_RXP6 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AB41" | AB41 || RX2_RXN6 || BE_RX2_RXN6 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="AB99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AC01" | AC1 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC02" | AC2 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC03" | AC3 || Y1_DQ0_4 || data-sort-value="Y1_XDR1_DQ02" | Y1_XDR1_DQ2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AC04" | AC4 || Y1_DQ0N_4 || data-sort-value="Y1_XDR1_DQN02" | Y1_XDR1_DQN2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AC05" | AC5 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AC06" | AC6 || Y1_DQ0_7 || data-sort-value="Y1_XDR1_DQ04" | Y1_XDR1_DQ4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AC07" | AC7 || Y1_DQ0N_7 || data-sort-value="Y1_XDR1_DQN04" | Y1_XDR1_DQN4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AC08" | AC8 || {{cellcolors|#333|#fff}} Y1_DQ0_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AC09" | AC9 || {{cellcolors|#333|#fff}} NC_OPEN11 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AC10" | AC10 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AC11" | AC11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AC12" | AC12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC13" | AC13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC14" | AC14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC15" | AC15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC16" | AC16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC17" | AC17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC18" | AC18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC19" | AC19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC20" | AC20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC21" | AC21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC22" | AC22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC23" | AC23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC24" | AC24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC25" | AC25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC26" | AC26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC27" | AC27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC28" | AC28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC29" | AC29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC30" | AC30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC31" | AC31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AC32" | AC32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AC33" | AC33 || {{cellcolors|#333|#fff}} NC_OPEN36 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AC34" | AC34 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AC35" | AC35 || RX2_RXP3 || BE_RX2_RXP3 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AC36" | AC36 || RX2_RXN3 || BE_RX2_RXN3 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AC37" | AC37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AC38" | AC38 || RX2_RXCLKP || BE_RX2_RXCLKP || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AC39" | AC39 || RX2_RXCLKN || BE_RX2_RXCLKN || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AC40" | AC40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AC41" | AC41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="AC99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AD01" | AD1 || Y1_DQ0_2 || data-sort-value="Y1_XDR1_DQ06" | Y1_XDR1_DQ6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AD02" | AD2 || Y1_DQ0N_2 || data-sort-value="Y1_XDR1_DQN06" | Y1_XDR1_DQN6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AD03" | AD3 || Y1_DQ0_5 || Y1_XDR1_DQ14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AD04" | AD4 || Y1_DQ0N_5 || Y1_XDR1_DQN14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AD05" | AD5 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AD06" | AD6 || Y1_DQ1_0 || Y1_XDR1_DQ12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AD07" | AD7 || Y1_DQ1N_0 || Y1_XDR1_DQN12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AD08" | AD8 || {{cellcolors|#c33|#fff}} Y1_DQ0_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
| data-sort-value="AD09" | AD9 || {{cellcolors|#333|#fff}} NC_OPEN10 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AD10" | AD10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AD11" | AD11 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AD12" | AD12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD13" | AD13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD14" | AD14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD15" | AD15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD16" | AD16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD17" | AD17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD18" | AD18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD19" | AD19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD20" | AD20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD21" | AD21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD22" | AD22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD23" | AD23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD24" | AD24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD25" | AD25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD26" | AD26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD27" | AD27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD28" | AD28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD29" | AD29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD30" | AD30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AD31" | AD31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AD32" | AD32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AD33" | AD33 || {{cellcolors|#333|#fff}} NC_OPEN35 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AD34" | AD34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AD35" | AD35 || RX2_RXP1 || BE_RX2_RXP1 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AD36" | AD36 || RX2_RXN1 || BE_RX2_RXN1 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AD37" | AD37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AD38" | AD38 || RX2_RXP0 || BE_RX2_RXP0 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AD39" | AD39 || RX2_RXN0 || BE_RX2_RXN0 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AD40" | AD40 || RX2_RXP2 || BE_RX2_RXP2 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AD41" | AD41 || RX2_RXN2 || BE_RX2_RXN2 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="AD99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AE01" | AE1 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE02" | AE2 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE03" | AE3 || Y1_DQ1_1 || Y1_XDR1_DQ10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AE04" | AE4 || Y1_DQ1N_1 || Y1_XDR1_DQN10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AE05" | AE5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AE06" | AE6 || Y1_DQ1_3 || data-sort-value="Y1_XDR1_DQ00" | Y1_XDR1_DQ0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AE07" | AE7 || Y1_DQ1N_3 || data-sort-value="Y1_XDR1_DQN00" | Y1_XDR1_DQN0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AE08" | AE8 || {{cellcolors|#c33|#fff}} Y1_DQ1_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
| data-sort-value="AE09" | AE9 || {{cellcolors|#333|#fff}} NC_OPEN09 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AE10" | AE10 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AE11" | AE11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AE12" | AE12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE13" | AE13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE14" | AE14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE15" | AE15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE16" | AE16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE17" | AE17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE18" | AE18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE19" | AE19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE20" | AE20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE21" | AE21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE22" | AE22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE23" | AE23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE24" | AE24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE25" | AE25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE26" | AE26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE27" | AE27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE28" | AE28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE29" | AE29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE30" | AE30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE31" | AE31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AE32" | AE32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AE33" | AE33 || {{cellcolors|#333|#fff}} NC_OPEN34 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AE34" | AE34 || {{cellcolors|#333|#fff}} TX3_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AE35" | AE35 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AE36" | AE36 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AE37" | AE37 || {{cellcolors|#973|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AE38" | AE38 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AE39" | AE39 || {{cellcolors|#973|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AE40" | AE40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AE41" | AE41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="AE99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AF01" | AF1 || {{cellcolors|#984|fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AF02" | AF2 || {{cellcolors|#984|fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AF03" | AF3 || Y1_DQ1_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AF04" | AF4 || Y1_DQ1N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AF05" | AF5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AF06" | AF6 || Y1_DQ0_0 || data-sort-value="Y1_XDR0_DQ08" | Y1_XDR0_DQ8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AF07" | AF7 || Y1_DQ0N_0 || data-sort-value="Y1_XDR0_DQN08" | Y1_XDR0_DQN8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AF08" | AF8 || {{cellcolors|#333|#fff}} Y1_DQ1_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AF09" | AF9 || {{cellcolors|#333|#fff}} NC_OPEN08 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AF10" | AF10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AF11" | AF11 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AF12" | AF12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF13" | AF13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF14" | AF14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF15" | AF15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF16" | AF16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF17" | AF17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF18" | AF18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF19" | AF19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF20" | AF20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF21" | AF21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF22" | AF22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF23" | AF23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF24" | AF24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF25" | AF25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF26" | AF26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF27" | AF27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF28" | AF28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF29" | AF29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF30" | AF30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AF31" | AF31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AF32" | AF32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AF33" | AF33 || {{cellcolors|#333|#fff}} NC_OPEN33 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AF34" | AF34 || {{cellcolors|#c33|#fff}} TX3_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="AF35" | AF35 || TX3_TXN1 || BE_TX3_TXN1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AF36" | AF36 || TX3_TXP1 || BE_TX3_TXP1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AF37" | AF37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AF38" | AF38 || TX3_TXN2 || BE_TX3_TXN2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AF39" | AF39 || TX3_TXP2 || BE_TX3_TXP2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AF40" | AF40 || TX3_TXN0 || BE_TX3_TXN0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AF41" | AF41 || TX3_TXP0 || BE_TX3_TXP0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="AF99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AG01" | AG1 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG02" | AG2 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG03" | AG3 || Y1_DQ0_6 || data-sort-value="Y1_XDR0_DQ02" | Y1_XDR0_DQ2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AG04" | AG4 || Y1_DQ0N_6 || data-sort-value="Y1_XDR0_DQN02" | Y1_XDR0_DQN2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AG05" | AG5 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AG06" | AG6 || Y1_DQ1_2 || data-sort-value="Y1_XDR0_DQ04" | Y1_XDR0_DQ4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AG07" | AG7 || Y1_DQ1N_2 || data-sort-value="Y1_XDR0_DQN04" | Y1_XDR0_DQN4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AG08" | AG8 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AG09" | AG9 || {{cellcolors|#333|#fff}} NC_OPEN07 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AG10" | AG10 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AG11" | AG11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AG12" | AG12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG13" | AG13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG14" | AG14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG15" | AG15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG16" | AG16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG17" | AG17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG18" | AG18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG19" | AG19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG20" | AG20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG21" | AG21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG22" | AG22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG23" | AG23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG24" | AG24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG25" | AG25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG26" | AG26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG27" | AG27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG28" | AG28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG29" | AG29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG30" | AG30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG31" | AG31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AG32" | AG32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AG33" | AG33 || {{cellcolors|#333|#fff}} NC_OPEN32 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AG34" | AG34 || {{cellcolors|#c33|#fff}} TX4_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="AG35" | AG35 || TX3_TXN3 || BE_TX3_TXN3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AG36" | AG36 || TX3_TXP3 || BE_TX3_TXP3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AG37" | AG37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AG38" | AG38 || TX3_TXCLKN || BE_TX3_TXCLKN || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AG39" | AG39 || TX3_TXCLKP || BE_TX3_TXCLKP || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AG40" | AG40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AG41" | AG41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="AG99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AH01" | AH1 || Y1_DQ0_3 || data-sort-value="Y1_XDR0_DQ06" | Y1_XDR0_DQ6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AH02" | AH2 || Y1_DQ0N_3 || data-sort-value="Y1_XDR0_DQN06" | Y1_XDR0_DQN6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AH03" | AH3 || Y1_DQ1_5 || Y1_XDR0_DQ14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AH04" | AH4 || Y1_DQ1N_5 || Y1_XDR0_DQN14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AH05" | AH5 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AH06" | AH6 || Y1_DQ1_4 || Y1_XDR0_DQ12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AH07" | AH7 || Y1_DQ1N_4 || Y1_XDR0_DQN12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AH08" | AH8 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AH09" | AH9 || {{cellcolors|#333|#fff}} NC_OPEN06 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AH10" | AH10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AH11" | AH11 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AH12" | AH12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH13" | AH13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH14" | AH14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH15" | AH15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH16" | AH16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH17" | AH17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH18" | AH18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH19" | AH19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH20" | AH20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH21" | AH21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH22" | AH22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH23" | AH23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH24" | AH24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH25" | AH25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH26" | AH26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH27" | AH27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH28" | AH28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH29" | AH29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH30" | AH30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AH31" | AH31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AH32" | AH32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AH33" | AH33 || {{cellcolors|#333|#fff}} NC_OPEN31 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AH34" | AH34 || {{cellcolors|#333|#fff}} TX4_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AH35" | AH35 || TX3_TXN5 || BE_TX3_TXN5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AH36" | AH36 || TX3_TXP5 || BE_TX3_TXP5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AH37" | AH37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AH38" | AH38 || TX3_TXN6 || BE_TX3_TXN6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AH39" | AH39 || TX3_TXP6 || BE_TX3_TXP6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AH40" | AH40 || TX3_TXN4 || BE_TX3_TXN4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AH41" | AH41 || TX3_TXP4 || BE_TX3_TXP4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
! data-sort-value="AH99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AJ01" | AJ1 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ02" | AJ2 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ03" | AJ3 || Y1_DQ1_7 || Y1_XDR0_DQ10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AJ04" | AJ4 || Y1_DQ1N_7 || Y1_XDR0_DQN10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AJ05" | AJ5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AJ06" | AJ6 || Y1_DQ1_6 || data-sort-value="Y1_XDR0_DQ00" | Y1_XDR0_DQ0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AJ07" | AJ7 || Y1_DQ1N_6 || data-sort-value="Y1_XDR0_DQN00" | Y1_XDR0_DQN0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AJ08" | AJ8 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AJ09" | AJ9 || {{cellcolors|#333|#fff}} NC_OPEN05 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AJ10" | AJ10 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AJ11" | AJ11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AJ12" | AJ12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ13" | AJ13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ14" | AJ14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ15" | AJ15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ16" | AJ16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ17" | AJ17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ18" | AJ18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ19" | AJ19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ20" | AJ20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ21" | AJ21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ22" | AJ22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ23" | AJ23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ24" | AJ24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ25" | AJ25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ26" | AJ26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ27" | AJ27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ28" | AJ28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ29" | AJ29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ30" | AJ30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ31" | AJ31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AJ32" | AJ32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AJ33" | AJ33 || {{cellcolors|#333|#fff}} NC_OPEN30 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AJ34" | AJ34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AJ35" | AJ35 || TX4_TXN1 || data-sort-value="BE_TX4_TXN1" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AJ36" | AJ36 || TX4_TXP1 || data-sort-value="BE_TX4_TXP1" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AJ37" | AJ37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AJ38" | AJ38 || TX3_TXN7 || BE_TX3_TXN7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AJ39" | AJ39 || TX3_TXP7 || BE_TX3_TXP7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
| data-sort-value="AJ40" | AJ40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AJ41" | AJ41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="AJ99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AK01" | AK1 || {{cellcolors|#984|fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AK02" | AK2 || {{cellcolors|#984|fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AK03" | AK3 || Y1_RQ_RST || BE_Y1_RQ_RST || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad C15. Serial reset
|-
| data-sort-value="AK04" | AK4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AK05" | AK5 || Y1_RQ_SRD || BE_Y1_RQ_SRD || {{pini}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad C16. Serial data in/out ?
|-
| data-sort-value="AK06" | AK6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AK07" | AK7 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AK08" | AK8 || {{cellcolors|#333|#fff}} Y1_RQ_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AK09" | AK9 || {{cellcolors|#333|#fff}} NC_OPEN04 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AK10" | AK10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AK11" | AK11 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AK12" | AK12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK13" | AK13 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK14" | AK14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK15" | AK15 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK16" | AK16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK17" | AK17 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK18" | AK18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK19" | AK19 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK20" | AK20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK21" | AK21 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK22" | AK22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK23" | AK23 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK24" | AK24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK25" | AK25 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK26" | AK26 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK27" | AK27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK28" | AK28 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK29" | AK29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK30" | AK30 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AK31" | AK31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AK32" | AK32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AK33" | AK33 || {{cellcolors|#333|#fff}} NC_OPEN29 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AK34" | AK34 || {{cellcolors|#973|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AK35" | AK35 || TX4_TXN3 || data-sort-value="BE_TX4_TXN3" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AK36" | AK36 || TX4_TXP3 || data-sort-value="BE_TX4_TXP3" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AK37" | AK37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AK38" | AK38 || TX4_TXN2 || data-sort-value="BE_TX4_TXN2" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AK39" | AK39 || TX4_TXP2 || data-sort-value="BE_TX4_TXP2" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AK40" | AK40 || TX4_TXN0 || data-sort-value="BE_TX4_TXN0" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AK41" | AK41 || TX4_TXP0 || data-sort-value="BE_TX4_TXP0" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
! data-sort-value="AK99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AL01" | AL1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL02" | AL2 || data-sort-value="Y1_RQ00" {{cellcolors|#ff0}} Y1_RQ0 || data-sort-value="BE_Y1_RQ00" | BE_Y1_RQ0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad C3. 12-bit request/command bus
|-
| data-sort-value="AL03" | AL3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL04" | AL4 || data-sort-value="Y1_RQ01" {{cellcolors|#ff0}} Y1_RQ1 || data-sort-value="BE_Y1_RQ01" | BE_Y1_RQ1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad D13. 12-bit request/command bus
|-
| data-sort-value="AL05" | AL5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL06" | AL6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL07" | AL7 || Y1_DQC_VOLREF || BE_Y1_DQC_VOLREF || {{pini}} || Resistor 95.3 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="AL08" | AL8 || {{cellcolors|#c33|#fff}} Y1_RQ_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
| data-sort-value="AL09" | AL9 || {{cellcolors|#333|#fff}} NC_OPEN03 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL10" | AL10 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AL11" | AL11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL12" | AL12 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AL13" | AL13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL14" | AL14 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AL15" | AL15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL16" | AL16 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL17" | AL17 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL18" | AL18 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AL19" | AL19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL20" | AL20 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AL21" | AL21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL22" | AL22 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AL23" | AL23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL24" | AL24 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AL25" | AL25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL26" | AL26 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AL27" | AL27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL28" | AL28 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AL29" | AL29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL30" | AL30 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AL31" | AL31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL32" | AL32 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AL33" | AL33 || {{cellcolors|#333|#fff}} NC_OPEN28 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL34" | AL34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL35" | AL35 || TX4_TXN5 || data-sort-value="BE_TX4_TXN5" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AL36" | AL36 || TX4_TXP5 || data-sort-value="BE_TX4_TXP5" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AL37" | AL37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AL38" | AL38 || TX4_TXCLKN || data-sort-value="BE_TX4_TXCLKN" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AL39" | AL39 || TX4_TXCLKP || data-sort-value="BE_TX4_TXCLKP" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AL40" | AL40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AL41" | AL41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="AL99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AM01" | AM1 || data-sort-value="Y1_RQ03" {{cellcolors|#ff0}} Y1_RQ3 || data-sort-value="BE_Y1_RQ03" | BE_Y1_RQ3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad D4. 12-bit request/command bus
|-
| data-sort-value="AM02" | AM2 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM03" | AM3 || data-sort-value="Y1_RQ05" {{cellcolors|#ff0}} Y1_RQ5 || data-sort-value="BE_Y1_RQ05" | BE_Y1_RQ5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad E14. 12-bit request/command bus
|-
| data-sort-value="AM04" | AM4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM05" | AM5 || data-sort-value="Y1_RQ02" {{cellcolors|#ff0}} Y1_RQ2 || data-sort-value="BE_Y1_RQ02" | BE_Y1_RQ2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad D14. 12-bit request/command bus
|-
| data-sort-value="AM06" | AM6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM07" | AM7 || Y1_DQC_VOLGND || BE_Y1_DQC_VOLGND || {{pini}} || Capacitor 0.1u@10v to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="AM08" | AM8 || {{cellcolors|#333|#fff}} Y1_DQ2_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM09" | AM9 || {{cellcolors|#333|#fff}} NC_OPEN02 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM10" | AM10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM11" | AM11 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM12" | AM12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM13" | AM13 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM14" | AM14 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM15" | AM15 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM16" | AM16 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM17" | AM17 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM18" | AM18 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM19" | AM19 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM20" | AM20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM21" | AM21 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM22" | AM22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM23" | AM23 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM24" | AM24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM25" | AM25 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM26" | AM26 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM27" | AM27 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM28" | AM28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM29" | AM29 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM30" | AM30 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM31" | AM31 || {{cellcolors|#633|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM32" | AM32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM33" | AM33 || {{cellcolors|#333|#fff}} NC_OPEN27 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM34" | AM34 || {{cellcolors|#333|#fff}} TX5_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AM35" | AM35 || TX4_TXN7 || data-sort-value="BE_TX4_TXN7" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AM36" | AM36 || TX4_TXP7 || data-sort-value="BE_TX4_TXP7" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AM37" | AM37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AM38" | AM38 || TX4_TXN6 || data-sort-value="BE_TX4_TXN6" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AM39" | AM39 || TX4_TXP6 || data-sort-value="BE_TX4_TXP6" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AM40" | AM40 || TX4_TXN4 || data-sort-value="BE_TX4_TXN4" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AM41" | AM41 || TX4_TXP4 || data-sort-value="BE_TX4_TXP4" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
! data-sort-value="AM99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AN01" | AN1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN02" | AN2 || data-sort-value="Y1_RQ04" {{cellcolors|#ff0}} Y1_RQ4 || data-sort-value="BE_Y1_RQ04" | BE_Y1_RQ4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad D3. 12-bit request/command bus
|-
| data-sort-value="AN03" | AN3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN04" | AN4 || data-sort-value="Y1_RQ06" {{cellcolors|#ff0}} Y1_RQ6 || data-sort-value="BE_Y1_RQ06" | BE_Y1_RQ6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad G14. 12-bit request/command bus
|-
| data-sort-value="AN05" | AN5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN06" | AN6 || Y1_RQ_VREF || BE_Y1_RQ_VREF || {{pini}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) power circuit
|-
| data-sort-value="AN07" | AN7 || Y1_DQC_ROLREF || BE_Y1_DQC_ROLREF || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="AN08" | AN8 || {{cellcolors|#c33|#fff}} Y1_DQ2_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
| data-sort-value="AN09" | AN9 || {{cellcolors|#333|#fff}} NC_OPEN01 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN10" | AN10 || {{cellcolors|#333|#fff}} NC_OPEN51 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN11" | AN11 || {{cellcolors|#333|#fff}} NC_OPEN52 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN12" | AN12 || {{cellcolors|#333|#fff}} NC_OPEN53 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN13" | AN13 || {{cellcolors|#333|#fff}} NC_OPEN54 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN14" | AN14 || {{cellcolors|#333|#fff}} NC_OPEN55 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN15" | AN15 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN16" | AN16 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN17" | AN17 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN18" | AN18 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN19" | AN19 || {{cellcolors|#333|#fff}} NC_OPEN56 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN20" | AN20 || {{cellcolors|#333|#fff}} NC_OPEN57 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN21" | AN21 || {{cellcolors|#333|#fff}} NC_OPEN58 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN22" | AN22 || {{cellcolors|#333|#fff}} NC_OPEN59 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN23" | AN23 || {{cellcolors|#333|#fff}} NC_OPEN60 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN24" | AN24 || {{cellcolors|#333|#fff}} NC_OPEN61 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN25" | AN25 || {{cellcolors|#333|#fff}} NC_OPEN62 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN26" | AN26 || {{cellcolors|#333|#fff}} NC_OPEN63 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN27" | AN27 || {{cellcolors|#333|#fff}} NC_OPEN64 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN28" | AN28 || {{cellcolors|#333|#fff}} NC_OPEN65 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN29" | AN29 || {{cellcolors|#333|#fff}} NC_OPEN66 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN30" | AN30 || {{cellcolors|#333|#fff}} NC_OPEN67 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN31" | AN31 || {{cellcolors|#333|#fff}} NC_OPEN68 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN32" | AN32 || {{cellcolors|#333|#fff}} NC_OPEN69 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN33" | AN33 || {{cellcolors|#333|#fff}} NC_OPEN26 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN34" | AN34 || {{cellcolors|#c33|#fff}} TX5_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="AN35" | AN35 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN36" | AN36 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN37" | AN37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AN38" | AN38 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AN39" | AN39 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AN40" | AN40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AN41" | AN41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="AN99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AP01" | AP1 || Y1_RQ_CTMP || BE_Y1_RQ_CTM || {{pini}} || Connected to [[Timebases#ICS_ICS9218AGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9218AGLFT]] (IC5002) pin 18 (Clock To Master)
|-
| data-sort-value="AP02" | AP2 || Y1_RQ_CTMN || BE_Y1_RQ_CTMN || {{pini}} || Connected to [[Timebases#ICS_ICS9218AGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9218AGLFT]] (IC5002) pin 19 (Clock To Master)
|-
| data-sort-value="AP03" | AP3 || data-sort-value="Y1_RQ07" {{cellcolors|#ff0}} Y1_RQ7 || data-sort-value="BE_Y1_RQ07" | BE_Y1_RQ7 || {{pini}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad G13. 12-bit request/command bus
|-
| data-sort-value="AP04" | AP4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP05" | AP5 || data-sort-value="Y1_RQ08" {{cellcolors|#ff0}} Y1_RQ8 || data-sort-value="BE_Y1_RQ08" | BE_Y1_RQ8 || {{pini}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad H14. 12-bit request/command bus
|-
| data-sort-value="AP06" | AP6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP07" | AP7 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP08" | AP8 || {{cellcolors|#c33|#fff}} Y1_DQ3_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
| data-sort-value="AP09" | AP9 || {{cellcolors|#333|#fff}} Y1_DQ3_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP10" | AP10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP11" | AP11 || {{cellcolors|#333|#fff}} YC_SCAN_EN || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP12" | AP12 || {{cellcolors|#333|#fff}} YC_TREF || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP13" | AP13 || SPI_EN_B || BE_SPI_CS || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad M2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]])
|-
| data-sort-value="AP14" | AP14 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP15" | AP15 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP16" | AP16 || {{cellcolors|#d90}} PLL_VDDA || BE_PLL_VDDA || {{pini}} || Connected to [[Regulators#Texas_Instruments_TPS73101DBVRG4_.28Single_Output_LDO.2C_150mA.2C_Adj._1.2-5.5V_SOT23-5.29 | Texas Instruments TPS73101DBVRG4]] pin 5 through coil (+1.6V_BE_VDDA)
|-
| data-sort-value="AP17" | AP17 || {{cellcolors|#333|#fff}} PLL_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP18" | AP18 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP19" | AP19 || SYS_CONFIG2 || BE_SYS_CONF2 || {{pini}} || Resistor 100 ohm to GND
|-
| data-sort-value="AP20" | AP20 || SYS_CONFIG0 || BE_SYS_CONF0 || {{pini}} || Resistor 100 ohm to GND
|-
| data-sort-value="AP21" | AP21 || PSARE2 ||  || {{pino}} || CL1001
|-
| data-sort-value="AP22" | AP22 || TBEN || BE_TBEN || {{pini}} || Resistor 10K to +1.2V_MC2_VDDIO
|-
| data-sort-value="AP23" | AP23 || THERMAL_OVERLOAD_B || BE_THR_ALRT || {{pino}} || Connected to [[Syscon Hardware|Syscon]] pad E9 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]])
|-
| data-sort-value="AP24" | AP24 || TRIGGER_IN || BE_TRG_IN || {{pini}} || Resistor 100 ohm to GND
|-
| data-sort-value="AP25" | AP25 || RC_SCAN_EN ||  || {{pin}} || R1005 470K to GND
|-
| data-sort-value="AP26" | AP26 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AP27" | AP27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP28" | AP28 || {{cellcolors|#333|#fff}} RX4_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP29" | AP29 || {{cellcolors|#c33|#fff}} RX4_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="AP30" | AP30 || {{cellcolors|#c33|#fff}} TX6_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="AP31" | AP31 || {{cellcolors|#333|#fff}} TX6_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP32" | AP32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP33" | AP33 || {{cellcolors|#333|#fff}} RX3_GNDA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP34" | AP34 || {{cellcolors|#c33|#fff}} RX3_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="AP35" | AP35 || TX5_TXN1 || data-sort-value="BE_TX5_TXN1" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AP36" | AP36 || TX5_TXP1 || data-sort-value="BE_TX5_TXP1" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AP37" | AP37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AP38" | AP38 || TX5_TXN2 || data-sort-value="BE_TX5_TXN2" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AP39" | AP39 || TX5_TXP2 || data-sort-value="BE_TX5_TXP2" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AP40" | AP40 || TX5_TXN0 || data-sort-value="BE_TX5_TXN0" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AP41" | AP41 || TX5_TXP0 || data-sort-value="BE_TX5_TXP0" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
! data-sort-value="AP99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AR01" | AR1 || Y1_RQ_CFMN || BE_Y1_RQ_CFMN || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad G4. (Clock From Master)
|-
| data-sort-value="AR02" | AR2 || Y1_RQ_CFMP || BE_Y1_RQ_CFM || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad G3. (Clock From Master)
|-
| data-sort-value="AR03" | AR3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AR04" | AR4 || data-sort-value="Y1_RQ09" {{cellcolors|#ff0}} Y1_RQ9 || data-sort-value="BE_Y1_RQ09" | BE_Y1_RQ9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad H13. 12-bit request/command bus
|-
| data-sort-value="AR05" | AR5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AR06" | AR6 || Y1_RQ_SCK || BE_Y1_RQ_SCK || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad J15. Serial clock
|-
| data-sort-value="AR07" | AR7 || Y1_DQ2_2 || data-sort-value="Y1_XDR1_DQ01" | Y1_XDR1_DQ1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR08" | AR8 || Y1_DQ2_7 || Y1_XDR1_DQ13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR09" | AR9 || Y1_DQ3_0 || data-sort-value="Y1_XDR1_DQ05" | Y1_XDR1_DQ5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR10" | AR10 || Y1_DQ3_7 || data-sort-value="Y1_XDR1_DQ09" | Y1_XDR1_DQ9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR11" | AR11 || {{cellcolors|#333|#fff}} YC_XCLK_EN || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AR12" | AR12 || YC_SCAN_OUT || {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AR13" | AR13 || SPI_SO || BE_SPI_DI || {{pino}} || Connected to [[Syscon Hardware|Syscon]] pad M1 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) through R1013 47
|-
| data-sort-value="AR14" | AR14 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AR15" | AR15 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AR16" | AR16 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AR17" | AR17 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AR18" | AR18 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AR19" | AR19 || SYS_CONFIG1 || BE_SYS_CONF1 || {{pini}} || Resistor 100 ohm to GND
|-
| data-sort-value="AR20" | AR20 || SYS_CONFIG3 || BE_SYS_CONF3 || {{pini}} || Resistor 100 ohm to GND
|-
| data-sort-value="AR21" | AR21 || SPARE1 || {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AR22" | AR22 || PULSE_LIMIT_BYPASS || BE_P_L_BYPASS || {{pini}} || Resistor 10K to +1.2V_MC2_VDDIO
|-
| data-sort-value="AR23" | AR23 || SCAN_ENABLE_BYPASS || BE_SCAN_ENA || {{pini}} || Resistor 100 ohm to GND
|-
| data-sort-value="AR24" | AR24 || TRIGGER_OUT || BE_TRG_OUT || {{pino}} || Resistor 10K ohm to GND
|-
| data-sort-value="AR25" | AR25 || {{cellcolors|#333|#fff}} RC_TEST_MODE_ST || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AR26" | AR26 || RX4_RXP1 || BE_RX4_RXP1 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR27" | AR27 || RX4_RXP3 || BE_RX4_RXP3 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR28" | AR28 || RX4_RXP5 || BE_RX4_RXP5 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR29" | AR29 || RX4_RXP7 || BE_RX4_RXP7 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR30" | AR30 || TX6_TXN5 || BE_TX6_TXN5 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR31" | AR31 || TX6_TXN3 || BE_TX6_TXN3 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR32" | AR32 || TX6_TXN1 || BE_TX6_TXN1 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR33" | AR33 || NT_TST04 || {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AR34" | AR34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AR35" | AR35 || TX5_TXN3 || data-sort-value="BE_TX5_TXN3" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AR36" | AR36 || TX5_TXP3 || data-sort-value="BE_TX5_TXP3" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AR37" | AR37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AR38" | AR38 || TX5_TXCLKN || data-sort-value="BE_TX5_TXCLKN" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AR39" | AR39 || TX5_TXCLKP || data-sort-value="BE_TX5_TXCLKP" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AR40" | AR40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AR41" | AR41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="AR99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AT01" | AT1 || {{cellcolors|#ff0}} Y1_RQ10 || BE_Y1_RQ10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad H3. 12-bit request/command bus
|-
| data-sort-value="AT02" | AT2 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AT03" | AT3 || {{cellcolors|#ff0}} Y1_RQ11 || BE_Y1_RQ11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad H4. 12-bit request/command bus
|-
| data-sort-value="AT04" | AT4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AT05" | AT5 || Y1_RQ_CMD || BE_Y1_RQ_CMD || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad J14. Serial commands
|-
| data-sort-value="AT06" | AT6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AT07" | AT7 || Y1_DQ2N_2 || data-sort-value="Y1_XDR1_DQN01" | Y1_XDR1_DQN1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT08" | AT8 || Y1_DQ2N_7 || Y1_XDR1_DQN13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT09" | AT9 || Y1_DQ3N_0 || data-sort-value="Y1_XDR1_DQN05" | Y1_XDR1_DQN5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT10" | AT10 || Y1_DQ3N_7 || data-sort-value="Y1_XDR1_DQN09" | Y1_XDR1_DQN9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT11" | AT11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AT12" | AT12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AT13" | AT13 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AT14" | AT14 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AT15" | AT15 || {{cellcolors|#d90}} THERMAL_SENSE_POWER || +1.6V_BE_VDDA || {{pini}} || Connected to [[Regulators#Texas_Instruments_TPS73101DBVRG4_.28Single_Output_LDO.2C_150mA.2C_Adj._1.2-5.5V_SOT23-5.29 | Texas Instruments TPS73101DBVRG4]] pin 5
|-
| data-sort-value="AT16" | AT16 || THERMAL_SENSE_TEST ||  || {{pin}} || R1007 1M +/- 0.5% to GND
|-
| data-sort-value="AT17" | AT17 || STI_THERMAL1 || STI_THERMAL1 || {{pino}} || Connected to CELL [[Thermal#CELL_.281st_BE_Primary.29|Temperature Monitor]] pin 3 through 100 ohm resistor
|-
| data-sort-value="AT18" | AT18 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AT19" | AT19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AT20" | AT20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AT21" | AT21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AT22" | AT22 || {{cellcolors|#963|#fff}} MC2_VDDIO || +1.2V_MC2_VDDIO || {{pin}} || Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AT23" | AT23 || {{cellcolors|#963|#fff}} MC2_VDDIO || +1.2V_MC2_VDDIO || {{pin}} || Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AT24" | AT24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AT25" | AT25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AT26" | AT26 || RX4_RXN1 || BE_RX4_RXN1 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT27" | AT27 || RX4_RXN3 || BE_RX4_RXN3 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT28" | AT28 || RX4_RXN5 || BE_RX4_RXN5 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT29" | AT29 || RX4_RXN7 || BE_RX4_RXN7 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT30" | AT30 || TX6_TXP5 || BE_TX6_TXP5 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT31" | AT31 || TX6_TXP3 || BE_TX6_TXP3 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT32" | AT32 || TX6_TXP1 || BE_TX6_TXP1 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT33" | AT33 || RC_VOLREF1 || BE_RC_VOLREF1 || {{pini}} || Resistor 56.2 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="AT34" | AT34 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AT35" | AT35 || TX5_TXN5 || data-sort-value="BE_TX5_TXN5" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AT36" | AT36 || TX5_TXP5 || data-sort-value="BE_TX5_TXP5" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AT37" | AT37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AT38" | AT38 || TX5_TXN6 || data-sort-value="BE_TX5_TXN6" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AT39" | AT39 || TX5_TXP6 || data-sort-value="BE_TX5_TXP6" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AT40" | AT40 || TX5_TXN4 || data-sort-value="BE_TX5_TXN4" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AT41" | AT41 || TX5_TXP4 || data-sort-value="BE_TX5_TXP4" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
! data-sort-value="AT99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AU01" | AU1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU02" | AU2 || {{cellcolors|#a63|#fff}} Y1_DQ2_VREF || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU03" | AU3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU04" | AU4 || {{cellcolors|#984|fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU05" | AU5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU06" | AU6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU07" | AU7 || {{cellcolors|#984|fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU08" | AU8 || {{cellcolors|#984|fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU09" | AU9 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU10" | AU10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU11" | AU11 || {{cellcolors|#984|fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU12" | AU12 || {{cellcolors|#984|fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU13" | AU13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU14" | AU14 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU15" | AU15 || {{cellcolors|#333|#fff}} THERMAL_SENSE_RETURN || GND || {{pini}} || style="color:#888" | Ground
|-
| data-sort-value="AU16" | AU16 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU17" | AU17 || STI_THERMAL0 || STI_THERMAL0 || {{pino}} || Connected to CELL [[Thermal#CELL_.281st_BE_Primary.29|Temperature Monitor]] pin 2 through 100 ohm resistor
|-
| data-sort-value="AU18" | AU18 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU19" | AU19 || {{cellcolors|#953|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AU20" | AU20 || {{cellcolors|#953|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AU21" | AU21 || {{cellcolors|#953|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AU22" | AU22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU23" | AU23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU24" | AU24 || {{cellcolors|#953|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AU25" | AU25 || {{cellcolors|#953|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AU26" | AU26 || {{cellcolors|#973|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU27" | AU27 || {{cellcolors|#973|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU28" | AU28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU29" | AU29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU30" | AU30 || {{cellcolors|#973|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU31" | AU31 || {{cellcolors|#973|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU32" | AU32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU33" | AU33 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AU34" | AU34 || RC_VOLGND1 || BE_RC_VOLGND1 || {{pini}} || Capacitor 0.1u@10v to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="AU35" | AU35 || RX3_RXP7 || data-sort-value="BE_RX3_RXP7" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AU36" | AU36 || RX3_RXN7 || data-sort-value="BE_RX3_RXN7" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AU37" | AU37 || {{cellcolors|#973|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU38" | AU38 || TX5_TXN7 || data-sort-value="BE_TX5_TXN7" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AU39" | AU39 || TX5_TXP7 || data-sort-value="BE_TX5_TXP7" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AU40" | AU40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AU41" | AU41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="AU99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AV01" | AV1 || Y1_DQ2_RLOAD || BE_Y1_DQ2_RLOAD || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="AV02" | AV2 || Y1_DQ2_1 || data-sort-value="Y1_XDR0_DQ01" | Y1_XDR0_DQ1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV03" | AV3 || Y1_DQ2_5 || Y1_XDR0_DQ13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV04" | AV4 || Y1_DQ2_0 || data-sort-value="Y1_XDR0_DQ05" | Y1_XDR0_DQ5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV05" | AV5 || Y1_DQ3_4 || data-sort-value="Y1_XDR0_DQ09" | Y1_XDR0_DQ9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV06" | AV6 || Y1_DQ2_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AV07" | AV7 || Y1_DQ2_3 || Y1_XDR1_DQ11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV08" | AV8 || Y1_DQ3_1 || data-sort-value="Y1_XDR1_DQ07" | Y1_XDR1_DQ7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV09" | AV9 || Y1_DQ3_3 || data-sort-value="Y1_XDR1_DQ03" | Y1_XDR1_DQ3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV10" | AV10 || Y1_DQ3_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AV11" | AV11 || {{cellcolors|#333|#fff}} YC_BYP_ENA || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AV12" | AV12 || {{cellcolors|#333|#fff}} YC_TEST_MODE_ST || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AV13" | AV13 || SPI_SI || BE_SPI_DO || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad N2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]])
|-
| data-sort-value="AV14" | AV14 || TRST || BE_TRST || {{pini}} || Connected to service connector (JTAG)
|-
| data-sort-value="AV15" | AV15 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AV16" | AV16 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AV17" | AV17 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AV18" | AV18 || PLL_CTL1 ||  || {{pin}} || R1009 100 to GND
|-
| data-sort-value="AV19" | AV19 || {{cellcolors|#333|#fff}} TE(TEST ENABLE) || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AV20" | AV20 || POWER_GOOD || BE_POWGOOD || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad P1 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]])
|-
| data-sort-value="AV21" | AV21 || CHECKSTOP_IN_B || BE_CHKSTP_IN || {{pini}} || Resistor 10K to +1.2V_MC2_VDDIO... and others
|-
| data-sort-value="AV22" | AV22 || SPI_CTL1 || BE_SPI_CTL1 || {{pini}} || Resistor 100 ohm to GND
|-
| data-sort-value="AV23" | AV23 || PRSO_UPPER_RIGHT_MODULE || {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AV24" | AV24 || TST_CLK1 ||  || {{pino}} || CL1002
|-
| data-sort-value="AV25" | AV25 || RC_SCAN_IN ||  || {{pin}} || R1008 470K to GND
|-
| data-sort-value="AV26" | AV26 || RX4_RXP0 || BE_RX4_RXP0 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV27" | AV27 || RX4_RXCLKP || BE_RX4_RXCLKP || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV28" | AV28 || RX4_RXP4 || BE_RX4_RXP4 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV29" | AV29 || TX6_TXN7 || BE_TX6_TXN7 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV30" | AV30 || TX6_TXN6 || BE_TX6_TXN6 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV31" | AV31 || TX6_TXCLKN || BE_TX6_TXCLKN || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV32" | AV32 || TX6_TXN2 || BE_TX6_TXN2 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV33" | AV33 || {{cellcolors|#a63|#fff}} RC_ROLREF1 || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AV34" | AV34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AV35" | AV35 || RX3_RXP5 || data-sort-value="BE_RX3_RXP5" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AV36" | AV36 || RX3_RXN5 || data-sort-value="BE_RX3_RXN5" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AV37" | AV37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AV38" | AV38 || RX3_RXP4 || data-sort-value="BE_RX3_RXP4" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AV39" | AV39 || RX3_RXN4 || data-sort-value="BE_RX3_RXN4" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AV40" | AV40 || RX3_RXP6 || data-sort-value="BE_RX3_RXP6" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AV41" | AV41 || RX3_RXN6 || data-sort-value="BE_RX3_RXN6" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
! data-sort-value="AV99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AW01" | AW1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AW02" | AW2 || Y1_DQ2N_1 || data-sort-value="Y1_XDR0_DQN01" | Y1_XDR0_DQN1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW03" | AW3 || Y1_DQ2N_5 || Y1_XDR0_DQN13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW04" | AW4 || Y1_DQ2N_0 || data-sort-value="Y1_XDR0_DQN05" | Y1_XDR0_DQN5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW05" | AW5 || Y1_DQ3N_4 || data-sort-value="Y1_XDR0_DQN09" | Y1_XDR0_DQN9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW06" | AW6 || Y1_DQ2N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AW07" | AW7 || Y1_DQ2N_3 || Y1_XDR1_DQN11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW08" | AW8 || Y1_DQ3N_1 || data-sort-value="Y1_XDR1_DQN07" | Y1_XDR1_DQN7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW09" | AW9 || Y1_DQ3N_3 || data-sort-value="Y1_XDR1_DQN03" | Y1_XDR1_DQN3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW10" | AW10 || Y1_DQ3N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AW11" | AW11 || {{cellcolors|#333|#fff}} YC_SCAN_IN || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AW12" | AW12 || TMS || BE_TMS || {{pini}} || Connected to service connector (JTAG)
|-
| data-sort-value="AW13" | AW13 || TDI || BE_TDI || {{pini}} || Connected to service connector (JTAG)
|-
| data-sort-value="AW14" | AW14 || TDO || BE_TDO || {{pino}} || Connected to service connector (JTAG)
|-
| data-sort-value="AW15" | AW15 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AW16" | AW16 || NT_TST02 || {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AW17" | AW17 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AW18" | AW18 || PLL_CTL0 ||  || {{pin}} || R1011 100 to GND
|-
| data-sort-value="AW19" | AW19 || ATTENTION || BE_INT || {{pino}} || Connected to [[Syscon Hardware|Syscon]] pad T2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]])
|-
| data-sort-value="AW20" | AW20 || HARD_RESET || BE_HARD_RESET || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad P2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]])
|-
| data-sort-value="AW21" | AW21 || CHECKSTOP_OUT_B || BE_CHKSTP_OUT || {{pino}} || Resistor 10K to +1.2V_MC2_VDDIO
|-
| data-sort-value="AW22" | AW22 || SPI_CTL0 || BE_SPI_CTL0 || {{pini}} || Resistor 100 ohm to GND
|-
| data-sort-value="AW23" | AW23 || GRID_TEST || {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AW24" | AW24 || TST_CLK0 ||  || {{pino}} || CL1003
|-
| data-sort-value="AW25" | AW25 || RC_SCAN_OUT || {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AW26" | AW26 || RX4_RXN0 || BE_RX4_RXN0 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW27" | AW27 || RX4_RXCLKN || BE_RX4_RXCLKN || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW28" | AW28 || RX4_RXN4 || BE_RX4_RXN4 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW29" | AW29 || TX6_TXP7 || BE_TX6_TXP7 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW30" | AW30 || TX6_TXP6 || BE_TX6_TXP6 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW31" | AW31 || TX6_TXCLKP || BE_TX6_TXCLKP || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW32" | AW32 || TX6_TXP2 || BE_TX6_TXP2 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW33" | AW33 || RC_RLOAD1 || BE_RC_RLOAD1 || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="AW34" | AW34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AW35" | AW35 || RX3_RXP3 || data-sort-value="BE_RX3_RXP3" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AW36" | AW36 || RX3_RXN3 || data-sort-value="BE_RX3_RXN3" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AW37" | AW37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AW38" | AW38 || RX3_RXCLKP || data-sort-value="BE_RX3_RXCLKP" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AW39" | AW39 || RX3_RXCLKN || data-sort-value="BE_RX3_RXCLKN" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AW40" | AW40 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AW41" | AW41 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
! data-sort-value="AW99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="AY01" | AY1 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AY02" | AY2 || Y1_DQ2_4 || Y1_XDR0_DQ11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY03" | AY3 || Y1_DQ2_6 || data-sort-value="Y1_XDR0_DQ07" | Y1_XDR0_DQ7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY04" | AY4 || Y1_DQ3_2 || Y1_XDR0_DQ15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY05" | AY5 || Y1_DQ3_5 || data-sort-value="Y1_XDR0_DQ03" | Y1_XDR0_DQ3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY06" | AY6 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AY07" | AY7 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AY08" | AY8 || Y1_DQ3_6 || Y1_XDR1_DQ15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY09" | AY9 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AY10" | AY10 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AY11" | AY11 || {{cellcolors|#333|#fff}} YC_RSRV0 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="AY12" | AY12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AY13" | AY13 || SPI_CLK || BE_SPI_CLK || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad N1 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) through R1014 0
|-
| data-sort-value="AY14" | AY14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AY15" | AY15 || PLL_REFCLK_B || BE_PLL_REFCLK_N || {{pini}} || Connected to [[Timebases#ICS_ICS9218AGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9218AGLFT]] (IC5003) pin 24
|-
| data-sort-value="AY16" | AY16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AY17" | AY17 || NT_TST01 || {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AY18" | AY18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AY19" | AY19 || EXT_CLK_EN ||  || {{pin}} || R1012 100 to GND
|-
| data-sort-value="AY20" | AY20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AY21" | AY21 || {{cellcolors|#963|#fff}} MC2_VDDIO || +1.2V_MC2_VDDIO || {{pin}} || Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AY22" | AY22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AY23" | AY23 || {{cellcolors|#963|#fff}} MC2_VDDIO || +1.2V_MC2_VDDIO || {{pin}} || Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AY24" | AY24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AY25" | AY25 || RC_REFCLKN || BE_RC_REFCLK_N || {{pini}} || Connected to [[Timebases#ICS_ICS9214DGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9214DGLFT]] pin 24
|-
| data-sort-value="AY26" | AY26 || RX4_RXP2 || BE_RX4_RXP2 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY27" | AY27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AY28" | AY28 || RX4_RXP6 || BE_RX4_RXP6 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY29" | AY29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AY30" | AY30 || TX6_TXN4 || BE_TX6_TXN4 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY31" | AY31 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AY32" | AY32 || TX6_TXN0 || BE_TX6_TXN0 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY33" | AY33 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="AY34" | AY34 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AY35" | AY35 || RX3_RXP1 || data-sort-value="BE_RX3_RXP1" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AY36" | AY36 || RX3_RXN1 || data-sort-value="BE_RX3_RXN1" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AY37" | AY37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AY38" | AY38 || RX3_RXP0 || data-sort-value="BE_RX3_RXP0" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AY39" | AY39 || RX3_RXN0 || data-sort-value="BE_RX3_RXN0" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AY40" | AY40 || RX3_RXP2 || data-sort-value="BE_RX3_RXP2" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
| data-sort-value="AY41" | AY41 || RX3_RXN2 || data-sort-value="BE_RX3_RXN2" {{cellcolors|#eee|#888}} N/C || {{pinnc}} || data-sort-value="Z" style="color:#888" | Not Connected
|-
! data-sort-value="AY99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|-
| data-sort-value="BA01" | BA1 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA02" | BA2 || Y1_DQ2N_4 || Y1_XDR0_DQN11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA03" | BA3 || Y1_DQ2N_6 || data-sort-value="Y1_XDR0_DQN07" | Y1_XDR0_DQN7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA04" | BA4 || Y1_DQ3N_2 || Y1_XDR0_DQN15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA05" | BA5 || Y1_DQ3N_5 || data-sort-value="Y1_XDR0_DQN03" | Y1_XDR0_DQN3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA06" | BA6 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA07" | BA7 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="BA08" | BA8 || Y1_DQ3N_6 || Y1_XDR1_DQN15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA09" | BA9 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="BA10" | BA10 || {{cellcolors|#933|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA11" | BA11 || {{cellcolors|#333|#fff}} YC_RSRV1 || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="BA12" | BA12 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="BA13" | BA13 || TCK || BE_TCK || {{pini}} || Connected to service connector (JTAG)
|-
| data-sort-value="BA14" | BA14 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="BA15" | BA15 || PLL_REFCLK || BE_PLL_REFCLK_P || {{pini}} || Connected to [[Timebases#ICS_ICS9218AGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9218AGLFT]] (IC5003) pin 25
|-
| data-sort-value="BA16" | BA16 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="BA17" | BA17 || PLL_BGA ||  || {{pino}} || CL1004
|-
| data-sort-value="BA18" | BA18 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="BA19" | BA19 || EXT_CLK ||  || {{pin}} || R1015 49.9 +/- 1%
|-
| data-sort-value="BA20" | BA20 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="BA21" | BA21 || {{cellcolors|#953|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="BA22" | BA22 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="BA23" | BA23 || {{cellcolors|#953|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="BA24" | BA24 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="BA25" | BA25 || RC_REFCLKP || BE_RC_REFCLK_P || {{pini}} || Connected to [[Timebases#ICS_ICS9214DGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9214DGLFT]] pin 23
|-
| data-sort-value="BA26" | BA26 || RX4_RXN2 || BE_RX4_RXN2 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA27" | BA27 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="BA28" | BA28 || RX4_RXN6 || BE_RX4_RXN6 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA29" | BA29 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="BA30" | BA30 || TX6_TXP4 || BE_TX6_TXP4 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA31" | BA31 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="BA32" | BA32 || TX6_TXP0 || BE_TX6_TXP0 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA33" | BA33 || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="Z" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZ" style="color:#888" | Missing pad
|-
| data-sort-value="BA34" | BA34 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA35" | BA35 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="BA36" | BA36 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="BA37" | BA37 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA38" | BA38 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
| data-sort-value="BA39" | BA39 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA40" | BA40 || {{cellcolors|#943|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA41" | BA41 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || style="color:#888" | Ground
|-
! data-sort-value="BA99" style="line-height:2em; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" | &nbsp; || data-sort-value="ZZZ" style="border-left:hidden" | &nbsp;
|}
''remark: the following Pad #letter's are not used: I, O, Q, S, X, Z, AI, AO, AQ, AS, AX, AZ''
</div>

'''Gallery'''
<gallery>
File:CELL-GRID.png|CELL grid raw/bare sketch 
</gallery>

<noinclude>[[Category:Templates]]</noinclude>