Editing Template:CELL pad layout 65nm
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! style="border-top:hidden; background-position:50%" | !! style="padding-right:0px" | Internal !! style="padding-right:0px" | External !! style="border-top:hidden; background-position:50%" | !! style="border-top:hidden; background-position:50%" | | ! style="border-top:hidden; background-position:50%" | !! style="padding-right:0px" | Internal !! style="padding-right:0px" | External !! style="border-top:hidden; background-position:50%" | !! style="border-top:hidden; background-position:50%" | | ||
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| data-sort-value="0A01" | A1 || | | data-sort-value="0A01" | A1 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3 | ||
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| data-sort-value="0A02" | A2 || || || {{pin}} || | | data-sort-value="0A02" | A2 || || || {{pin}} || |