Editing Talk:PS2 Emulation
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The ingame FMVs with the graphic overlay are still stuttering heavily, though, and I am still unsure why. It seems like the shorter FMVs run fine, and the longer they are they more they have slowdown/stutter. This only applies to the "ingame" FMVs and not the opening ones. | The ingame FMVs with the graphic overlay are still stuttering heavily, though, and I am still unsure why. It seems like the shorter FMVs run fine, and the longer they are they more they have slowdown/stutter. This only applies to the "ingame" FMVs and not the opening ones. | ||
===ps2_netemu command 0x12=== | ===ps2_netemu command 0x12=== | ||
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b end_134844 | b end_134844 | ||
Value from 0x20(r31) is later used in compare. That result in cdvd error, or in setting which seems schedule event to happen after time from timebase pass. This event is netemu syscall 8 (0x200) which is related to all ps2 cdvd reads. Tl;dr is that value give emulator some more time before cdvd error. Weird thing is that PS button fix it.. --[[User:Kozarovv|Kozarovv]] ([[User talk:Kozarovv|talk]]) 07:05, 7 March 2022 (UTC) | Value from 0x20(r31) is later used in compare. That result in cdvd error, or in setting which seems schedule event to happen after time from timebase pass. This event is netemu syscall 8 (0x200) which is related to all ps2 cdvd reads. Tl;dr is that value give emulator some more time before cdvd error. Weird thing is that PS button fix it.. --[[User:Kozarovv|Kozarovv]] ([[User talk:Kozarovv|talk]]) 07:05, 7 March 2022 (UTC) | ||
===ps2_netemu command 0x3D=== | |||
Looks like we misunderstood this command earlier, and probably we don't even need it. | |||
There seems to be no emu code that make use of it beside printing config revision. This need confirmation on real hardware. In case that missing 0x3D will fail, it will be good to test at least that is really version enforcer, because i can't find part of code that is eventually responsible for that. | |||
* Some time ago I tested the config with version 0x3D89 which contained commands supported from the version 0x40DC onwards. The console hung up right after LV2 reset.--[[User:Agrippa|Agrippa]] ([[User talk:Agrippa|talk]]) 10:16, 24 April 2022 (UTC) | |||
** Any chance you can test this again? Config parser don't have any check for revision, when it hit 0x3D is just storing value on address that seems to be related only to UI/Menu stuff. While i can imagine some check for overall config version (still I searched and it seems to be none), i can't imagine some additional per command revision check. Which is what your test suggest here. Emulator have only one config parser, one config buffer, and one check for command number (0x51 and above still don't trigger panic yet, just ignore command). I also tried to find version numbers of 15686, 16604, 16808, 16916, 17041, 17179, 17277, 17495 in code (as hex of course), and only 17495 is found in function that is not really related to any check (described here at the end: [[Talk:PS2_Emulation#Netemu_2]] ). [[User:Kozarovv|Kozarovv]] ([[User talk:Kozarovv|talk]]) 15:06, 24 April 2022 (UTC)-- | |||
*** You are right. There is no revision check and the 0x3D command is not needed at all for the config to work.--[[User:Agrippa|Agrippa]] ([[User talk:Agrippa|talk]]) 18:14, 5 May 2022 (UTC) | |||
**** We figured that out 2000 custom configs too late. :D Anyway, thanks for confirming that. --[[User:Kozarovv|Kozarovv]] ([[User talk:Kozarovv|talk]]) 17:30, 9 May 2022 (UTC) | |||
===ps2_netemu command 0x4D=== | |||
Leaving this here just in case. Fixed comments version. | |||
0xD7F8 RGBAQ_01_and_11: | |||
0xD7F8 | |||
0xD800 move r80, r3 ; move new values to r80 | |||
0xD820 ilhu r19, 0x7FFF | |||
0xD824 lqr r20, Q_val_cfg_plus4 | |||
0xD82C iohl r19, 0xFFFF | |||
0xD834 and r17, r80, r19 ; r17 = Q & 0x7FFFFFFF | |||
0xD840 ceqi r15, r17, 0 ; if r17 == 0, r15 = 0xFFFFFFF, else 0 | |||
0xD844 lqr r10, ST_Q | |||
0xD84C cwd r9, 0x30+var_30+8(sp) ; Prepare correct write | |||
0xD850 rotqbyi r16, r20, 4 ; load cmd value from config to r16 | |||
0xD858 and r12, r15, r16 ; r15 & value_from_cfg | |||
0xD860 or r5, r80, r12 ; r80(Q) | r12(value from cfg or 0) | |||
0xD868 shufb r7, r5, r10, r9 ; select ST bits + new Q | |||
0xD870 stqr r7, ST_Q ; store result as Q value in STQ | |||
===ps2_gxemu command 0x19=== | ===ps2_gxemu command 0x19=== | ||
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== Emu Patches == | == Emu Patches == | ||
===Display current PC/RA values for r5900=== | ===Display current PC/RA values for r5900=== | ||
Line 1,970: | Line 1,947: | ||
B452CCB51348127DAF8A931B621E5E39 | B452CCB51348127DAF8A931B621E5E39 | ||
DL: https://www.mediafire.com/file/kpno5mubyy7q9p0/gx_cfg_ext.ppf/file | DL: https://www.mediafire.com/file/kpno5mubyy7q9p0/gx_cfg_ext.ppf/file | ||
== SPE programs dumper == | == SPE programs dumper == | ||
Line 1,986: | Line 1,956: | ||
== Random ps2_netemu notes == | == Random ps2_netemu notes == | ||
* Some members of pcsx2 team think that emulator is heavily based on early pcsx2. After some reversing this seems to be far away from true. But COP2 and VU0 (and only that for now) really are familiar here and there. To the point where i was able to use pcsx2 code to find names/usage of some variables (mVUbranch for example). But VU0/COP2 is for now only part that have obvious pcsx2 similarities. For example VU1 is different story, and don't even share code with VU0 part of emulator as far as i see. | |||
* Emulator not only patch SPU programs on init, but also patch own PPU code. Which is hard to understand when you can just make changes in source code... eg. 0x1F128 - 0x1F134 in latest emu. | * Emulator not only patch SPU programs on init, but also patch own PPU code. Which is hard to understand when you can just make changes in source code... eg. 0x1F128 - 0x1F134 in latest emu. | ||
* GUI seems to be tied to GIF/GS emulation. That research was inspired by Dolphin progress report, and it seems to be correct. Fe/be (frontend/backend) spus are involved here. Which explain some UI slowdowns on GIF intensive games. | * GUI seems to be tied to GIF/GS emulation. That research was inspired by Dolphin progress report, and it seems to be correct. Fe/be (frontend/backend) spus are involved here. Which explain some UI slowdowns on GIF intensive games. | ||
* Emulator is full of unused functions. Everything that is compiled inline its also there as separate unreachable function. | * Emulator is full of unused functions. Everything that is compiled inline its also there as separate unreachable function. | ||
===Registers=== | ===Registers=== | ||
It seems that emulator try to keep lower 64 bits of some r5900 registers in specific ppc registers. At least at the time when recompiler is running, also when 0x01 command run. | It seems that emulator try to keep lower 64 bits of some r5900 registers in specific ppc registers. At least at the time when recompiler is running, also when 0x01 command run. | ||
Line 2,030: | Line 1,999: | ||
Register that handle ACC is taken from different pool (same pool as all vfXX regs when in COP2 mode) with param 32 as reg nr (not real reg, probably part of one of vXX regs). | Register that handle ACC is taken from different pool (same pool as all vfXX regs when in COP2 mode) with param 32 as reg nr (not real reg, probably part of one of vXX regs). | ||
Most likely those regs are flushed to memory when COP2 opcode is running, for sure they are flushed when VU0 microprogram is running. | Most likely those regs are flushed to memory when COP2 opcode is running, for sure they are flushed when VU0 microprogram is running. | ||
== RSX workload on the netemu == | == RSX workload on the netemu == | ||
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* Yes, i don't see why not. Assuming that is static patch to elf file, not some cobra style on the fly patch. But don't expect some magic from that. I don't know too much about RSX and not really much about GS. But PS2 emulation is usually limited by CPU power, specially in native resolution. But for example games that need 0x44 cmd, maybe they will work with smoothing now. Maybe some minor slowdowns will be fixed. I still don't know which parts of GS are emulated on RSX, for example softemu used something similar to pcsx2 software render. So there you will get almost nothing from RSX OC. But netemu is different. --[[User:Kozarovv|Kozarovv]] ([[User talk:Kozarovv|talk]]) 04:56, 20 March 2022 (UTC) | * Yes, i don't see why not. Assuming that is static patch to elf file, not some cobra style on the fly patch. But don't expect some magic from that. I don't know too much about RSX and not really much about GS. But PS2 emulation is usually limited by CPU power, specially in native resolution. But for example games that need 0x44 cmd, maybe they will work with smoothing now. Maybe some minor slowdowns will be fixed. I still don't know which parts of GS are emulated on RSX, for example softemu used something similar to pcsx2 software render. So there you will get almost nothing from RSX OC. But netemu is different. --[[User:Kozarovv|Kozarovv]] ([[User talk:Kozarovv|talk]]) 04:56, 20 March 2022 (UTC) | ||
** Tested the 600/750 MHz overclock with a few intensive games (SC3, ToCA3, CMR3, VP2, GT4). Assuming the patches are correctly applied (I have no idea at all), there is no performance boost at all.--[[User:Agrippa|Agrippa]] ([[User talk:Agrippa|talk]]) 15:24, 29 May 2022 (UTC) | ** Tested the 600/750 MHz overclock with a few intensive games (SC3, ToCA3, CMR3, VP2, GT4). Assuming the patches are correctly applied (I have no idea at all), there is no performance boost at all.--[[User:Agrippa|Agrippa]] ([[User talk:Agrippa|talk]]) 15:24, 29 May 2022 (UTC) | ||
== Netemu load/store with r0 register == | == Netemu load/store with r0 register == | ||
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ld r0, -0x6BF0(r0) # load to r0 from address 0xFFFFFFFFFFFF9410, no matter what r0 actually is at the moment. | ld r0, -0x6BF0(r0) # load to r0 from address 0xFFFFFFFFFFFF9410, no matter what r0 actually is at the moment. | ||
ld r4, 0x3008(r0) # load to r4 from address 0x3008, no matter what r0 actually is at the moment. | ld r4, 0x3008(r0) # load to r4 from address 0x3008, no matter what r0 actually is at the moment. | ||
== ps2_gxemu external bios/rom loading. == | == ps2_gxemu external bios/rom loading. == | ||
Line 2,272: | Line 2,175: | ||
* '''Dance Summit 2001: Bust-a-Move''' | * '''Dance Summit 2001: Bust-a-Move''' | ||
** Front buffer is not flushed most of the time. Game seems to apply additional effects there, apart from the downsampling. | ** Front buffer is not flushed most of the time. Game seems to apply additional effects there, apart from the downsampling. | ||
== Stuntman/Driv3r research == | == Stuntman/Driv3r research == | ||
Line 2,383: | Line 2,284: | ||
Cycles are count in function located at 0x17C9D0 (latest netemu). Emitter with addi to r13 register is what we are looking for. Since pcsx2 use different "unit", lets just call cycles here a... unit. | Cycles are count in function located at 0x17C9D0 (latest netemu). Emitter with addi to r13 register is what we are looking for. Since pcsx2 use different "unit", lets just call cycles here a... unit. | ||
________________________________________________ | |||
| Opcode type | | | Opcode type | Netemu/Gxemu | PCSX2 | | ||
|----------------| | |----------------|-----------------|-------------| | ||
| Default opcode | 1 unit | | Default opcode | 1 unit | 9 units | | ||
| Load/Store | 2 units | | Load/Store | 2 units | 14 units | | ||
| Multiply | 4 units | | Multiply | 4 units | 16 units | | ||
| Divide | 37 units | | Divide | 37 units | 112 units | | ||
| COP 0 | 1 unit | | COP 0 | 1 unit | 7 units | | ||
| COP 1 | 1 unit(some 2) | | COP 1 | 1 unit(some 2) | 7 units | | ||
| COP 2 | 1 unit | | COP 2 | 1 unit | 7 untis | | ||
-------------------------------------------------- | |||
Additionally pcsx2 use different cycles for many other opcodes that ps3 emus just count as one. | Additionally pcsx2 use different cycles for many other opcodes that ps3 emus just count as one. | ||
Line 2,403: | Line 2,303: | ||
At the second hand gx/net emu do some weird shenigans with cycles based on... Opcode number, this is still small unknown here. Yeah... | At the second hand gx/net emu do some weird shenigans with cycles based on... Opcode number, this is still small unknown here. Yeah... | ||
Underclocking/Overclocking could be done by modifying opcodes at 0x17CEB0, 0x17CFF8, 0x17D4C8. | Underclocking/Overclocking could be done by modifying opcodes at 0x17CEB0, 0x17CFF8, 0x17D4C8. | ||
Line 2,616: | Line 2,502: | ||
4000 = SPC_PUINT_MB | 4000 = SPC_PUINT_MB | ||
5000 = SPC_CSR1 | 5000 = SPC_CSR1 | ||
|| | |||
|- | |- | ||
| SPC_CSR | | SPC_CSR | ||
Line 2,637: | Line 2,524: | ||
4000 = SPC_PUINT_MB | 4000 = SPC_PUINT_MB | ||
5000 = SPC_CSR1 | 5000 = SPC_CSR1 | ||
|| | |||
|- | |- | ||
| SPC_CSR | | SPC_CSR | ||
Line 3,028: | Line 2,916: | ||
|| | || | ||
|- | |- | ||
| | | ? | ||
|| 0xAAA700C0000 | || 0xAAA700C0000 | ||
|| 0xAAA70100000 | || 0xAAA70100000 | ||
|| 0x4200030000001 | || 0x4200030000001 | ||
|| | || | ||
|- | |- | ||
| | | ? | ||
|| 0xAAA70100000 | || 0xAAA70100000 | ||
|| 0xAAA70140000 | || 0xAAA70140000 | ||
|| 0x4200040000001 | || 0x4200040000001 | ||
|| | || | ||
|- | |- | ||
| | | ? | ||
|| 0xAAA70140000 | || 0xAAA70140000 | ||
|| 0xAAA70180000 | || 0xAAA70180000 | ||
|| 0x4200050000001 | || 0x4200050000001 | ||
|| | || | ||
|- | |- | ||
| | | ? | ||
|| 0xAAA70180000 | || 0xAAA70180000 | ||
|| 0xAAA701C0000 | || 0xAAA701C0000 | ||
|| 0x4200060000001 | || 0x4200060000001 | ||
|| | || | ||
|- | |- | ||
| | | ? | ||
|| 0xAAA701C0000 | || 0xAAA701C0000 | ||
|| 0xAAA70200000 | || 0xAAA70200000 | ||
|| 0x4200070000001 | || 0x4200070000001 | ||
|| | || | ||
|- | |- | ||
| | | ? | ||
|| 0xAAA70200000 | || 0xAAA70200000 | ||
|| 0xAAA70280000 | || 0xAAA70280000 | ||
|| 0x4200090000001 | || 0x4200090000001 | ||
|| | || | ||
|- | |- | ||
| | | ? | ||
|| 0xAAA70280000 | || 0xAAA70280000 | ||
|| 0xAAA702C0000 | || 0xAAA702C0000 | ||
|| 0x42000A0000001 | || 0x42000A0000001 | ||
|| | || | ||
|- | |- | ||
| | | ? | ||
|| 0xAAA70080000 | |||
|| 0xAAA700C0000 | |||
|| 0x42000B0000001 | |||
|| | |||
|- | |||
| ? | |||
|| 0xAAA702C0000 | || 0xAAA702C0000 | ||
|| 0xAAA70300000 | || 0xAAA70300000 | ||
|| 0x42000B0000001 | || 0x42000B0000001 | ||
|| | || | ||
|- | |||
| ? | |||
|| 0xAAA70000000 | |||
|| 0xAAA70040000 | |||
|| 0x4200000000001 | |||
|| | |||
|- | |||
| ? | |||
|| 0xAAA70040000 | |||
|| 0xAAA70080000 | |||
|| 0x4200010000001 | |||
|| | |||
|- | |- | ||
|} | |} | ||
Line 3,267: | Line 3,155: | ||
0xFFFFFFFFFFFFF0EC = D_STAT full | 0xFFFFFFFFFFFFF0EC = D_STAT full | ||
0xFFFFFFFFFFFFF0F0 = D_STAT upper 16 bits | 0xFFFFFFFFFFFFF0F0 = D_STAT upper 16 bits | ||