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= System Memory (RAM) = | = System Memory (RAM) = | ||
<div style="float:right">[[File:XDR-quad to CELLBE to SouthBridge diagram.png|200px|thumb|left|XDR-quad to CELLBE to SouthBridge diagram of PS3 FAT and early PS3 Slim's CECH-20..A/DYN-001]]<br />[[File:XDR-dual to CELLBE to SouthBridge diagram.png|200px|thumb|left|XDR-dual to CELLBE to SouthBridge diagram since CECH-21..A/SUR-001]]<br />[[File:X5116AC-3C-E.jpg|200px|thumb|left|XDR-quad memory<br />[[CECHGxx]] / [[SEM-00x|SEM-001]]]]</div> | |||
== Chipnumers @ SKU's == | == Chipnumers @ SKU's == | ||
The PS3 has 256MB of 64 bit bus Rambus XDR main system memory. Older models use four 64MB chips, while newer models uses two 128MB chips. | |||
The PS3 has | |||
{|class="wikitable | {|class="wikitable" | ||
|- | |- | ||
! PS3 Model !! Mobo Model !! RAM Serial !! Amount !! Notes | ! PS3 Model !! Mobo Model !! Mobo serial !! RAM Serial !! Amount !! Notes | ||
|- | |- | ||
| [[CECHAxx | | [[CECHAxx]] || [[COK-00x#COK-001|COK-001]] || 1-871-868-12<br />1-871-868-22<br />1-871-868-32 || [[X5116ACSE-3C-E]]<br /> or<br />[[K4Y50164UC-JCB3 ]] || style="text-align:center;" | 4 || | ||
|- | |- | ||
| [[ | | [[CECHBxx]] || [[COK-00x#COK-001|COK-001]] || 1-871-868-12<br />1-871-868-22<br />1-871-868-32 || [[X5116ACSE-3C-E]]<br /> or<br />[[K4Y50164UC-JCB3 ]] || style="text-align:center;" | 4 || | ||
|- | |- | ||
| [[ | | [[CECHCxx]] || [[COK-00x#COK-002|COK-002]] || 1-873-513-21<br />1-873-513-31 || [[X5116ACSE-3C-E]]<br /> or<br />[[K4Y50164UC-JCB3 ]] || style="text-align:center;" | 4 || | ||
|- | |- | ||
| | | style="text-align:center; background-color:lightgrey;" | <span style="background-color:lightgrey;">[[CECHDxx]]</span> || colspan="6" style="text-align:center; background-color:lightgrey;" | <span style="background-color:lightgrey;">SKU never released</span> | ||
|- | |- | ||
| [[ | | [[CECHExx]] || [[COK-00x#COK-002W|COK-002W]] || || [[X5116ACSE-3C-E]]<br /> or<br />[[K4Y50164UC-JCB3 ]] || style="text-align:center;" | 4 || | ||
|- | |- | ||
| | | style="text-align:center; background-color:lightgrey;" | <span style="background-color:lightgrey;">[[CECHFxx]]</span> || colspan="6" style="text-align:center; background-color:lightgrey;" | <span style="background-color:lightgrey;">SKU never released</span> | ||
|- | |- | ||
| [[ | | [[CECHGxx]] || [[SEM-00x|SEM-001]] || 1-875-384-21<br />1-875-384-31 || [[X5116ACSE-3C-E]] || style="text-align:center;" | 4 || | ||
|- | |- | ||
| [[ | | [[CECHHxx]] || [[DIA-00x#DIA-001|DIA-001]] || 1-875-368-11<br />1-875-368-31 || [[X5116ADSE-3C-E]] || style="text-align:center;" | 4 || | ||
|- | |- | ||
| | | style="text-align:center; background-color:lightgrey;" | <span style="background-color:lightgrey;">[[CECHIxx]]</span> || colspan="6" style="text-align:center; background-color:lightgrey;" | <span style="background-color:lightgrey;">SKU never released</span> | ||
|- | |- | ||
| [[ | | [[CECHJxx]] || [[DIA-00x#DIA-002|DIA-002]] || 1-876-912-32 || [[K4Y50164UE-JCB3]] || style="text-align:center;" | 4 || | ||
|- | |- | ||
| | | [[CECHKxx]] || [[DIA-00x#DIA-002|DIA-002]] || 1-876-912-32 || [[K4Y50164UE-JCB3]] || style="text-align:center;" | 4 || | ||
|- | |- | ||
| [[ | | [[CECHLxx]] || [[VER-00x|VER-001]] || 1-878-196-31<br />1-878-196-41 || [[X5116ADSE-3C-E]]<br /> or<br />[[IDRD51-0-A1F1C-32C]] || style="text-align:center;" | 4 || | ||
|- | |- | ||
| [[ | | [[CECHMxx]] || [[VER-00x|VER-001]] || 1-878-196-31<br />1-878-196-41 || [[X5116ADSE-3C-E]] || style="text-align:center;" | 4 || | ||
|- | |- | ||
| | | style="text-align:center; background-color:lightgrey;" | <span style="background-color:lightgrey;">[[CECHNxx]]</span> || colspan="6" style="text-align:center; background-color:lightgrey;" | <span style="background-color:lightgrey;">SKU never released</span> | ||
|- | |- | ||
| | | style="text-align:center; background-color:lightgrey;" | <span style="background-color:lightgrey;">[[CECHOxx]]</span> || colspan="6" style="text-align:center; background-color:lightgrey;" | <span style="background-color:lightgrey;">SKU never released</span> | ||
|- | |- | ||
| | | [[CECHPxx]] || [[VER-00x|VER-001]] || 1-878-196-31<br />1-878-196-41 || [[X5116ADSE-3C-E]] || style="text-align:center;" | 4 || | ||
|- | |- | ||
| [[ | | [[CECHQxx]] || [[VER-00x|VER-001]] || 1-878-196-31<br />1-878-196-41 || [[X5116ADSE-3C-E]] || style="text-align:center;" | 4 || | ||
|- | |- | ||
| [[CECH- | | [[CECH-20xx]] || [[DYN-00x|DYN-001]] || 1-880-055-31 || [[X5116ADSE-3C-E]] || style="text-align:center;" | 4 || | ||
|- | |- | ||
| [[CECH- | | [[CECH-21xx]] || [[SUR-00x|SUR-001]] || 1-881-945-11 || [[X1032BASE-3C-F]] || style="text-align:center;" | 2 || | ||
|- | |- | ||
| [[CECH- | | [[CECH-25xx]] || [[JTP-00x|JTP-001]] || 1-882-481-31 || [[X1032BASE-3C-F#Elpida X1032BASE-3CA2-F|X1032BASE-3CA2-F ]] || style="text-align:center;" | 2 || | ||
|- | |- | ||
| [[CECH- | | [[CECH-25xx]] || [[JSD-00x|JSD-001]] || 1-882-770-11 || [[X1032BASE-3C-F]] || style="text-align:center;" | 2 || | ||
|- | |- | ||
| | | [[CECH-30xx]] || [[KTE-00x|KTE-001]] || 1-884-749-11 || [[X1032BASE-3C-F]] || style="text-align:center;" | 2 || | ||
|- | |- | ||
| [[CECH-43xx]] || [[ | | [[CECH-40xx]] || [[MSX-00x|MSX-001]] || 1-886-928-11 || [[X1032BBBG-3C-F]] || style="text-align:center;" | 2 || | ||
|- | |||
| [[CECH-40xx]] || [[MPX-00x|MPX-001]] || 1-887-233-11 || [[X1032BBBG-3C-F]] || style="text-align:center;" | 2 || | |||
|- | |||
| [[CECH-42xx]] || [[NPX-00x|NPX-001]] || 1-887-357-11 || [[X1032BBBG-3C-F]] || style="text-align:center;" | 2 || | |||
|- | |||
| [[CECH-42xx]] || [[PQX-00x|PQX-001]] || 1-888-629-11 || [[X1032BBBG-3C-F]] || style="text-align:center;" | 2 || | |||
|- | |||
| [[CECH-43xx]] || [[REX-00x|REX-001]] || 1-893-507-31 || [[K4Y12324TE-KCB3]] || style="text-align:center;" | 2 || | |||
|- | |- | ||
|} | |} | ||
<gallery> | <gallery> | ||
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= Video Memory (VRAM) = | = Video Memory (VRAM) = | ||
<div style="float:right">[[File:GDDR3 to RSX to CellBE diagram.png| | <div style="float:right">[[File:GDDR3 to RSX to CellBE diagram.png|200px|thumb|left|Quad 64MB GDDR3 (256MB total) to RSX to CellBE diagram ]]<br />[[File:RSX_MEMORY.jpg|200px|thumb|left|RSX bare die<br />GPU in centre<br />4x GDDR3]]</div> | ||
The 256MB of GDDR3 memory is located inside the [[RSX]] chip using four 64MB FBGA chips. | The 256MB of GDDR3 memory is located inside the [[RSX]] chip using four 64MB FBGA chips. | ||
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= PS2 Compatibility Memory = | = PS2 Compatibility Memory = | ||
See: [[PS2 Compatibility]] | See: [[PS2 Compatibility]] | ||
{{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude> | {{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude> |