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Emulation of Playstation 2 is currently handled by 3 kind of emulators. CECH-A/B models use ps2_emu.self able to use built-in PS2 hardware (EE/GS/Rambus memory), and have best compatibility. CECH-C/E use ps2_gxemu, this emulator use physical Graphic Synthesizer found in this ps3 model, but Emotion Engine is fully emulated here, also there is no Rambus memory. All other models emulate PS2 thru fully software based ps2_netemu used for ps2 classics, and hacked now to use decrypted ISO files. Earlier before Sony provided ps2 classics on PS Store there was another soft only emulator strongly based on ps2_gxemu. It was called ps2_softemu, and had support for original PS2 CDVD. Only emulator not able to run physical discs is ps2_netemu.  
Emulation of Playstation 2 is currently handled by 3 kind of emulators. CECH-A/B models use ps2_emu.self able to use built-in PS2 hardware (EE/GS/Rambus memory), and have best compatibility. CECH-C/E use ps2_gxemu, this emulator use physical Graphic Synthesizer found in this ps3 model, but Emotion Engine is fully emulated here, also there is no Rambus memory. All other models emulate PS2 thru fully software based ps2_netemu used for ps2 classics, and hacked now to use decrypted ISO files. Earlier before Sony provided ps2 classics on PS Store there was another soft only emulator strongly based on ps2_gxemu. It was called ps2_softemu, and had support for original PS2 CDVD. Only emulator not able to run physical discs is ps2_netemu.  


Emulators are self files, but not typical one. Emulators are not truly PS3 Game OS elf executables, but Guest OS'es running on LV1 of PS3. This mean that LV2, or more friendly Game OS is unloaded before emulator is loaded. This also mean that while emulators are running we can't call any LV2 function. Also LV1 syscalls are limited to call from all emulators, but can be fully unlocked.
Emulators are self files, but not typical one. Emulators are not truly PS3 Game OS elf executables, but Guest OS'es running on LV1 of PS3. This mean that LV2, or more friendly Game OS is unloaded before emulator is loaded. This also mean that while emulators are running we can't call any LV2 function. Also LV1 syscalls are limited to call from all emulators, but can be fully unlocked.  


All emulators use built-in stripped developement version of PS2 BIOS with disabled debug functions that can affect some games. This is done because some games print debug info on screen when found that are run on dev bios. Bios between ps2_emu, and ps2_gxemu/ps2_netemu are different. Ps2_emu BIOS is able to run only on ps2emu version of emulator due to RDRAM check.
All emulators use built-in stripped developement version of PS2 BIOS with disabled debug functions that can affect some games. This is done because some games print debug info on screen when found that are run on dev bios. Bios between ps2_emu, and ps2_gxemu/ps2_netemu are different. Ps2_emu BIOS is able to run only on ps2emu version of emulator due to RDRAM check.


PS3 models without Emotion Engine unit use "SPE-compatible SIMD graphics-rounding mode for VMX/Altivec Instructions" for FPU, and VU0 emulated floats calculations. This is set on emulator init by HV call 97 with param 1. VU1 actually run at SPE core so no compatibility mode need (or can) to be set. SPE compatible mode for PPE mean that rounding mode is set as round to zero, denormals are treated as zero, and there are no infinities or NaNs. So theoretically what PS2 FPU/VU was originally. Although SPE and PPE SPE compatibility mode is still inaccurate comparing to PS2, because Sony decided to cut off 2 guard bits from calculations on PS2. Probably because there was no need for round and sticky bits (no Nan/Inf, one round mode, etc.). Additionally float divide algorithm is custom and not fully understood up to this day. Good example here are TriAce games, or Castlevania COD where SPE calculation is wrong by 1 bit making games unplayable without patch. This are PS2 math algo specific inaccuracies in FPU/VU implementation that are not present on any other hardware.
PS3 models without Emotion Engine unit use "SPE-compatible SIMD graphics-rounding mode for VMX/Altivec Instructions" for FPU, and VU0 emulated floats calculations. This is set on emulator init by HV call 97 with param 1. VU1 actually run at SPE core so no compatibility mode need (or can) to be set. SPE compatible mode for PPE mean that rounding mode is set as round to zero, denormals are treated as zero, and there are no infinities or NaNs. So literally what PS2 VU was originally. Although SPE, and PPE SPE compatibility mode can still be inaccurate comparing to PS2. Good example here are TriAce games, or Castlevania COD where SPE calculation is wrong by 1 bit making games unplayable without patch. This is due to some PS2 math algo specific inaccuracies in FPU/VU implementation that are not present on any other hardware.


Note:  
Note:  
* not available in early Tool/DECR and Debug/DEX firmwares. But available in AV TOOL firmware since 1.00
* not available in early Tool/DECR and Debug/DEX firmwares. But available in AV TOOL firmware since 1.00
* Emulation is based on a SCPH-50000/SCPH-20401 Playstation 2 Model.
* Emulation is based on a SCPH-50000/SCPH-20401 Playstation 2 Model.
* [https://web.archive.org/web/20211118050305/http://unina.stidue.net/Universita'%20di%20Trieste/Ingegneria%20Industriale%20e%20dell'Informazione/Tuzzi/Architetture_Avanzate_dei_Calcolatori/Emotion_2.pdf Introduction to PlayStation2 Architecture.pdf]
* [http://unina.stidue.net/Universita'%20di%20Trieste/Ingegneria%20Industriale%20e%20dell'Informazione/Tuzzi/Architetture_Avanzate_dei_Calcolatori/Emotion_2.pdf Introduction to PlayStation2 Architecture.pdf]
* ps2tek docs - https://psi-rockin.github.io/ps2tek/
* ps2tek docs - https://psi-rockin.github.io/ps2tek/


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{{PS2 emulators workload comparison}}
{{PS2 emulators workload comparison}}


==PS2 Emulator Types and Revisions==
==PS2 Emulators types and versions==
 
{| cellspacing="0" cellpadding="2" border="1" class="wikitable" style="text-align: center;"
<div>
<div style="float:top; text-align:center;">'''PS2 Emulator Types and Revisions'''</div>
<div style="float:left; width:28%;">
{| class="wikitable" style="font-size:xx-small;"
|+ ps2_emu.elf (decrypted)
! Firmware !! Bytes !! MD5 !! Timestamp !! <abbr title="Revision">Rev</abbr> !! <abbr title="Maximun number of supported commands">Comm</abbr>
|-
|-
! [[1.00_AV|1.00 AV]]
! colspan="4" | PS2_EMU
| 8 258 328 || 19DC714F1109FF772BEF5B00C4AF2CF7 || 06/10/04/12:15 || ? || ?
|-
|-
! [[1.02_CEX|1.02]]
! FW version !! TOC !!  Notes
| 8.258.504 || FF9C1C465DF6F501E418602A488CBD40 || 06/10/21/00:01 || ? || ?
|-
|-
! [[1.10_CEX|1.10]]
| 1.00 AV || 0x7C3150 ||
| 8.254.568 || 72EFF1FB3E9A175253687634B698CC91 || 06/11/09/06:08 || ? || ?
|-
|-
! [[1.11_CEX|1.11]]
| 1.02 || 0x7C31F0 ||
| 8.255.192 || 98BCC06ACA07971DFE57A126000B6DEE || 06/11/21/17:54 || ? || ?
|-
|-
! [[1.30_CEX|1.30]]
| 1.10 || 0x7C2168 ||
| 8.787.800 || 3F1E943139329E8AD5461FA43DB4DD0E || 06/12/05/05:33 || rowspan="2" | same || rowspan="2" | ?
|-
|-
! [[1.30_AV|1.30 AV]]
| 1.11 || 0x7C23C8 ||
| 8.787.800 || F2CE2D8CF41FF38E586AE7A91A13980C || 06/12/05/07:15
|-
|-
! [[1.31_CEX|1.31]]
| 1.30 || 0x8442E8 ||
| 8.790.440 || CF13D31F202DA3C55009C06B6A2B27A0 || 06/12/12/18:47 || ? || ?
|-
|-
! [[1.32_CEX|1.32]]
| 1.30 AV || 0x8442E8 ||
| 8.794.664 || 6DD631EEDE321AC7F59C85BC6AC0DCA9 || 06/12/18/05:54 || ? || ?
|-
|-
! [[1.50_CEX|1.50]]
| 1.31 || 0x844C98 ||
| 8.805.912 || 81B38EE824E460385B44FADE78CAA5DC || 07/01/18/22:52 || ? || ?
|-
|-
! ?
| 1.32 || 0x845CA0 ||
| ? || ? || ? || ? || ?
|-
|-
! [[1.70_CEX|1.70]]
| 1.50 || 0x848728 ||
| 8.854.680 || CEACBB22EB450C5CC587C193CE7BBE91 || 07/04/16/16:11 || ? || ?
|-
|-
! ?
| 1.90 || 0x4D7ED8 ||
| ? || ? || ? || ? || ?
|-
|-
! [[1.90_CEX|1.90]]
| 3.66 - 3.74 || 0x4E9A20 ||
| 5.190.280 || 88B26FDC910B8633613BC366D39F439D || 07/07/21/06:44 || ? || ?
|-
|-
! ?
| 4.00 - 4.01 || 0x4EADB8 ||
| ? || ? || ? || ? || ?
|-
|-
! [[2.10_CEX|2.10]]
| 4.10 - 4.11 || 0x4EAD28 ||
| 5.223.112 || CB1924E7163F01EA2DD3965918BACCE4 || 07/12/15/05:29 || ? || ?
|-
|-
! ?
| 4.20 - 4.21 || 0x4EAE30 ||
| ? || ? || ? || ? || ?
|-
|-
! [[3.40_CEX|3.40]]
| 4.23 || 0x4EACE0 ||
| 5.267.128 || 916603300F798139456FCF1A40384A97 || 10/06/23/15:44 || ? || ?
|-
|-
! ?
| 4.25 || 0x4EAE30 || Reverted to 4.20 - 4.21 version?
| ? || ? || ? || ? || ?
|-{{cellcolors|#ddddff}}
! [[3.66_CEX|3.66]]
| rowspan="3" | 5.267.112 || BE20230D091F5C8AB8364607D49A6992 || 11/06/16/03:51 || rowspan="3" | same || rowspan="3" | ?
|-{{cellcolors|#ddddff}}
! ~
| colspan="2" style="text-align:center; background-color:#ddddff;" | ''Any''
|-{{cellcolors|#ddddff}}
! [[3.74_CEX|3.74]]
| 5B2CA12EE08298094177667C681BC75F || 11/10/25/00:30
|-{{cellcolors|#bbbbff}}
! [[4.00_CEX|4.00]]
| rowspan="2" | 5.272.152 || 08516640BE636F3E633C0416F09EF941 || 11/11/22/03:10 || rowspan="2" | same || rowspan="2" | ?
|-{{cellcolors|#bbbbff}}
! [[4.01_CEX|4.01]]
| 61ECD51036247547736274EEB52FA4C4 || 11/12/23/01:02
|-{{cellcolors|#ddddff}}
! [[4.10_CEX|4.10]]
| rowspan="2" | 5.272.008 || 88CFD465D2F412C075C69531278BB3A9 || 12/02/05/23:08 || rowspan="2" | same || rowspan="2" | ?
|-{{cellcolors|#ddddff}}
! [[4.11_CEX|4.11]]
| 2B45F72675B844C08E1735059F9826E3 || 12/02/11/07:05
|-{{cellcolors|#bbbbff}}
! [[4.20_CEX|4.20]]
| rowspan="2" | 5.272.264 || 23D3F9909EBA3F1AB0D757850C5D6809 || 12/06/15/02:01 || rowspan="2" | same || rowspan="2" | ?
|-{{cellcolors|#bbbbff}}
! [[4.21_CEX|4.21]]
| 110F0D01B39193F1A2031BBC7ADBBC2F || 12/06/30/01:06
|-
|-
! [[4.23_SEX|4.23 S]]
| 4.78 - 4.82 || 0x4EB8C0 ||
| 5.271.912 || 783201F2541117E545B8E01B3A0B1955 || 12/07/31/00:17 || ? || ?
|-
|-
! [[4.25_CEX|4.25]]
! colspan="4" | PS2_GXEMU
| 5.272.264 || C895EAA3F79BA2040D6C828A5B811139 || 12/09/07/06:55 || ? || ?
|-
|-
! ?
! FW version !! TOC !!  Notes
| ? || ? || ? || ? || ?
|-
|-
! ?
| 1.50 || 0x5BDFC8 ||
| ? || ? || ? || ? || ?
|-
|-
! ?
| 1.90 || 0x666C78 ||
| ? || ? || ? || ? || ?
|-
|-
! colspan="6" style="background:#80ff80; line-height:75%" | Abandoned (last revision)
| 3.66 - 3.74 || 0x6766B8 ||
|-{{cellcolors|#ddddff}}
! [[4.78_CEX|4.78]]
| rowspan="3" | 5.274.984 || ABC9228FCEA0E779E3157CA546A1FD02 || 15/12/17/01:14 || rowspan="3" | same || rowspan="3" | ?
|-{{cellcolors|#ddddff}}
! ~
| colspan="2" style="text-align:center; background-color:#ddddff;" | ''Any''
|-{{cellcolors|#ddddff}}
! [[4.89_CEX|4.89]]
| 7523DE6D38B13B9C4B9F72419C50D4A7 || 22/02/04/14:35
|}
<span style="font-size:small">
{{dot}}'''Decrypted (elf)''': changes <abbr title="when comparing two decrypted files of the same revision from different firmwares the only difference is the build label">every firmware version</abbr><br>
{{dot}}'''<abbr title="0x20 bytes">Build label</abbr>''': yes, with timestamp, search for '''ps2ver:'''<br>
{{dot}}'''Target Firmware''': no/unknown<br>
{{dot}}'''Revision''': unknown
</span>
</div>
<div style="float:left; width:24%;">
{| class="wikitable" style="font-size:xx-small;"
|+ ps2_gxemu.elf (decrypted)
! Firmware !! Bytes !! MD5 !! <abbr title="Revision">Rev</abbr> !! <abbr title="Maximun number of supported commands">Comm</abbr>
|-
|-
! [[1.00_CEX|1.00]] ~ [[1.32_CEX|1.32]]
| 4.00 - 4.11 || 0x677990 ||
| colspan="4" {{no}}
|-
|-
! [[1.50_CEX|1.50]]
| 3.66 - 3.74 || 0x677AA8 ||
| 6.106.040 || BACC208C8A793F82D71F85B02DD2D318 || ? || ?
|-
|-
! ?
| 4.78 - 4.82 || 0x678548 ||  
| ? || ? || ? || ?
|-
|-
! [[1.70_CEX|1.70]]
! colspan="4" | PS2_SOFTEMU
| 6.763.336 || B70A15512EF9FA74B798A5E9241FE571 || ? || ?
|-
|-
! ?
! FW version !! TOC !!  Notes
| ? || ? || ? || ?
|-
|-
! [[1.90_CEX|1.90]]
| 1.90 || 0x5C7B10 ||
| 6.802.720 || B9E2CC8D72779650D9B500B75AE552EB || ? || ?
|-
|-
! ?
| 2.50 || 0x5C7ED8 ||
| ? || ? || ? || ?
|-
|-
! [[2.10_CEX|2.10]]
| 3.41 || 0x5C8C00 ||  
| 6.822.576 || E34C4EB587CCE44AB4B92D848DC391A7 || ? || ?
|-
|-
! ?
| 3.66 - 3.71 || 0x5C8EC0 ||
| ? || ? || ? || ?
|-
|-
! [[3.40_CEX|3.40]]
| 3.72 - 4.01 || 0x5C8E40 ||
| 6.866.424 || 80091C68E2F8D2385A2125AB38085A3C || ? || ?
|-
|-
! ?
! colspan="4" | PS2_NETEMU
| ? || ? || ? || ?
|-
|-
! [[3.66_CEX|3.66]] ~ [[3.74_CEX|3.74]]
! FW version !! TOC !!  Notes
| 6.867.024 || E04FA0FE63A968C53AE366B3AAD0141A || ? || ?
|-
|-
! [[4.00_CEX|4.00]] ~ [[4.11_CEX|4.11]]
| 3.73 - 3.74 || 0x7D8B00 ||
| 6.871.848 || D5E97019132848203970213FF96F2AAB || ? || ?
|-
|-
! [[4.20_CEX|4.20]] ~ [[4.25_CEX|4.25]]
| 4.00 - 4.01 || 0x7DA200 ||
| 6.872.128 || 678F16283CAA8CFBC03A5FBCB6ABA41E || ? || ?
|-
|-
! ?
| 4.10 - 4.11 || 0x7DA180 ||
| ? || ? || ? || ?
|-
|-
! ?
| 4.20 - 4.25 || 0x7DA500 ||
| ? || ? || ? || ?
|-
|-
! ?
| 4.78 - 4.83 || 0x751280 ||  
| ? || ? || ? || ?
|-
! colspan="6" style="background:#80ff80; line-height:75%" | Abandoned (last revision)
|-
|-
! [[4.78_CEX|4.78]] ~ [[4.89_CEX|4.89]]
| 6.874.848 || C7681420A7B3A2A6E3BF89F4A12A3DD6 || ? || 0x2B ?
|}
|}
<span style="font-size:small">
 
{{dot}}'''Decrypted (elf)''': changes <abbr title="when comparing two decrypted files of the same revision from different firmwares there are no differences">every emu revision</abbr><br>
==General observations regarding PS2 Classics emulator (ps2_netemu)==
{{dot}}'''<abbr title="0x20 bytes">Build label</abbr>''': no/unknown<br>
* Virtual memory cards are per title based, but apparently run through the current memory card system. The module used to manage memory cards is: vmc_savedata_plugin.sprx - Using a regular memory card that has been renamed result in a "The save data is corrupt (8XXXXXXX) error"
{{dot}}'''Target Firmware''': no/unknown<br>
* Loads an epilepsy warning before PS2 logo (PS button menu appears during epilepsy warning if controller is synced)
{{dot}}'''Revision''': unknown
* Does not support online functionality of PS2 titles (network configuration utility inside Full Spectrum Warrior claims no network adaptor has been found, same with Syphon Filter: The Omega Strain).
</span>
 
</div><div style="float:left; width:24%;">
- Only file that is needed in the folder for PS2 Classics is "iso.bin.enc". Removing the manuals/DXT files will cause the game to boot IMMEDIATELY to the PS2 logo upon switching to 720p/starting PS2 LPAR.
{| class="wikitable" style="font-size:xx-small;"
 
|+ ps2_softemu.elf (decrypted)
===LIMG Segment===
! Firmware !! Bytes !! MD5 !! <abbr title="Revision">Rev</abbr> !! <abbr title="Maximun number of supported commands">Comm</abbr>
The ISO.BIN.ENC have a block of 0x4000 bytes added at the end codenamed "LIMG" that works as a descriptor of the ISO structure
 
{| class="wikitable"
|-
|-
! [[1.00_CEX|1.00]] ~ [[1.82_CEX|1.82]]
! Offset !! Lenght !! Name !! Example !! Description
| colspan="4" {{no}}
|-
|-
! [[1.90_CEX|1.90]] ~ [[1.94_CEX|1.94]]
| 0x00 || 0x4 || '''magic''' || LIMG || '''L'''ogical '''IM'''a'''G'''e (layout) ?
| 6.142.080 || 812330515D01291488315BBE7E0F339E || 11065 || ?
|-
|-
! [[1.97_CEX|1.97]]
| 0x04 || 0x4 || '''img_type''' || 0x00000001 || 1=DVD<br>2=CD
| ? || ? || ? || ?
|-
|-
! [[2.00_CEX|2.00]] ~ [[2.10_CEX|2.10]]
| 0x08 || 0x4 || '''sector_count''' || 0x00279890 || ''sector_count = img_size / sector_size''
| 6.143.048 || C0964350E3E8EA80EB5C7CB34901E9DE || 11830 || ?
|-
|-
! [[2.16_CEX|2.16]]
| 0x0C || 0x4 || '''sector_size''' || 0x0000800 || ''sector_size = img_size / sector_count''<br>0x800=DVD (Mode1/2048)<br>0x930=CD (Mode2/2352)
| ? || ? || ? || ?
|-
|-
! ? ~ ?
| 0x10 || 0x3FF0 || ''padding'' || 0x00000000... ||  
| ? || ? || ? || ?
|}
|-
! [[3.10_CEX|3.10]]
| ? || ? || ? || ?
|-
! [[3.15_CEX|3.15]]
| ? || ? || 12840 || ?
|-
! [[3.16_CEX|3.16]]
| ? || ? || ? || ?
|-
! ? ~ ?
| ? || ? || ? || ?
|-
! [[3.40_CEX|3.40]]
| 6.146.424 || 97C33E83E14399EED1BD4F5351443E1C || ? || ?
|-
! [[3.41-1_CEX|3.41]] ~ [[3.65_CEX|3.65]]
| ? || ? || 13474 || ?
|-
! [[3.66_CEX|3.66]] ~ [[3.71_CEX|3.71]]
| 6.147.120 || 513B9160AD8C199CAEFC82C1B7D9D794 || 15435 || ?
|-
! [[3.72_CEX|3.72]] ~ [[4.01_CEX|4.01]]
| 6.146.992 || 1232D3EEB48F301CBB61D76EB3046111 || 15529 || ?
|-
! [[4.10_CEX|4.10]]  ~ {{latestPS3}}
| colspan="4" {{no}}
|}
<span style="font-size:small">
{{dot}}'''Decrypted (elf)''': changes <abbr title="when comparing two decrypted files of the same revision from different firmwares there are no differences">every emu revision</abbr><br>
{{dot}}'''<abbr title="0x20 bytes">Build label</abbr>''': no/unknown<br>
{{dot}}'''Target Firmware''': no/unknown<br>
{{dot}}'''Revision''': unknown
</span>
</div><div style="float:left; width:24%;">
{| class="wikitable" style="font-size:xx-small;"
|+ ps2_netemu.elf (decrypted)
! Firmware !! Bytes !! MD5 !! <abbr title="Revision">Rev</abbr> !! <abbr title="Maximun number of supported commands">Comm</abbr>
|-
! [[1.00_CEX|1.00]] ~ [[3.66_CEX|3.66]]
| colspan="4" {{no}}
|-
! [[3.70_CEX|3.70]] ~ [[3.71_CEX|3.71]]
| 11.036.504 || 0D021D18CC63DDBDA530A93C41ABF865 || <abbr title="build r15686-gif-xdr-user2-usb3">15686</abbr> || rowspan="5" | 0x41
|-
! [[3.72_CEX|3.72]]
| 11.036.504 || 38EABD7E5F998BC04922CA3B70211208 || <abbr title="build r15842-target370">15842</abbr>
|-
! [[3.73_CEX|3.73]] ~ [[3.74_CEX|3.74]]
| 11.036.504 || F21110A93BBEA416749283E6BF3D3C6B || <abbr title="build r15936-target370">15936</abbr>
|-
! [[4.00_CEX|4.00]] ~ [[4.01_CEX|4.01]]
| 11.033.048 || F770442DFA626282B01FEBE3DDFFC477 || <abbr title="build r16195-target400">16195</abbr>
|-
! [[4.10_CEX|4.10]] ~ [[4.11_CEX|4.11]]
| 11.033.216 || 8F0885BCC80A3617E654BB6151F4F718 || <abbr title="build r16361-target410">16361</abbr>
|-
! [[4.20_CEX|4.20]] ~ [[4.23_SEX|4.23]]
| 11.033.728 || 8EB5492E453C50B6D728E7999A57A689 || <abbr title="build r16604-target420">16604</abbr> || rowspan="2" | 0x43
|-
! [[4.25_CEX|4.25]] ~ [[4.26_SEX|4.26]]
| 11.033.728 || E38059300E31432A62967770C3E99EF6 || <abbr title="build r16740-target420">16740</abbr>
|-
! [[4.30_CEX|4.30]] ~ [[4.31_CEX|4.31]]
| ? || ? || 16808 || 0x45
|-
! [[4.40_CEX|4.40]] ~ [[4.41_CEX|4.41]]
| ? || ? || 16916 || 0x46
|-
! [[4.45_CEX|4.45]] ~ [[4.46_CEX|4.46]]
| ? || ? || 17041 || 0x48
|-
! [[4.50_CEX|4.50]]
| ? || ? || 17179 || 0x4A
|-
! [[4.55_CEX|4.55]]
| ? || ? || 17277 || rowspan="2" | 0x4D
|-
! [[4.60_CEX|4.60]] ~ [[4.76_CEX|4.76]]
| ? || ? || 17314
|-
! colspan="6" style="background:#80ff80; line-height:75%" | Abandoned (last revision)
|-
! [[4.78_CEX|4.78]] ~ [[4.89_CEX|4.89]]
| 10.442.536 || 8B2DBD1AAD22A0EDCF9C867A1A1FB94D || <abbr title="build r17495-main-rel">17495</abbr> || 0x50
|}
<span style="font-size:small">
{{dot}}'''Decrypted (elf)''': changes <abbr title="when comparing two decrypted files of the same revision from different firmwares there are no differences">every emu revision</abbr><br>
{{dot}}'''<abbr title="0x20 bytes">Build label</abbr>''': yes, without timestamp, search for '''build r'''<br>
{{dot}}'''Target Firmware''': included in the build label<br>
{{dot}}'''Revision''': yes, <abbr title="the location can be seen by comparing 4.23 (value 0x40DC) with 4.25 (value 0x4164) at offset 0x3E4BA in both">'''one''' time</abbr>, and included in the build label
</span>
</div>
</div>
<br style="clear: both;" />


*Alternative tables<!-- What means TOC ?, is needed to explain it and/or include this TOC info in the other tables -->
===folder/file layout===
{| class="wikitable" style="float:left; margin:5px"
(in this example GTA San Andreas Classic)
|+ps2_emu.self
<pre>
! FW version !! TOC !!  Notes
[NPUD20946]
|-
      [USRDIR]
| 1.00 AV || 0x7C3150 ||
            [CONTENT]
|-
                    001.dxt
| 1.02 || 0x7C31F0 ||
                    002.dxt
|-
                    003.dxt
| 1.10 || 0x7C2168 ||
                    004.dxt
|-
                    005.dxt
| 1.11 || 0x7C23C8 ||
                    006.dxt
|-
                    007.dxt
| 1.30 || 0x8442E8 ||
                    008.dxt
|-
                    009.dxt
| 1.30 AV || 0x8442E8 ||
                    010.dxt
|-
                    011.dxt
| 1.31 || 0x844C98 ||
                    012.dxt
|-
                    013.dxt
| 1.32 || 0x845CA0 ||
                    014.dxt
|-
                    015.dxt
| 1.50 || 0x848728 ||
                    016.dxt
|-
                    017.dxt
| 1.90 || 0x4D7ED8 ||
                    Others.dxt
|-
                    Manual.idx
| 3.66 - 3.74 || 0x4E9A20 ||
            [SAVEDATA]
|-
                    SCEVMC0.VME
| 4.00 - 4.01 || 0x4EADB8 ||
                    SCEVMC1.VME
|-
            CONFIG
| 4.10 - 4.11 || 0x4EAD28 ||
            ISO.BIN.EDAT
|-
            ISO.BIN.ENC
| 4.20 - 4.21 || 0x4EAE30 ||
      PS3LOGO.DAT
|-
      PARAM.SFO
| 4.23 || 0x4EACE0 ||
      ICON0.PNG
|-
      PIC0.PNG
| 4.25 || 0x4EAE30 || Reverted to 4.20 - 4.21 version?
      PIC1.PNG
|-
      PIC2.PNG
| 4.78 - 4.82 || 0x4EB8C0 ||
</pre>
|}


{| class="wikitable" style="float:left; margin:5px"
==Virtual PS2 (emulated machine) usage and features==
|+ps2_gxemu.self
! FW version !! TOC !!  Notes
|-
| 1.50 || 0x5BDFC8 ||
|-
| 1.90 || 0x666C78 ||
|-
| 3.66 - 3.74 || 0x6766B8 ||
|-
| 4.00 - 4.11 || 0x677990 ||
|-
| 3.66 - 3.74 || 0x677AA8 ||
|-
| 4.78 - 4.82 || 0x678548 ||
|}


{| class="wikitable" style="float:left; margin:5px"
===Video Modes===
|+ps2_softemu.self
'''Note:''' Real PS2 : http://users.neoscientists.org/~blue/ps2videomodes.txt
! FW version !! TOC !!  Notes
|-
| 1.90 || 0x5C7B10 ||
|-
| 2.50 || 0x5C7ED8 ||
|-
| 3.41 || 0x5C8C00 ||
|-
| 3.66 - 3.71 || 0x5C8EC0 ||
|-
| 3.72 - 4.01 || 0x5C8E40 ||
|}


{| class="wikitable" style="float:left; margin:5px"
Video Modes
|+ps2_netemu.self
----.-----------.---------------.-----------.-----------.
! FW version !! TOC !! Notes
  No | Name      | Resolution | fV(Hz)    | fH(kHz)  |
|-
----+-----------+---------------+-----------+-----------|
| 3.73 - 3.74 || 0x7D8B00 ||
  0 | NTSC-NI  |  640x240(224) | 59.940    | 15.734    |
|-
  1 | NTSC-I    | 640x480(448) | 59.820    | 15.734    |
| 4.00 - 4.01 || 0x7DA200 ||
  2 | PAL-NI    |  640x288(256) | 50.000    | 15.625    |
|-
  3 | PAL-I    |  640x576(512) | 49.760    | 15.625    |
| 4.10 - 4.11 || 0x7DA180 ||
  4 | VESA-1A  |  640x480      | 59.940    | 31.469    |
|-
  5 | VESA-1C  |  640x480      | 75.000    | 37.500    |
| 4.20 - 4.25 || 0x7DA500 ||
  6 | VESA-2B  |  800x600      | 60.317    | 37.879    |
|-
  7 | VESA-2D  | 800x600      | 75.000    | 46.875    |
| 4.78 - 4.83 || 0x751280 ||  
  8 | VESA-3B  | 1024x768      | 60.004    | 48.363    |
|}{{clear}}
  9 | VESA-3D  | 1024x768      | 75.029    | 60.023    |
  10 | VESA-4A  | 1280x1024    | 60.020    | 63.981    |
  11 | VESA-4B  | 1280x1024    | 75.025    | 79.976    |
  12 | DTV-480P  |  720x480      | 59.940    | 31.469    |
  13 | DTV-1080I | 1920x1080    | 60.000    | 33.750    |
  14 | DTV-720P  | 1280x720      | ??        | ??        |
----^-----------^---------------^-----------^-----------'


==General observations regarding PS2 Classics emulator (ps2_netemu)==
==Memory Mapping==
* Virtual memory cards are per title based, but apparently run through the current memory card system. The module used to manage memory cards is: vmc_savedata_plugin.sprx - Using a regular memory card that has been renamed result in a "The save data is corrupt (8XXXXXXX) error"
* Loads an epilepsy warning before PS2 logo (PS button menu appears during epilepsy warning if controller is synced)
* Does not support online functionality of PS2 titles (network configuration utility inside Full Spectrum Warrior claims no network adaptor has been found, same with Syphon Filter: The Omega Strain).


- Only file that is needed in the folder for PS2 Classics is "iso.bin.enc". Removing the manuals/DXT files will cause the game to boot IMMEDIATELY to the PS2 logo upon switching to 720p/starting PS2 LPAR.
=== ps2netemu ===  
 
Mapping ELF @ 0x200000000
===LIMG Segment===
The ISO.BIN.ENC has a block of 0x4000 bytes added at the end codenamed "LIMG" that works as a descriptor for the ISO structure


{| class="wikitable"
{| class="wikitable"
|-
|-
! Offset !! Length !! Name !! Example !! Description
! Name !! ea !! lpar2(netemu 4.81) !! size !! flags !! lpar1(lv1 4.81)
|-
|-
| 0x00 || 0x4 || '''magic''' || LIMG || '''L'''ogical '''IM'''a'''G'''e (layout) ?
| text          ||         0x0 ||     0x3D00000 || 0x300000(  3 MB) || 0x8000000000000003  0000000000000003 || 0x7D00000
|-
|-                                                                                                                 
| 0x04 || 0x4 || '''img_type''' || 0x00000001 || 1=DVD<br>2=CD
| ro_work      ||    0x300000 ||      0x300000 ||  0x500000(  5 MB) || 0x0000000000000003  0000000000000003 || 0x4300000
|-
|-                                                                                                                 
| 0x08 || 0x4 || '''sector_count''' || 0x00279890 || ''sector_count = img_size / sector_size''
| rw_work      ||    0x800000 ||      0x800000 || 0x2A00000( 42 MB) || 0x0000000000000001  0000000000000003 || 0x4800000
|-
|-                                                                                                                 
| 0x0C || 0x4 || '''sector_size''' || 0x0000800 || ''sector_size = img_size / sector_count''<br>0x800=DVD (Mode1/2048)<br>0x930=CD (Mode2/2352)
| negmem        ||  0x1FFF0000 ||      0x3210000 ||  0x10000( 64 KB) || 0x0000000000000001  0000000000000000 || 0x7210000
|-
|-                                                                                                                 
| 0x10 || 0x3FF0 || ''padding'' || 0x00000000... ||  
| ee_ram        ||  0x100000000 || 0x64000E000000 || 0x2000000( 32 MB) || 0x0000000000000001  0000000000000000 || 0x3C00000 - 0x3F00000, 0x8000000 - 0x9B00000
|}
|-                                                                                                                 
 
| ee_jit_code  ||  0xD00000000 || 0x680024000000 || 0x3000000( 48 MB) || 0x8000000000000001  0000000000000003 || 0xBC00000 - 0xEB00000
===folder/file layout===
|-                                                                                                                 
(in this example GTA San Andreas Classic)
| vu0_jit_code  ||  0xD08000000 || 0x580000800000 ||  0x400000(  4 MB) || 0x8000000000000001  0000000000000003 || 0x900000 - 0xC00000
<pre>
|-                                                                                                                 
[NPUD20946]
| vu0_jit_data  ||  0xD0C000000 ||      0x3700000 ||  0x400000(  4 MB) || 0x0000000000000002  0000000000000003 || 0x7700000
       [USRDIR]
|-                                                                                                                 
            [CONTENT]
| eeram_jit_lut ||  0xE00000000 || 0x640010000000 || 0x2000000( 32 MB) || 0x0000000000000001  0000000000000003 || 0x9C00000 - 0xBB00000
                    001.dxt
|-                                                                                                                
                    002.dxt
| eerom_jit_lut ||  0xE0FC00000 || 0x580000C00000 || 0x400000(  4 MB) || 0x0000000000000001  0000000000000003 || 0xD00000 - 0x1000000
                    003.dxt
|-                                                                                                                
                    004.dxt
| ee_dbg_ram    || 0x90FFF8000 || 0x64000E078000 ||   0x8000( 32 KB) || 0x0000000000000001  0000000000000000 ||  
                    005.dxt
|-                                                                                                                
                    006.dxt
| iop_ram      || 0x400000000 ||     0x3300000 || 0x200000(  2 MB) || 0x0000000000000001  0000000000000000 || 0x7300000
                    007.dxt
|-                                                                                                                 
                    008.dxt
| iop_rom      ||  0x50FC00000 || 0x580001000000 ||  0x400000( 4 MB) || 0x0000000000000001  0000000000000002 || 0x1100000 - 0x1400000
                    009.dxt
|-                                                                                                                 
                    010.dxt
| iop_spad      ||  0x50F800000 ||      0x3220000 ||  0x10000( 64 KB) || 0x0000000000000001  0000000000000002 || 0x7220000
                    011.dxt
|-                                                                                                                
                    012.dxt
| spu2_ram      ||  0x600000000 ||     0x3500000 || 0x200000(  2 MB) || 0x0000000000000001  0000000000000000 || 0x7500000
                    013.dxt
|-                                                                                                                 
                    014.dxt
| spu2_ram2    ||  0x600200000 ||      0x3500000 ||  0x200000(  2 MB) || 0x0000000000000001  0000000000000000 || 0x7500000
                    015.dxt
|-                                                                                                                 
                    016.dxt
| spu2_pcm      || 0x1000000000 ||      0x3230000 ||  0x10000( 64 KB) || 0x0000000000000001  0000000000000000 || 0x7230000
                    017.dxt
|-                                                                                                                 
                    Others.dxt
| ee_spr_lo    ||  0x700000000 ||      0x3201000 ||    0x2000(  8 KB) || 0x0000000000000001  0000000000000000 || 0x7201000
                    Manual.idx
|-                                                                                                                 
            [SAVEDATA]
| ee_spr       ||  0x800000000 ||      0x3203000 ||    0x6000( 24 KB) || 0x0000000000000001  0000000000000000 || 0x7203000
                    SCEVMC0.VME
|-                                                                                                                 
                    SCEVMC1.VME
| ee_vu0_dmem0  ||  0x301004000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
            CONFIG
|-                                                                                                                 
            ISO.BIN.EDAT
| ee_vu0_dmem1  ||  0x301005000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
            ISO.BIN.ENC
|-                                                                                                                 
      PS3LOGO.DAT
| ee_vu0_dmem2  ||  0x301006000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
      PARAM.SFO
|-                                                                                                                 
      ICON0.PNG
| ee_vu0_dmem3  ||  0x301007000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
       PIC0.PNG
|-                                                                                                                 
      PIC1.PNG
| ee_rom        ||  0x30FC00000 || 0x580001000000 ||  0x400000(  4 MB) || 0x0000000000000001  0000000000000001 || 0x1100000 - 0x1400000
      PIC2.PNG
|-                                                                                                                 
</pre>
| vrc          ||  0xC00000000 || 0x600005000000 || 0x1000000( 16 MB) || 0x0000000000000001  0000000000000000 || 0x1500000 - 0x2400000
|-                                                                                                                 
| /dev/zero    || 0x4000000000 ||      0x3240000 ||  0x10000( 64 KB) || 0x0000000000000001  0000000000000001 || 0x7240000
|-                                                                                                                 
| dma_vu0_dmem0 || 0x4001004000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
|-                                                                                                                 
| dma_vu0_dmem1 || 0x4001005000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
|-                                                                                                                 
| dma_vu0_dmem2 || 0x4001006000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
|-                                                                                                                 
| dma_vu0_dmem3 || 0x4001007000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
|-                                                                                                                 
| imm_vu0_dmem0 ||  0x30000000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
|-                                                                                                                         
| imm_vu0_dmem1 ||  0x30001000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
|-                                                                                                                         
| imm_vu0_dmem2 ||  0x30002000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
|-                                                                                                                         
| imm_vu0_dmem3 ||  0x30003000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
|-                                                                                                                         
| SGSXdr       || 0x1904000000 || 0x64000C000000 || 0x1700000( 23 MB) || 0x0000000000000001  0000000000000000 || 0x2500000 - 0x3B00000
|-                                                                                                                         
| iopTrace      || 0x1400000000 ||      0x3250000 ||  0x10000( 64 KB) || 0x0000000000000001  0000000000000000 || 0x7250000
|}


==Virtual PS2 (emulated machine) usage and features==
===PS2 Memory and Hardware Mapped Registers Layout===
<pre>
EE Virtual/Physical Memory Map
  KUSEG: 00000000h-7FFFFFFFh User segment
  KSEG0: 80000000h-9FFFFFFFh Kernel segment 0
  KSEG1: A0000000h-BFFFFFFFh Kernel segment 1
  KSSEG: C0000000h-DFFFFFFFh Supervisor segment
  KSEG3: E0000000h-FFFFFFFFh Kernel segment 3
 
  Virtual   Physical
  00000000h  00000000h  32 MB    Main RAM (first 1 MB reserved for kernel)
  20000000h  00000000h  32 MB    Main RAM, uncached
  30100000h  00100000h  31 MB    Main RAM, uncached and accelerated
  10000000h  10000000h  64 KB    I/O registers
  11000000h  11000000h  4 KB    VU0 code memory
  11004000h  11004000h  4 KB    VU0 data memory
  11008000h  11008000h  16 KB    VU1 code memory
  1100C000h  1100C000h  16 KB    VU1 data memory
  12000000h  12000000h  8 KB    GS privileged registers
  1C000000h  1C000000h  2 MB    IOP RAM
  1FC00000h  1FC00000h  4 MB    BIOS, uncached (rom0)
  9FC00000h  1FC00000h  4 MB    BIOS, cached (rom09)
  BFC00000h  1FC00000h  4 MB    BIOS, uncached (rom0b)
  70000000h  ---------  16 KB    Scratchpad RAM (only accessible via virtual addressing)


===Video Modes===
IOP Physical Memory Map
'''Note:''' Real PS2 : https://web.archive.org/web/20180802152820/http://users.neoscientists.org/~blue/ps2videomodes.txt
  KUSEG: 00000000h-7FFFFFFFh User segment
 
  KSEG0: 80000000h-9FFFFFFFh Kernel segment 0
Video Modes
  KSEG1: A0000000h-BFFFFFFFh Kernel segment 1
----.-----------.---------------.-----------.-----------.
    
   No | Name      | Resolution | fV(Hz)    | fH(kHz)   |
   Physical
----+-----------+---------------+-----------+-----------|
   00000000h 2 MB     Main RAM (same as on PSX)
  0 | NTSC-NI   | 640x240(224) | 59.940    | 15.734    |
   1D000000h          SIF registers
  1 | NTSC-I    |  640x480(448) | 59.820    | 15.734    |
   1F800000h 64 KB   Various I/O registers
  2 | PAL-NI    |  640x288(256) | 50.000    | 15.625    |
   1F900000h 1 KB    SPU2 registers
  3 | PAL-I     |  640x576(512) | 49.760    | 15.625    |
   1FC00000h 4 MB    BIOS (rom0) - Same as EE BIOS
  4 | VESA-1A   |  640x480      | 59.940    | 31.469    |
    
  5 | VESA-1C   | 640x480      | 75.000   | 37.500    |
   FFFE0000h (KSEG2)   Cache control
  6 | VESA-2B   | 800x600      | 60.317    | 37.879    |
 
  7 | VESA-2D   | 800x600      | 75.000    | 46.875    |
Additional Memory
  8 | VESA-3B  | 1024x768      | 60.004    | 48.363    |
   4 MB   GS VRAM (used for framebuffer, textures, zbuffer, etc)
  9 | VESA-3D   | 1024x768      | 75.029    | 60.023    |
   2 MB  SPU2 work RAM - quadrupled from PSX's SPU
   10 | VESA-4A   | 1280x1024    | 60.020    | 63.981    |
   8 MB   Memory card
   11 | VESA-4B   | 1280x1024    | 75.025    | 79.976    |
   12 | DTV-480P  |  720x480      | 59.940    | 31.469    |
   13 | DTV-1080I | 1920x1080    | 60.000    | 33.750    |
   14 | DTV-720P  | 1280x720      | ??        | ??        |
----^-----------^---------------^-----------^-----------'


==Memory Mapping==


=== ps2netemu ===
Hardware Mapped Registers
{| class="wikitable"
EE Map
|-
EE Timers
! Name !! ea !! lpar2(netemu 4.81) !! size !! flags !! lpar1(lv1 4.81)
  100000xxh        Timer 0
|-
  100008xxh        Timer 1
| text          ||          0x0 ||      0x3D00000 ||  0x300000( 3 MB) || 0x8000000000000003  0000000000000003 || 0x7D00000
  100010xxh        Timer 2
|-                                                                                                                 
  100018xxh        Timer 3
| ro_work      ||     0x300000 ||      0x300000 ||  0x500000(  5 MB) || 0x0000000000000003  0000000000000003 || 0x4300000
Image Processing Unit (IPU)
|-                                                                                                                 
  10002000h 8h    IPU Command
| rw_work      ||     0x800000 ||      0x800000 || 0x2A00000( 42 MB) || 0x0000000000000001  0000000000000003 || 0x4800000
  10002010h 4h     IPU Control
|-                                                                                                                 
  10002020h 4h    IPU bit pointer control
| negmem        ||   0x1FFF0000 ||      0x3210000 ||  0x10000( 64 KB) || 0x0000000000000001  0000000000000000 || 0x7210000
  10002030h 8h     Top of bitstream
|-                                                                                                                 
  10007000h 10h    Out FIFO (read)
| ee_ram        ||  0x100000000 || 0x64000E000000 || 0x2000000( 32 MB) || 0x0000000000000001  0000000000000000 || 0x3C00000 - 0x3F00000, 0x8000000 - 0x9B00000
   10007010h 10h    In FIFO (write)
|-                                                                                                                
Graphics Interface (GIF)
| ee_jit_code   ||  0xD00000000 || 0x680024000000 || 0x3000000( 48 MB) || 0x8000000000000001  0000000000000003 || 0xBC00000 - 0xEB00000
  10003000h 4h    GIF_CTRL - Control register
|-                                                                                                                
  10003010h 4h    GIF_MODE - Mode setting
| vu0_jit_code  ||  0xD08000000 || 0x580000800000 ||  0x400000(  4 MB) || 0x8000000000000001  0000000000000003 || 0x900000 - 0xC00000
  10003020h 4h    GIF_STAT - Status
|-                                                                                                                
   10003040h 4h    GIF_TAG0 - Bits 0-31 of tag before
| vu0_jit_data  ||  0xD0C000000 ||      0x3700000 ||  0x400000(  4 MB) || 0x0000000000000002  0000000000000003 || 0x7700000
  10003050h 4h    GIF_TAG1 - Bits 32-63 of tag before
|-                                                                                                                
  10003060h 4h    GIF_TAG2 - Bits 64-95 of tag before
| eeram_jit_lut ||  0xE00000000 || 0x640010000000 || 0x2000000( 32 MB) || 0x0000000000000001  0000000000000003 || 0x9C00000 - 0xBB00000
  10003070h 4h    GIF_TAG3 - Bits 96-127 of tag before
|-                                                                                                                
  10003080h 4h    GIF_CNT - Transfer status counter
| eerom_jit_lut ||  0xE0FC00000 || 0x580000C00000 ||  0x400000(  4 MB) || 0x0000000000000001  0000000000000003 || 0xD00000 - 0x1000000
  10003090h 4h    GIF_P3CNT - PATH3 transfer status counter
|-                                                                                                                
  100030A0h 4h    GIF_P3TAG - Bits 0-31 of PATH3 tag when interrupted
| ee_dbg_ram   ||  0x90FFF8000 || 0x64000E078000 ||    0x8000( 32 KB) || 0x0000000000000001  0000000000000000 ||
  10006000h 10h   GIF FIFO
|-                                                                                                                
DMA Controller (DMAC)
| iop_ram      ||  0x400000000 ||      0x3300000 ||  0x200000(  2 MB) || 0x0000000000000001  0000000000000000 || 0x7300000
  100080xxh        VIF0 - channel 0
|-                                                                                                                
  100090xxh        VIF1 - channel 1
| iop_rom      ||  0x50FC00000 || 0x580001000000 ||  0x400000(  4 MB) || 0x0000000000000001  0000000000000002 || 0x1100000 - 0x1400000
  1000A0xxh        GIF - channel 2
|-                                                                                                                
  1000B0xxh        IPU_FROM - channel 3
| iop_spad      ||  0x50F800000 ||      0x3220000 ||   0x10000( 64 KB) || 0x0000000000000001  0000000000000002 || 0x7220000
  1000B4xxh        IPU_TO - channel 4
|-                                                                                                                
  1000C0xxh        SIF0 - channel 5
| spu2_ram      ||  0x600000000 ||      0x3500000 ||  0x200000(  2 MB) || 0x0000000000000001  0000000000000000 || 0x7500000
  1000C4xxh        SIF1 - channel 6
|-                                                                                                                
   1000C8xxh        SIF2 - channel 7
| spu2_ram2     ||  0x600200000 ||      0x3500000 ||  0x200000(  2 MB) || 0x0000000000000001  0000000000000000 || 0x7500000
  1000D0xxh        SPR_FROM - channel 8
|-                                                                                                                
  1000D4xxh        SPR_TO - channel 9
| spu2_pcm      || 0x1000000000 ||      0x3230000 ||   0x10000( 64 KB) || 0x0000000000000001  0000000000000000 || 0x7230000
  1000E000h 4h    D_CTRL - DMAC control
|-                                                                                                                
  1000E010h 4h     D_STAT - DMAC interrupt status
| ee_spr_lo     ||  0x700000000 ||      0x3201000 ||    0x2000(  8 KB) || 0x0000000000000001  0000000000000000 || 0x7201000
  1000E020h 4h    D_PCR - DMAC priority control
|-                                                                                                                
   1000E030h 4h    D_SQWC - DMAC skip quadword
| ee_spr        ||  0x800000000 ||      0x3203000 ||    0x6000( 24 KB) || 0x0000000000000001  0000000000000000 || 0x7203000
  1000E040h 4h    D_RBSR - DMAC ringbuffer size
|-                                                                                                                
  1000E050h 4h     D_RBOR - DMAC ringbuffer offset
| ee_vu0_dmem0  ||  0x301004000 ||      0x3200000 ||    0x1000( 4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
  1000E060h 4h    D_STADR - DMAC stall address
|-                                                                                                                
  1000F520h 4h    D_ENABLER - DMAC disabled status
| ee_vu0_dmem1  ||  0x301005000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
  1000F590h 4h    D_ENABLEW - DMAC disable
|-                                                                                                                
Interrupt Controller (INTC)
| ee_vu0_dmem2  ||  0x301006000 ||      0x3200000 ||    0x1000( 4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
  1000F000h 4h    INTC_STAT - Interrupt status
|-                                                                                                                
  1000F010h 4h    INTC_MASK - Interrupt mask
| ee_vu0_dmem3  ||  0x301007000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
Subsystem Interface (SIF)
|-                                                                                                                
  1000F200h 4h    MSCOM - EE->IOP communication
| ee_rom        ||  0x30FC00000 || 0x580001000000 ||  0x400000(  4 MB) || 0x0000000000000001  0000000000000001 || 0x1100000 - 0x1400000
  1000F210h 4h    SMCOM - IOP->EE communication
|-                                                                                                                 
  1000F220h 4h    MSFLAG - EE->IOP flags
| vrc          ||  0xC00000000 || 0x600005000000 || 0x1000000( 16 MB) || 0x0000000000000001  0000000000000000 || 0x1500000 - 0x2400000
  1000F230h 4h    SMFLAG - IOP->EE flags
|-                                                                                                                
  1000F240h 4h    Control register
| /dev/zero     || 0x4000000000 ||      0x3240000 ||   0x10000( 64 KB) || 0x0000000000000001  0000000000000001 || 0x7240000
Privileged GS registers
|-                                                                                                                 
  12000000h 8h    PMODE - various PCRTC controls
| dma_vu0_dmem0 || 0x4001004000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
  12000010h 8h     SMODE1
|-                                                                                                                 
   12000020h 8h    SMODE2
| dma_vu0_dmem1 || 0x4001005000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
  12000030h 8h    SRFSH
|-                                                                                                                
  12000040h 8h    SYNCH1
| dma_vu0_dmem2 || 0x4001006000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
  12000050h 8h    SYNCH2
|-                                                                                                                
  12000060h 8h    SYNCV
| dma_vu0_dmem3 || 0x4001007000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
  12000070h 8h    DISPFB1 - display buffer for output circuit 1
|-                                                                                                                
  12000080h 8h    DISPLAY1 - output circuit 1 control
| imm_vu0_dmem0 ||   0x30000000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
  12000090h 8h    DISPFB2 - display buffer for output circuit 2
|-                                                                                                                        
   120000A0h 8h    DISPLAY2 - output circuit 2 control
| imm_vu0_dmem1 ||   0x30001000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
   120000B0h 8h    EXTBUF
|-                                                                                                                         
  120000C0h 8h    EXTDATA
| imm_vu0_dmem2 ||   0x30002000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
   120000D0h 8h    EXTWRITE
|-                                                                                                                        
  120000E0h 8h    BGCOLOR - background color
| imm_vu0_dmem3 ||   0x30003000 ||      0x3200000 ||    0x1000(  4 KB) || 0x0000000000000001  0000000000000001 || 0x7200000
   12001000h 8h    GS_CSR - control register
|-                                                                                                                        
  12001010h 8h    GS_IMR - GS interrupt control
| SGSXdr        || 0x1904000000 || 0x64000C000000 || 0x1700000( 23 MB) || 0x0000000000000001  0000000000000000 || 0x2500000 - 0x3B00000
  12001040h 8h    BUSDIR - transfer direction
|-                                                                                                                        
   12001080h 8h    SIGLBLID - signal
| iopTrace      || 0x1400000000 ||      0x3250000 ||   0x10000( 64 KB) || 0x0000000000000001  0000000000000000 || 0x7250000
|}


====SPE local storage====
IOP Map
Emulator access SPE LS by accessing special addresses. Mapping as follows:
Subsystem Interface (SIF)
{| class="wikitable"
  1D000000h 4h    MSCOM - EE->IOP communication
|-
  1D000010h 4h    SMCOM - IOP->EE communication
! SPE Num. !! SPE task !! Address in netemu !! address in SPE
  1D000020h 4h    MSFLAG - EE->IOP flags
|-
  1D000030h 4h    SMFLAG - IOP->EE flags
| 0 || IOP || 0x40000000 - 0x4003FFFF ||  0x0 - 3FFFF
  1D000040h 4h    Control register
|-
CDVD Drive
| 1 || SPU2 || 0x40080000 - 0x400BFFFF ||  0x0 - 3FFFF
  1F402004h 1h    Current N command
|-
  1F402005h 1h    N command status (R)
| 2 || VU1 || 0x40100000 - 0x4013FFFF ||  0x0 - 3FFFF
  1F402005h 1h    N command params (W)
|-
  1F402006h 1h    Error
| 3 || EEDMA || 0x40180000 - 0x401BFFFF ||  0x0 - 3FFFF
  1F402007h 1h    Send BREAK command
|-
  1F402008h 1h    CDVD I_STAT - interrupt register
| 4 || FE || 0x40200000 - 0x4023FFFF ||  0x0 - 3FFFF
  1F40200Ah 1h    Drive status
|-
  1F40200Fh 1h    Disk type
| 5 || BE || 0x40280000 - 0x402BFFFF ||  0x0 - 3FFFF
  1F402016h 1h    Current S command
|-
  1F402017h 1h    S command status
| 6 || IPU || 0x40300000 - 0x4033FFFF ||  0x0 - 3FFFF
  1F402018h 1h    S command params
|-
Interrupt Control
|}
  1F801070h 4h    I_STAT - Interrupt status
 
  1F801074h 4h    I_MASK - Interrupt mask
Additionally, emulator access SPU directly with those addresses. <br>
  1F801078h 1h    I_CTRL - Global interrupt disable
 
DMA registers
{| class="wikitable"
  1F80108xh        MDECin - channel 0
|-
  1F80109xh        MDECout - channel 1
! Address !! Channel !! Channel description !! Access type !! Notes
  1F8010Axh        SIF2 (GPU) - channel 2
|-
   1F8010Bxh        CDVD - channel 3
| 0x44004 || SPU_Out_Mbox || SPU Outbound Mailbox Register || Read only || Used to read 32 bits of data from the corresponding SPU outbound mailbox queue. Outbound Mailbox Register has a corresponding SPU Write Outbound Mailbox Channel for writing data into outbound mailbox queue.
  1F8010Cxh        SPU2 Core0 - channel 4
|-
  1F8010Dxh        PIO - channel 5
| 0x4400C || SPU_In_Mbox || SPU Inbound Mailbox Register || Write only || Used to write 32 bits of data into the corresponding SPU inbound mailbox queue. Inbound mailbox queue has a corresponding SPU Read Inbound Mailbox Channel for reading data from the queue.
  1F8010Exh        OTC - channel 6
|-
  1F80150xh        SPU2 Core1 - channel 8
| 0x44014 || SPU_Mbox_Stat || SPU Mailbox Status Register || Read only || Contains the current In_Mbox/Out_Mbox/Out_Intr_Mbox count of the mailbox queues in the corresponding SPE. 
   1F80151xh        ??? - channel 9
|-
   1F80152xh        SIF0 - channel 10
| 0x4401C || SPU_RunCntl || SPU Run Control Register || Read/Write || Used to start and stop the execution of instructions in the SPU.
   1F80153xh        SIF1 - channel 11
The SPU can dynamically change the state of the Run Status bit (that is, SPU_Status[R]).    
   1F80154xh        SIO2in - channel 12
|-
   1F80155xh        SIO2out - channel 13
| 0x44024 || SPU_Status || SPU Status Register || Read only || Used to report the status (state) of an SPU. Emulator use it mostly to check if SPU is running (bit31).
|-
| 0x44034 || SPU_NPC || SPU Next Program Counter Register || Read/Write || Contains the address from which an SPU starts executing when the Run Control bit is set in the SPU Run Control Register.
Used in function that start SPU programs, and in interrupts handlers, plus in few other places.
|-
| 0x5400C || SPU_Sig_Notify_1 || SPU Signal Notification 1 Register || Read/Write || Used to write data that can be read in SPU_RdSigNotify1 channel corresponding SPE.
|-
| 0x5C00C || SPU_Sig_Notify_2 || SPU Signal Notification 2 Register || Read/Write || Used to write data that can be read in SPU_RdSigNotify2 channel corresponding SPE.
|-
|}
 
Address = SPU base + Address. For example, IPU SPU is mapped to 0x40300000 so accessing SPU_Sig_Notify1 will be done by read/write to 0x4035400C.
 
===PS2 Memory and Hardware Mapped Registers Layout===
<pre>
EE Virtual/Physical Memory Map
   KUSEG: 00000000h-7FFFFFFFh User segment
   KSEG0: 80000000h-9FFFFFFFh Kernel segment 0
   KSEG1: A0000000h-BFFFFFFFh Kernel segment 1
   KSSEG: C0000000h-DFFFFFFFh Supervisor segment
   KSEG3: E0000000h-FFFFFFFFh Kernel segment 3
    
    
   Virtual    Physical
   1F8010F0h 4h    DPCR - DMA priority control
   00000000h  00000000h  32 MB    Main RAM (first 1 MB reserved for kernel)
  1F8010F4h 4h    DICR - DMA interrupt control
   20000000h  00000000h  32 MB   Main RAM, uncached
  1F801570h 4h    DPCR2 - DMA priority control 2
   30100000h  00100000h  31 MB   Main RAM, uncached and accelerated
  1F801574h 4h    DICR2 - DMA priority control 2
   10000000h  10000000h  64 KB    I/O registers
IOP Timers
   11000000h  11000000h  4 KB     VU0 code memory
  1F80110xh        Timer 0
   11004000h  11004000h  4 KB     VU0 data memory
  1F80111xh        Timer 1
   11008000h  11008000h  16 KB    VU1 code memory
  1F80112xh        Timer 2
   1100C000h  1100C000h  16 KB    VU1 data memory
  1F80148xh        Timer 3
   12000000h  12000000h  8 KB     GS privileged registers
  1F80149xh        Timer 4
   1C000000h  1C000000h  2 MB     IOP RAM
   1F8014Axh        Timer 5
   1FC00000h  1FC00000h  4 MB     BIOS, uncached (rom0)
Serial Interface (SIO2)
   9FC00000h  1FC00000h  4 MB     BIOS, cached (rom09)
   1F808200h 40h   SEND3 buffer
   BFC00000h  1FC00000h  4 MB     BIOS, uncached (rom0b)
   1F808240h 20h   SEND1/2 buffers
   70000000h  ---------  16 KB    Scratchpad RAM (only accessible via virtual addressing)
   1F808260h 1h    In FIFO
 
   1F808264h 1h     Out FIFO
IOP Physical Memory Map
   1F808268h 4h     SIO2 control
   KUSEG: 00000000h-7FFFFFFFh User segment
   1F80826Ch 4h    RECV1
   KSEG0: 80000000h-9FFFFFFFh Kernel segment 0
   1F808270h 4h    RECV2
   KSEG1: A0000000h-BFFFFFFFh Kernel segment 1
   1F808274h 4h     RECV3
Sound Processing Unit (SPU2)
  1F900000h 180h  Core0 Voice 0-23 registers
   1F900190h 4h     Key ON 0/1
   1F900194h 4h     Key OFF 0/1
   1F90019Ah 2h     Core attributes
   1F90019Ch 4h     Interrupt address H/L
   1F9001A8h 4h    DMA transfer address H/L
  1F9001ACh 2h    Internal transfer FIFO
  1F9001B0h 2h    AutoDMA status
   1F9001C0h 120h  Core0 Voice 0-23 start/loop/next addresses
   1F900340h 4h    ENDX 0/1
   1F900344h 2h    Status register
 
  ... above addresses repeat for Core1 starting at 1F900400h ...
    
    
   Physical
   1F900760h 2h    Master Volume Left
   00000000h  2 MB     Main RAM (same as on PSX)
   1F900762h 2h     Master Volume Right
   1D000000h          SIF registers
   1F900764h 2h    Effect Volume Left
   1F800000h  64 KB    Various I/O registers
   1F900766h 2h    Effect Volume Right
   1F900000h  1 KB     SPU2 registers
   1F900768h 2h     Core1 External Input Volume Left
   1FC00000h  4 MB     BIOS (rom0) - Same as EE BIOS
   1F90076Ah 2h     Core1 External Input Volume Right
 
</pre>
  FFFE0000h (KSEG2)  Cache control


Additional Memory
== Memory Allocation ==
   4 MB  GS VRAM (used for framebuffer, textures, zbuffer, etc)
===ps2_netemu===
  2 MB  SPU2 work RAM - quadrupled from PSX's SPU
{| class="wikitable"
  8 MB  Memory card
|-
 
! Name !! Size !! page_log2 !! lpar2(netemu 4.81) !! lpar1(lv1 4.81)
 
|-
Hardware Mapped Registers
| ra_vu0_dmem   ||    0x1000 (4 KB) || 12 (4 KB) ||      0x3200000 || 0x7200000
EE Map
|-                                                                      
EE Timers
| ra_ee_spr_lo  ||    0x2000 (8 KB) || 12 (4 KB) ||      0x3201000 || 0x7201000
   100000xxh        Timer 0
|-                                                                     
   100008xxh        Timer 1
| ra_ee_sprx    ||    0x6000 (24 KB) || 12 (4 KB) ||      0x3203000 || 0x7203000
  100010xxh        Timer 2
|-                                                                     
   100018xxh        Timer 3
| ra_negmem    ||  0x10000 (64 KB) || 16 (64 KB) ||      0x3210000 || 0x7210000
Image Processing Unit (IPU)
|-                                                                     
  10002000h 8h    IPU Command
| ra_iop_spad  ||   0x10000 (64 KB) || 16 (64 KB) ||      0x3220000 || 0x7220000
  10002010h 4h     IPU Control
|-                                                                     
   10002020h 4h    IPU bit pointer control
| ra_spu2_pcm  ||   0x10000 (64 KB) || 16 (64 KB) ||      0x3230000 || 0x7230000
  10002030h 8h    Top of bitstream
|-                                                                     
  10007000h 10h   Out FIFO (read)
| ra_nulls      ||   0x10000 (64 KB) || 16 (64 KB) ||      0x3240000 || 0x7240000
   10007010h 10h    In FIFO (write)
|-                                                                     
Graphics Interface (GIF)
| ra_itrace     ||   0x10000 (64 KB) || 16 (64 KB) ||      0x3250000 || 0x7250000
  10003000h 4h    GIF_CTRL - Control register
|-                                                                     
   10003010h 4h    GIF_MODE - Mode setting
| ra_iop_ram   ||  0x200000 (2 MB) || 20 (1 MB) ||      0x3300000 || 0x7300000
  10003020h 4h    GIF_STAT - Status
|-                                                                     
   10003040h 4h    GIF_TAG0 - Bits 0-31 of tag before
| ra_spu2_ram   ||  0x200000 (2 MB) || 20 (1 MB) ||      0x3500000 || 0x7500000
  10003050h 4h    GIF_TAG1 - Bits 32-63 of tag before
|-                                                                      
  10003060h 4h    GIF_TAG2 - Bits 64-95 of tag before
| ra_vu0_code   ||  0x400000 (4 MB) || 20 (1 MB) || 0x580000800000 || 0x900000 - 0xC00000
  10003070h 4h    GIF_TAG3 - Bits 96-127 of tag before
|-                                                                      
  10003080h 4h    GIF_CNT - Transfer status counter
| ra_vu0_data   ||  0x400000 (4 MB) || 20 (1 MB) ||      0x3700000 || 0x7700000
  10003090h 4h    GIF_P3CNT - PATH3 transfer status counter
|-                                                                      
  100030A0h 4h     GIF_P3TAG - Bits 0-31 of PATH3 tag when interrupted
| ra_ee_rom_pc  ||  0x400000 (4 MB) || 20 (1 MB) || 0x580000C00000 || 0xD00000 - 0x1000000
  10006000h 10h    GIF FIFO
|-                                                                      
DMA Controller (DMAC)
| ra_ps2_rom    ||  0x400000 (4 MB) || 20 (1 MB) || 0x580001000000 || 0x1100000 - 0x1400000
  100080xxh        VIF0 - channel 0
|-                                                                      
  100090xxh        VIF1 - channel 1
| ra_vrc_mem    || 0x1000000 (16 MB) || 20 (1 MB) || 0x600005000000 || 0x1500000 - 0x2400000
  1000A0xxh        GIF - channel 2
|-                                                                      
  1000B0xxh        IPU_FROM - channel 3
| ra_sgs_xdr    || 0x1700000 (23 MB) || 20 (1 MB) || 0x64000C000000 || 0x2500000 - 0x3B00000
  1000B4xxh        IPU_TO - channel 4
|-                                                                      
  1000C0xxh        SIF0 - channel 5
| ra_ee_ram     || 0x2000000 (32 MB) || 20 (1 MB) || 0x64000E000000 || 0x3C00000 - 0x3F00000, 0x8000000 - 0x9B00000
  1000C4xxh        SIF1 - channel 6
|-                                                                     
  1000C8xxh        SIF2 - channel 7
| ra_ee_ram_pc  || 0x2000000 (32 MB) || 20 (1 MB) || 0x640010000000 || 0x9C00000 - 0xBB00000
  1000D0xxh        SPR_FROM - channel 8
|-                                                                      
  1000D4xxh        SPR_TO - channel 9
| ra_trans_code || 0x3000000 (48 MB) || 20 (1 MB) || 0x680024000000 || 0xBC00000 - 0xEB00000
  1000E000h 4h    D_CTRL - DMAC control
|}
  1000E010h 4h    D_STAT - DMAC interrupt status
 
  1000E020h 4h    D_PCR - DMAC priority control
 
  1000E030h 4h    D_SQWC - DMAC skip quadword
==Controller==
  1000E040h 4h    D_RBSR - DMAC ringbuffer size
{| class="wikitable sortable"
  1000E050h 4h    D_RBOR - DMAC ringbuffer offset
|-
  1000E060h 4h    D_STADR - DMAC stall address
! ID !! Controller #Number !! Note
  1000F520h 4h    D_ENABLER - DMAC disabled status
|-
  1000F590h 4h    D_ENABLEW - DMAC disable
| 1 (1-A) || 1 ||
Interrupt Controller (INTC)
|-
  1000F000h 4h    INTC_STAT - Interrupt status
| 2 (2-A) || 2 ||
  1000F010h 4h    INTC_MASK - Interrupt mask
|-
Subsystem Interface (SIF)
| 3 (1-B) || 3 ||
  1000F200h 4h    MSCOM - EE->IOP communication
|-
  1000F210h 4h    SMCOM - IOP->EE communication
| 4 (2-B) || 4 ||
  1000F220h 4h    MSFLAG - EE->IOP flags
|-
  1000F230h 4h    SMFLAG - IOP->EE flags
| 5 (1-C) || 5 || Gamepad LED #1 + #4
  1000F240h 4h    Control register
|-
Privileged GS registers
| 6 (2-C) || 6 || Gamepad LED #2 + #4
  12000000h 8h    PMODE - various PCRTC controls
|-
  12000010h 8h    SMODE1
| 7 (1-D) || 7 || Gamepad LED #3 + #4
  12000020h 8h    SMODE2
|-
  12000030h 8h    SRFSH
|}
  12000040h 8h    SYNCH1
 
  12000050h 8h    SYNCH2
==Peripheral support==
  12000060h 8h    SYNCV
===ps2_emu.self / ps2_gxemu.self===
  12000070h 8h    DISPFB1 - display buffer for output circuit 1
#Hub
  12000080h 8h    DISPLAY1 - output circuit 1 control
#Mouse
  12000090h 8h    DISPFB2 - display buffer for output circuit 2
#Keyboard
  120000A0h 8h    DISPLAY2 - output circuit 2 control
#EyeToy
  120000B0h 8h    EXTBUF
#Head Mount Display
  120000C0h 8h    EXTDATA
#Mic
  120000D0h 8h    EXTWRITE
#Ascii Mic
  120000E0h 8h    BGCOLOR - background color
#Socom USB Headset
  12001000h 8h    GS_CSR - control register
#Usb Headset
  12001010h 8h    GS_IMR - GS interrupt control
#Sea Mic Controller
  12001040h 8h    BUSDIR - transfer direction
#Force Feedback device
  12001080h 8h    SIGLBLID - signal
#GT Force
#Momo Force
#Driving Force Pro
#G25/G27
#Momo Racing
#Flight Force
#Force 3D Pro
#Modem
#Guncon2
#Densya de GO! controller type 2
#Densya de GO! Sincansen senyou controller
#Capture Eye
#Flight Stick
#Flight Stick 2
#Pop Egg
#Trance Vibrator
#PSP
#Compact Flight Controller
#Flash Memory
#Buzz!
#Pachi-Slot Controller Kurouto
#Usb Adapter
#Guncon3
#Multi Train Controller
#Para Para Paradise controller


IOP Map
===ps2_netemu.self===
Subsystem Interface (SIF)
#BD Remote Control
  1D000000h 4h    MSCOM - EE->IOP communication
#PLAYSTATION(R)3 Controller (Vendor ID 0x54C, Product ID 0x268),
  1D000010h 4h    SMCOM - IOP->EE communication
#Motion Controller - Move (Vendor ID 0x54C, Product ID 0x3D5),
  1D000020h 4h    MSFLAG - EE->IOP flags
#Navigation Controller  (Vendor ID 0x54C, Product ID 0x42F)
  1D000030h 4h    SMFLAG - IOP->EE flags
#"guncon3"
  1D000040h 4h    Control register
<br/>
CDVD Drive
Unknown:
  1F402004h 1h    Current N command
#Vendor ID 0xF0D (Hori), Product ID 0x4A
  1F402005h 1h    N command status (R)
#Vendor ID 0x54C (Sony), Product ID 0x5AF
  1F402005h 1h    N command params (W)
 
  1F402006h 1h    Error
==BIOS==
  1F402007h 1h    Send BREAK command
===ps2_netemu.self===
  1F402008h 1h    CDVD I_STAT - interrupt register
Ps2_netemu use integrated PS2 bios included in ps2netemu.elf, not additional file like in ps1emu case. In 4.81 firmware BIOS is located from 0x820A00 to 0x9F09FF (0x820900 to 0x9F08FF in fw4.50). Bios version is to be Developement v2.20 from Japan region (22/01/2007), but it's of course not limited to booting only NTSC-J games.
  1F40200Ah 1h    Drive status
 
  1F40200Fh 1h    Disk type
Notable thing is that ps2_netemu use the same bios as ps2_gxemu, and ps2onps4. ps2_netemu not boot using ps2_emu bios because of failing RDRAM check.
  1F402016h 1h    Current S command
 
  1F402017h 1h    S command status
{| class="wikitable" style="font-size:small;"
  1F402018h 1h    S command params
|-
Interrupt Control
! File !! Offset in fw4.81 ps2_netemu !! Offset in exported bin !! Description !! File type (exportable)
  1F801070h 4h    I_STAT - Interrupt status
|-
  1F801074h 4h    I_MASK - Interrupt mask
| RESET || 0x820A00 || 0x00 || Bootstrap code for the EE and IOP. || BIN
  1F801078h 1h    I_CTRL - Global interrupt disable
|-
DMA registers
| ROMDIR || 0x823180 || 0x2780 || The ROMDIR part of the ROM image, which provides information on the location and name of files contained in the image. || BIN
  1F80108xh        MDECin - channel 0
|-
  1F80109xh        MDECout - channel 1
| EXTINFO || 0x8236C0 || 0x2CC0 || Contains the "EXTINFO" for all files in the ROM image. || BIN
  1F8010Axh        SIF2 (GPU) - channel 2
|-
  1F8010Bxh        CDVD - channel 3
| SBIN || 0x823D30 || 0x3330 || Seems to be the pad controller library for the PS1 monitor. || BIN
  1F8010Cxh        SPU2 Core0 - channel 4
|-
  1F8010Dxh        PIO - channel 5
| LOGO || 0x82ACD0 || 0xA2D0 || PS1 logo? || BIN
  1F8010Exh        OTC - channel 6
|-
  1F80150xh        SPU2 Core1 - channel 8
| IOPBTCONF || 0x83F420 || 0x1EA20 || Boot configuration file for the IOP, during the final phase of the IOP reset. If no UDNL module is specified, the IOP will only have a single IOP reset in the reboot process, with the modules listed in IOPBTCONF.  || BIN
  1F80151xh        ??? - channel 9
|-
  1F80152xh        SIF0 - channel 10
| IOPBTCON2 || 0x83F510 || 0x1EB10 || Boot configuration file for the IOP, for the first phase of the IOP reset (before UDNL is loaded). || BIN
  1F80153xh        SIF1 - channel 11
|-
  1F80154xh        SIO2in - channel 12
| SYSMEM || 0x83F5E0 || 0x1EBE0 || System Memory Manager. || ELF
  1F80155xh        SIO2out - channel 13
|-
 
| LOADCORE || 0x840800 || 0x1FE00 || The core of IOP module loading. Provides the lowest level of IOP module loading functions. Also handles the startup of the IOP. || ELF
  1F8010F0h 4h    DPCR - DMA priority control
|-
  1F8010F4h 4h    DICR - DMA interrupt control
| EXCEPMAN || 0x842D80 || 0x22380 || Exception manager. || ELF
  1F801570h 4h    DPCR2 - DMA priority control 2
|-
  1F801574h 4h    DICR2 - DMA priority control 2
| INTRMANP || 0x843960 || 0x22F60 || Interrupt Manager. According to wisi, it is for PS mode. || ELF
IOP Timers
|-
  1F80110xh        Timer 0
| INTRMANI || 0x845370 || 0x24970 || Interrupt Manager. According to wisi, it is for IOP mode. || ELF
  1F80111xh        Timer 1
|-
  1F80112xh        Timer 2
| SSBUSC || 0x8471B0 || 0x267B0 || SSBUS Controller library. The SSBUS seems to be the bus that all peripherals get connected to. It seems to have the power to control the mapping of the device registers, as well as access timing. || ELF
  1F80148xh        Timer 3
|-
  1F80149xh        Timer 4
| TIMEMANP || 0x847920 || 0x26F20 || Timer Manager (PS mode) || ELF
  1F8014Axh        Timer 5
|-
Serial Interface (SIO2)
| TIMEMANI || 0x848500 || 0x27B00 || Timer Manager (IOP mode) || ELF
  1F808200h 40h    SEND3 buffer
|-
  1F808240h 20h    SEND1/2 buffers
| DMACMAN || 0x849130 || 0x28730 || DMA Controller Manager. || ELF
  1F808260h 1h    In FIFO
|-
  1F808264h 1h    Out FIFO
| SYSCLIB || 0x84C830 || 0x2BE30 || System C Library. || ELF
  1F808268h 4h    SIO2 control
|-
  1F80826Ch 4h    RECV1
| HEAPLIB || 0x84EF90 || 0x2E590 || Memory HEAP LIBrary (i.e. thvpool, thfpool) || ELF
  1F808270h 4h    RECV2
|-
  1F808274h 4h    RECV3
| THREADLIB || 0x84FC90 || 0x2F290 || Multi_Thread_Manager || ELF
Sound Processing Unit (SPU2)
|-
  1F900000h 180h  Core0 Voice 0-23 registers
| VBLANK || 0x858A20 || 0x38020 || V-Blank management || ELF
  1F900190h 4h    Key ON 0/1
|-
  1F900194h 4h    Key OFF 0/1
| IOMAN || 0x8597B0 || 0x38DB0 || IO Manager || ELF
  1F90019Ah 2h    Core attributes
|-
  1F90019Ch 4h    Interrupt address H/L
| MODLOAD || 0x85B720 || 0x3AD20 || IOP module loader. || ELF
  1F9001A8h 4h    DMA transfer address H/L
  1F9001ACh 2h    Internal transfer FIFO
  1F9001B0h 2h    AutoDMA status
  1F9001C0h 120h  Core0 Voice 0-23 start/loop/next addresses
  1F900340h 4h    ENDX 0/1
  1F900344h 2h    Status register
 
  ... above addresses repeat for Core1 starting at 1F900400h ...
 
  1F900760h 2h    Master Volume Left
  1F900762h 2h    Master Volume Right
  1F900764h 2h    Effect Volume Left
  1F900766h 2h    Effect Volume Right
  1F900768h 2h    Core1 External Input Volume Left
  1F90076Ah 2h    Core1 External Input Volume Right
</pre>
 
== Memory Allocation ==
===ps2_netemu===
{| class="wikitable"
|-
|-
! Name !! Size !! page_log2 !! lpar2(netemu 4.81) !! lpar1(lv1 4.81)
| ROMDRV || 0x85DA70 || 0x3D070 || ROM driver. Provides access to the boot ROM (rom0). || ELF
|-
|-
| ra_vu0_dmem  ||    0x1000 (4 KB) || 12 (4 KB) ||     0x3200000 || 0x7200000
| ADDDRV || 0x85E960 || 0x3DF60 ||  Adds support for the DVD ROM (rom1:), via ROMDRV. || ELF
|-                                                                     
|-
| ra_ee_spr_lo ||    0x2000 (8 KB) || 12 (4 KB) ||      0x3201000 || 0x7201000
| STDIO || 0x85DDC0 || 0x3D3C0 || Standard I/O library. || ELF
|-                                                                      
|-
| ra_ee_sprx    ||   0x6000 (24 KB) || 12 (4 KB) ||     0x3203000 || 0x7203000
| SIFMAN || 0x85F9B0 || 0x3EFB0 || SIF manager. || ELF
|-                                                                      
|-
| ra_negmem    ||   0x10000 (64 KB) || 16 (64 KB) ||     0x3210000 || 0x7210000
| SIFINIT || 0x860F50 || 0x40550 || Initializes the SIF. || ELF
|-                                                                      
|-
| ra_iop_spad  ||   0x10000 (64 KB) || 16 (64 KB) ||     0x3220000 || 0x7220000
| EESYNC || 0x861370 || 0x40970 || For synchronizing with the EE, at the end of IOP resets. EESYNC from DNAS images are evil; they also perform a memory wipe of the region from 0x00084000 to .0x00100000. || ELF
|-                                                                      
|-
| ra_spu2_pcm  ||   0x10000 (64 KB) || 16 (64 KB) ||     0x3230000 || 0x7230000
| EENULL || 0x861810 || 0x40E10 ||  The idle thread (id #0) module, in ps2 loaded to 0x00081FC0. || BIN
|-                                                                      
|-
| ra_nulls      ||  0x10000 (64 KB) || 16 (64 KB) ||     0x3240000 || 0x7240000
| PS1ID || 0x861850 || 0x40E50 ||  Only found in newer boot ROMs || BIN
|-                                                                     
|-
| ra_itrace    ||  0x10000 (64 KB) || 16 (64 KB) ||      0x3250000 || 0x7250000
| LIBFI || 0x861860 || 0x40E60 || Not present in the boot ROM of the SCPH-10000 and SCPH-15000. || BIN
|-                                                                     
|-
| ra_iop_ram    ||  0x200000 (2 MB) || 20 (1 MB) ||      0x3300000 || 0x7300000
| PS1VERJ || 0x861950 || 0x40F50 ||   || BIN
|-                                                                     
| ra_spu2_ram  ||  0x200000 (2 MB) || 20 (1 MB) ||      0x3500000 || 0x7500000
|-                                                                     
| ra_vu0_code  ||  0x400000 (4 MB) || 20 (1 MB) || 0x580000800000 || 0x900000 - 0xC00000
|-                                                                      
| ra_vu0_data  ||  0x400000 (4 MB) || 20 (1 MB) ||      0x3700000 || 0x7700000
|-                                                                     
| ra_ee_rom_pc  ||  0x400000 (4 MB) || 20 (1 MB) || 0x580000C00000 || 0xD00000 - 0x1000000
|-                                                                      
| ra_ps2_rom    ||  0x400000 (4 MB) || 20 (1 MB) || 0x580001000000 || 0x1100000 - 0x1400000
|-                                                                      
| ra_vrc_mem    || 0x1000000 (16 MB) || 20 (1 MB) || 0x600005000000 || 0x1500000 - 0x2400000
|-                                                                      
| ra_sgs_xdr    || 0x1700000 (23 MB) || 20 (1 MB) || 0x64000C000000 || 0x2500000 - 0x3B00000
|-                                                                     
| ra_ee_ram    || 0x2000000 (32 MB) || 20 (1 MB) || 0x64000E000000 || 0x3C00000 - 0x3F00000, 0x8000000 - 0x9B00000
|-                                                                     
| ra_ee_ram_pc  || 0x2000000 (32 MB) || 20 (1 MB) || 0x640010000000 || 0x9C00000 - 0xBB00000
|-                                                                     
| ra_trans_code || 0x3000000 (48 MB) || 20 (1 MB) || 0x680024000000 || 0xBC00000 - 0xEB00000
|}
 
 
==Controller==
{| class="wikitable sortable"
|-
|-
! ID !! Controller #Number !! Note
| PS1VERA || 0x861960 || 0x40F60 ||  || BIN
|-
|-
| 1 (1-A) || 1 ||
| PS1VERE || 0x861970 || 0x40F70 ||  || BIN
|-
| PS1VERC || 0x861980 || 0x40F80 ||  || BIN
|-
| PS1VERH || 0x861990 || 0x40F90 ||  || BIN
|-
| OSDSYS || 0x8619A0 || 0x40FA0 || The browser || BIN
|-
| - || 0x8619B0 || 0x40FB0 ||  || BIN
|-
|-
| 2 (2-A) || 2 ||
| RDRAM || 0x861A00 || 0x41000  || Provides a RDRAM test for the EE at power-on. This is run from RESET. || BIN
|-
|-
| 3 (1-B) || 3 ||
| EELOADCNF || 0x864750 || 0x43D50 || Contains the IOP boot configuration file for EELOAD. || BIN
|-
|-
| 4 (2-B) || 4 ||
| SIFCMD || 0x864900 || 0x43F00 || SIF command module. Contains the SIF command and SIF RPC functions. || ELF
|-
|-
| 5 (1-C) || 5 || Gamepad LED #1 + #4
| REBOOT || 0x866B40 || 0x46140 || The reboot service. Receives IOP reset packets from the EE, from across the SIF. || ELF
|-
|-
| 6 (2-C) || 6 || Gamepad LED #2 + #4
| LOADFILE || 0x867310 || 0x46910 || The RPC server for MODLOAD || ELF
|-
|-
| 7 (1-D) || 7 || Gamepad LED #3 + #4
| EECONF || 0x869A70 || 0x49070 || Loads part of the system configuration from the MECHACON EEPROM. Also configures and resets some peripherals, depending on the model version. In slimlines, and possibly on PS3 EECONF will also load the MAC address. || ELF
|-
|-
|}
| - || 0x86A9F0 || 0x49FF0 ||  || BIN
 
|-
==Peripheral support==
| IOPBOOT || 0x86AA00 || 0x4A000 || IOP bootup program || BIN
===ps2_emu.self / ps2_gxemu.self===
|-
#Hub
| - || 0x86BB60 || 0x4B160 ||  || BIN
#Mouse
|-
#Keyboard
| TBIN || 0x86C200 || 0x4B800 ||  The PS1 monitor program. Seems to be the PS1 BIOS. This is started by RESET, when the IOP is in PS1 mode. || BIN
#EyeToy
|-
#Head Mount Display
| XSHA1 || 0x87A170 || 0x59770 || sha1 - this only present in PS3. It is used as additional antipiracy check. It seems that it calculate disc main elf checksum and compares it with some database. Config related?|| ELF
#Mic
|-
#Ascii Mic
| XLOADFILE || 0x87B140 || 0x5A740 || Updated module || ELF
#Socom USB Headset
|-
#Usb Headset
| SIO2MAN || 0x87E1F0 || 0x5D7F0 || SIO2 manager. Provides access to the SIO2 interface. || ELF
#Sea Mic Controller
|-
#Force Feedback device
| - || 0x87FE20 || 0x5F420 ||  || BIN
#GT Force
|-
#Momo Force
| MCSERV || 0x881D40 || 0x61340 ||  RPC server for MCMAN. || ELF
#Driving Force Pro
|-
#G25/G27
| - || 0x883A40 || 0x63040 ||  || BIN
#Momo Racing
|-
#Flight Force
| KROMG || 0x884A00 || 0x64000 ||  || BIN
#Force 3D Pro
|-
#Modem
| - || 0x8866C0 || 0x65CC0 ||  || BIN
#Guncon2
|-
#Densya de GO! controller type 2
| KROM || 0x886A00 || 0x66000 || Kanji ROM? Not sure where this is used. || BIN
#Densya de GO! Sincansen senyou controller
|-
#Capture Eye
| - || 0x8A0870 || 0x7FE70 ||  || BIN
#Flight Stick
|-
#Flight Stick 2
| ROMVER || 0x8A0900 || 0x7FF00 || ROM version. || BIN
#Pop Egg
|-
#Trance Vibrator
| - || 0x8A0910 || 0x7FF10 ||  || BIN
#PSP
#Compact Flight Controller
#Flash Memory
#Buzz!
#Pachi-Slot Controller Kurouto
#Usb Adapter
#Guncon3
#Multi Train Controller
#Para Para Paradise controller
 
===ps2_netemu.self===
Support for USB devices seems to be limited comparing to other available emulators. Although PS2 side of USB subsystem seems to be fully implemented. IOP emulator in SPU handle USB HW registers addresses and generate interrupt for PPU which later handle RW to mentioned registers in similar fashion to ps2_emu/ps2_gxemu. PS2 side of things can be disabled/enabled using one byte, when disabled USB writes are ignored, and USB reads return 0. Initial state is unknown. Emulator seems to accept HID controllers and use them as DS3.
<br/><br/>
Supported devices:
#BD Remote Control
#PLAYSTATION(R)3 Controller (Vendor ID 0x54C, Product ID 0x268),
#Motion Controller - Move (Vendor ID 0x54C, Product ID 0x3D5),
#Navigation Controller  (Vendor ID 0x54C, Product ID 0x42F)
#"guncon3"
<br/>
Unknown:
#Vendor ID 0xF0D (Hori), Product ID 0x4A
#Vendor ID 0x54C (Sony), Product ID 0x5AF
<br/>
Few peripherals not listed above work fine or with issues.
#PS3 Dance Dance Revolution Dance Pad - not ps2 accessory, opposite arrows can't be pressed at the same time.
#Pop'N Music controllers - Require PS2 to USB converter. Wrong button mappings can be fixed by remap in config file.
#Retro-Bit Official SEGA Mega Drive USB 6-Button Controller. Mapped for PS3 already and also works with this emulator. Lacks analogue sticks and shoulder buttons.
 
==BIOS==
===ps2_netemu.self===
Ps2_netemu use integrated PS2 bios included in ps2netemu.elf, not additional file like in ps1_emu. In 4.81 firmware BIOS is located from 0x820A00 to 0x9F09FF (0x820900 to 0x9F08FF in fw4.50). Bios version is Developement v2.20 (22/01/2007).
 
Notable thing is that ps2_netemu use the same bios as ps2_gxemu, and ps2onps4. ps2_netemu not boot using ps2_emu bios because of failing RDRAM check.
 
===Content===
Files included in ps2_netemu/ps2_gxemu bios.
 
{| class="wikitable" style="font-size:small;"
|-
|-
! File !! Offset in fw4.81 ps2_netemu !! Offset in exported bin !! Description !! File type (exportable)
| VERSTR || 0x8A0930 || 0x7FF30 || Version string. Probably PS1 ROM will use this because that this string is also present in PlayStation consoles. || BIN
|-
|-
| RESET || 0x820A00 || 0x00 || Bootstrap code for the EE and IOP. || BIN
| - || 0x8A0990 || 0x7FF90 ||   || BIN
|-
|-
| ROMDIR || 0x823180 || 0x2780 || The ROMDIR part of the ROM image, which provides information on the location and name of files contained in the image. || BIN
| ROMGSCRT || 0x8A0A00 || 0x80000 ||   || BIN
|-
|-
| EXTINFO || 0x8236C0 || 0x2CC0 || Contains the "EXTINFO" for all files in the ROM image. || BIN
| NCDVDMAN || 0x8A3730 || 0x82D30 || It seems to be a heavily stripped-down CDVDMAN module, with no support for some S-command functions like sceCdRI. || ELF
|-
|-
| SBIN || 0x823D30 || 0x3330 || Seems to be the pad controller library for the PS1 monitor. || BIN
| SECRMAN || 0x8B0170 || 0x8F770 || Security Manager. Signing is NOT done with the one in ROM, but with a special version that comes with the utility discs. Looks like PS3 units have a different SECRMAN module from retail sets, similar to PS2 TOOL one. || ELF
|-
|-
| LOGO || 0x82ACD0 || 0xA2D0 || PS1 logo? || BIN
| MCMAN || 0x8B4630 || 0x93C30 || Memory Card Manager. || ELF
|-
|-
| IOPBTCONF || 0x83F420 || 0x1EA20 || Boot configuration file for the IOP, during the final phase of the IOP reset. If no UDNL module is specified, the IOP will only have a single IOP reset in the reboot process, with the modules listed in IOPBTCONF.  || BIN
| PADMAN || 0x8C3AC0 || 0xA30C0 || Pad manager. || ELF
|-
|-
| IOPBTCON2 || 0x83F510 || 0x1EB10 || Boot configuration file for the IOP, for the first phase of the IOP reset (before UDNL is loaded). || BIN
| CDVDMAN || 0x8CD210 || 0xAC810 || The CD/DVD manager. || ELF
|-
|-
| SYSMEM || 0x83F5E0 || 0x1EBE0 || System Memory Manager. || ELF
| CDVDFSV || 0x8D55C0 || 0xB4BC0 || The RPC server for CDVDMAN. || ELF
|-
|-
| LOADCORE || 0x840800 || 0x1FE00 || The core of IOP module loading. Provides the lowest level of IOP module loading functions. Also handles the startup of the IOP. || ELF
| FILEIO || 0x8DD980 || 0xBCF80 || RPC server for IOMAN. Sony has greatly changed the semantics and design of FILEIO after some point. Connecting an old FILEIO EE RPC client to a newer server will result in a severe IOP crash. || ELF
|-
|-
| EXCEPMAN || 0x842D80 || 0x22380 || Exception manager. || ELF
| CLEARSPU || 0x8DFA80 || 0xBF080 || Seems to clear/reset the SPU, but is known to cause crashes under some conditions. Not sure if it's buggy or not. Only used by the OSDSYS of the SCPH-10000 and SCPH-15000, probably retained for backward-compatibility. || ELF
|-
|-
| INTRMANP || 0x843960 || 0x22F60 || Interrupt Manager. According to wisi, it is for PS mode. || ELF
| UDNL || 0x8E16C0 || 0xC0CC0 || It is responsible for selecting the modules and starting the IOP, during the final phase of the IOP reset where the desired modules are to be loaded into the IOP. || ELF
|-
|-
| INTRMANI || 0x845370 || 0x24970 || Interrupt Manager. According to wisi, it is for IOP mode. || ELF
| IGREETING || 0x8E35C0 || 0xC2BC0 || Displays boot information (i.e. IOP boot type, EBOOTP, IBOOTP, switch positions for DSW602 and the type of DSW602 board installed || ELF
|-
|-
| SSBUSC || 0x8471B0 || 0x267B0 || SSBUS Controller library. The SSBUS seems to be the bus that all peripherals get connected to. It seems to have the power to control the mapping of the device registers, as well as access timing. || ELF
| EELOAD || 0x8E4620 || 0xC3C20 || The EE ELF loader, which is loaded by LoadExecPS2() to 0x00082000 in PS2 for loading ELFs. || BIN
|-
|-
| TIMEMANP || 0x847920 || 0x26F20 || Timer Manager (PS mode) || ELF
| XCDVDMAN || 0x8F37A0 || 0xD2DA0 || cdvd_driver - Updated module || ELF
|-
|-
| TIMEMANI || 0x848500 || 0x27B00 || Timer Manager (IOP mode) || ELF
| XCDVDFSV || 0x902530 || 0xE1B30 || cdvd_ee_driver - Updated module || ELF
|-
|-
| DMACMAN || 0x849130 || 0x28730 || DMA Controller Manager. || ELF
| OSDSND || 0x910960 || 0xEFF60 || OSD sound library. This is actually the tentative sound driver, which is called "librspu2" in the Sony SDK. || ELF
|-
|-
| SYSCLIB || 0x84C830 || 0x2BE30 || System C Library. || ELF
| PS2LOGO || 0x93B5B0 || 0x11ABB0 || Displays the PlayStation 2 logo from the inserted disc. For newer consoles, if the logo cannot be decrypted properly, it will fall back to the browser. Not actually required to boot games, but the Sony OSDSYS boots PS2 games through this program. || ELF
|-
|-
| HEAPLIB || 0x84EF90 || 0x2E590 || Memory HEAP LIBrary (i.e. thvpool, thfpool) || ELF
| XPARAM2 || 0x957F00 || 0x137500 || Store IOP emulation settings/flags || ELF
|-
|-
| THREADLIB || 0x84FC90 || 0x2F290 || Multi_Thread_Manager || ELF
| OSDSYS || 0x95A400 || 0x139A00 || The browser, in ps3 is stripped to parse xparam2. No real browser here. || BIN
|-
|-
| VBLANK || 0x858A20 || 0x38020 || V-Blank management || ELF
| PIOPRP || 0x998280 || 0x177880 || Present in the PS3 ps2_(gx/soft/net)emu; contains version 3.1.0 of the IOP software (compared to version 1.3.4 on the root). || BIN
|-
|-
| IOMAN || 0x8597B0 || 0x38DB0 || IO Manager || ELF
| KERNEL || 0x9DC1E0 || 0x1BB7E0 || The EE kernel || BIN
|-
|}
| MODLOAD || 0x85B720 || 0x3AD20 || IOP module loader. || ELF
Description source: https://gist.github.com/uyjulian/25291080f083987d3f3c134f593483c5
|-
 
| ROMDRV || 0x85DA70 || 0x3D070 || ROM driver. Provides access to the boot ROM (rom0). || ELF
==Virtual PS2 HDD==
|-
There are 2 different "PS2 game" contents that can be installed in PS3 HDD (CATEGORY's [[PARAM.SFO#CATEGORY_For_HDD_contents | 2P and 2G ]]).
| ADDDRV || 0x85E960 || 0x3DF60 ||  Adds support for the DVD ROM (rom1:), via ROMDRV. || ELF
'''2P''' are games released from PSN as "PS2 Classic" in .PKG format, and '''2G''' are a few real "PS2 DVD discs" that can be installed in the PS3 HDD, this installation is managed by the '''PS2_system_data.pkg'''.
|-
 
| STDIO || 0x85EDC0 || 0x3D3C0 || Standard I/O library. || ELF
This games can be installed in real PS2 (in the internall HDD of a PS2 fat)... later this same installation was used in the [http://en.wikipedia.org/wiki/PSX_(DVR) PSX]... and when implemented in PS3 there was needed to use a '''virtual PS2 HDD''' image file keeping the same format than the original HDD used in PS2.
|-
 
| SIFMAN || 0x85F9B0 || 0x3EFB0 || SIF manager. || ELF
Game files (extracted from the real PS2 disc) are installed in a '''IMAGE.DAT''' file, this file is a 1:1 "raw copy" of a PS2 HDD.
|-
 
| SIFINIT || 0x860F50 || 0x40550 || Initializes the SIF. || ELF
This '''IMAGE.DAT''' is placed in the "install folder" (inside USRDIR folder) and his size can vary up to 10+GB
|-
 
| EESYNC || 0x861370 || 0x40970 || For synchronizing with the EE, at the end of IOP resets. EESYNC from DNAS images are evil; they also perform a memory wipe of the region from 0x00084000 to .0x00100000. || ELF
There are 2 different installations: the most common is used to store "game expansions" (e.g: used by additional content in SOCOM games)... the other type of installation is a "full install" and it seems the only game that uses it is "Final Fantasy XI" (main game installation when the game boots for first time + game expansions added later when needed in the same '''IMAGE.DAT''')
|-
 
| EENULL || 0x861810 || 0x40E10 || The idle thread (id #0) module, in ps2 loaded to 0x00081FC0. || BIN
'''PS2_system_data.pkg''' itself uses an '''IMAGE.DAT''' file (6.43 MB)
|-
 
| PS1ID || 0x861850 || 0x40E50 ||  Only found in newer boot ROMs || BIN
The structure of this "virtual PS2 HDD" uses an "APA header" and a "APA MBR" + several "APA partitions", some of them containing "PFS filesystems".
|-
 
| LIBFI || 0x861860 || 0x40E60 || Not present in the boot ROM of the SCPH-10000 and SCPH-15000. || BIN
Error message trying to boot a CATEGORY "2G" game with hand-made SFO's and invalid IMAGE.DAT file:
|-
'''The game partition for this game cannot be created because the installed game is corrupted.'''
| PS1VERJ || 0x861950 || 0x40F50 ||  || BIN
'''To perform this operation, delete the game, and then reinstall the game using the disc.'''
|-
 
| PS1VERA || 0x861960 || 0x40F60 ||  || BIN
*Notes
**List of PS2 disc games compatibles with PS3 HDD installation hardcoded in '''dev_flash/vsh/module/[[game_ext_plugin]].sprx'''
**Virtuall PS2 HDD support module '''dev_flash/vsh/module/[[libps2hdd]].sprx''' ?
 
===PS2 System Data (PSN HDD Tool package)===
A direct link to the package can be found in NoPayStation database in DLCs
 
Content ID: IP9100-NPIA00001_00-PS2HDDSYSDAT0001
QA Digest: 2A876715D42678BB7A6E00C030C0121B
  HASH: E1B0DBE46FC44190DC7A140681D8B9D4
 
http://manuals.playstation.net/document/en/ps3/current/game/hddinstall.html
 
'''Titles supporting HDD installation'''
* Nobunaga's Ambition Online and Expansion Packs
* Final Fantasy XI (disc1=SCUS97266 disc2=SCUS97269)and Expansion Discs
* SOCOM II: U.S. NAVY SEALs and Related discs included with OPM Issue 87, OPM Issue 88, OPM Issue 89, OPM Issue 90
* SOCOM 3: U.S. NAVY SEALs
* SOCOM: U.S. NAVY SEALs Combined Assault
* Front Mission Online
* Official PlayStation Magazine Issue 87, 88, 89, 90 Discs
([[Talk:Emulation#PS2_HDD | non-official ps2hdd gameslist ]])
 
===TitleID/DiscID in game_ext_plugin.sprx===
 
Mainly Final Fantasy 11, Nobunaga Ambition Online, Socom IDs and the required HDD Gigabyte amount for install onto the internal hdd.
 
Speculation: flags are AND' with 0,1,2 (selected from sys_sm_get_hw_config according to ps2emu hardware flags? 0 = no hw?, 1 = gxemu?, 2=full hw? )
 
{| class="wikitable" style="font-size:small;"
! Flags !! DiscID !! Alternative? DiscID !! GigaByte !! Title !! 0 = VMC<br>1 = IMAGE.DAT !! Internal Name? !! GigaByte
|-
|-
| PS1VERE || 0x861970 || 0x40F70 || || BIN
| rowspan="9" | 0xFFFF || SLPS20200 || rowspan="9" | SLPS25200 || rowspan="9" | 0x15 || rowspan="9" | FINAL FANTASY XI || rowspan="9" | 1 || rowspan="9" | PP.SLPM-25200.MAGIC.APPLICATION || rowspan="9" | 0x15
|-
|-
| PS1VERC || 0x861980 || 0x40F80 ||  || BIN
| SLPM65705
|-
|-
| PS1VERH || 0x861990 || 0x40F90 ||  || BIN
| SLPM65706
|-
|-
| OSDSYS || 0x8619A0 || 0x40FA0 || The browser || BIN
| SLPM65953
|-
|-
| - || 0x8619B0 || 0x40FB0 ||  || BIN
| SLPM66393
|-
|-
| RDRAM || 0x861A00 || 0x41000  || Provides a RDRAM test for the EE at power-on. This is run from RESET. || BIN
| SLPM66394
|-
|-
| - || 0x864190 || 0x43A30 ||  || BIN
| SLPM66893
|-
|-
| EELOADCNF || 0x864200 || 0x43D50 || Contains the IOP boot configuration file for EELOAD. || BIN
| SLPM66894
|-
|-
| SIFCMD || 0x864900 || 0x43F00 || SIF command module. Contains the SIF command and SIF RPC functions. || ELF
| SLPM55229
|-
|-
| REBOOT || 0x866B40 || 0x46140 || The reboot service. Receives IOP reset packets from the EE, from across the SIF. || ELF
|rowspan="4" | 0x0001 || SLPM65197 || rowspan="4" | SLPM65197 || rowspan="4" | 0x07 || rowspan="4" | 信長の野望 Online || rowspan="4" | 1 || rowspan="4" | PP.SLPM-65197.MAGIC.APPLICATION || rowspan="4" | 0x07
|-
|-
| LOADFILE || 0x867310 || 0x46910 || The RPC server for MODLOAD || ELF
| SLPM65783
|-
|-
| EECONF || 0x869A70 || 0x49070 || Loads part of the system configuration from the MECHACON EEPROM. Also configures and resets some peripherals, depending on the model version. In slimlines, and possibly on PS3 EECONF will also load the MAC address. || ELF
| SLPM66539
|-
|-
| - || 0x86A9F0 || 0x49FF0 ||  || BIN
| SLPM66954
|-
|-
| IOPBOOT || 0x86AA00 || 0x4A000 || IOP bootup program || BIN
|rowspan="5" | 0xFFFF || SCUS97269 || rowspan="5" | SCUS97269 || rowspan="5" | 0x15 || rowspan="5" | FINAL FANTASY XI || rowspan="5" | 1 || rowspan="5" | PP.SCUS-97266.MAGIC.APPLICATION || rowspan="5" | 0x15
|-
|-
| - || 0x86BB60 || 0x4B160 ||  || BIN
| SLUS21070
|-
|-
| TBIN || 0x86C200 || 0x4B800 ||  The PS1 monitor program. Seems to be the PS1 BIOS. This is started by RESET, when the IOP is in PS1 mode. || BIN
| SLUS21404
|-
|-
| XSHA1 || 0x87A170 || 0x59770 || sha1 - this only present in PS3. It is used as additional antipiracy check. It seems that it calculate disc main elf checksum and compares it with some database. Config related?|| ELF
| SLUS21694
|-
|-
| XLOADFILE || 0x87B140 || 0x5A740 || Updated module || ELF
| SLUS21704
|-
|-
| SIO2MAN || 0x87E1F0 || 0x5D7F0 || SIO2 manager. Provides access to the SIO2 interface. || ELF
|rowspan="7" | 0xFFFF || SCUS97275 || rowspan="7" | SCUS97275 || rowspan="7" | 0x02 || rowspan="7" | SOCOM || rowspan="7" | 0 || rowspan="7" | PP.SCUS-97275..SOCOM_II || rowspan="7" | 0x02
|-
|-
| - || 0x87FE20 || 0x5F420 ||  || BIN
| SCUS97474
|-
|-
| BNNETCNF || 0x881D00 || 0x61300 ||  Network configuration. Used by BB Navigator Network Configuration Library. || BIN
| SCUS97340
|-
|-
| MCSERV || 0x881D40 || 0x61340 ||  RPC server for MCMAN. || ELF
| SCUS97341
|-
|-
| - || 0x883A40 || 0x63040 ||  || BIN
| SCUS97342
|-
|-
| KROMG || 0x884A00 || 0x64000 ||  || BIN
| SCUS97442
|-
|-
| - || 0x8866C0 || 0x65CC0 ||  || BIN
| SCUS97545
|-
|}
| KROM || 0x886A30 || 0x66030 || Kanji ROM? Not sure where this is used. || BIN
 
|-
In PS2 Emulator same Title IDs are present with following information:
| - || 0x8A0870 || 0x7FE70 ||   || BIN
SLPS25200 FINAL FANTASY XI          : 0x100000000 (4 GB?)
|-
SCUS97269 FINAL FANTASY XI          : 0x300000000 (12GB?)
| ROMVER || 0x8A0900 || 0x7FF00 || ROM version. || BIN
SLPM65981 Front Mission Online      : 0x100000000 (4 GB?)
|-
SLPM65197 Nobunagas Ambition Online : 0x200000000 (8 GB?)
| - || 0x8A0910 || 0x7FF10 ||  || BIN
 
|-
==Emulators management from GameOS==
| VERSTR || 0x8A0930 || 0x7FF30 || Version string. Probably PS1 ROM will use this because that this string is also present in PlayStation consoles. || BIN
 
|-
===Mountpoints===
| - || 0x8A0990 || 0x7FF90 ||  || BIN
   dev_ps2disc
|-
  dev_ps2disc1
| ROMGSCRT || 0x8A0A00 || 0x80000 ||  || BIN
 
|-
===ps2_netemu syscalls ===
| NCDVDMAN || 0x8A3730 || 0x82D30 || It seems to be a heavily stripped-down CDVDMAN module, with no support for some S-command functions like sceCdRI. || ELF
|-
0x0 - 0 = exec smth,
| SECRMAN || 0x8B0170 || 0x8F770 || Security Manager. Signing is NOT done with the one in ROM, but with a special version that comes with the utility discs. Looks like PS3 units have a different SECRMAN module from retail sets, similar to PS2 TOOL one. || ELF
      1 = 0x132 panic,
|-
      2 = 0x133 panic,
| MCMAN || 0x8B4630 || 0x93C30 || Memory Card Manager. || ELF
      3 = 0x134 panic,
|-
      4 = 0x135 panic,
| PADMAN || 0x8C3AC0 || 0xA30C0 || Pad manager. || ELF
      else = 0x136 panic)
|-
0xC - exec smth
| CDVDMAN || 0x8CD210 || 0xAC810 || The CD/DVD manager. || ELF
0x5 - exec smth
|-
0x6 - exec smth
| CDVDFSV || 0x8D55C0 || 0xB4BC0 || The RPC server for CDVDMAN. || ELF
0x10 - panic
|-
 
| FILEIO || 0x8DD980 || 0xBCF80 || RPC server for IOMAN. Sony has greatly changed the semantics and design of FILEIO after some point. Connecting an old FILEIO EE RPC client to a newer server will result in a severe IOP crash. || ELF
Basically are [[HV_Syscalls#HV_Syscalls|hvsc syscalls]] (xoris    r11, r11, 0x8000)
|-
 
| CLEARSPU || 0x8DFA80 || 0xBF080 || Seems to clear/reset the SPU, but is known to cause crashes under some conditions. Not sure if it's buggy or not. Only used by the OSDSYS of the SCPH-10000 and SCPH-15000, probably retained for backward-compatibility. || ELF
0x80000000 - [[HV_Syscall_Reference#lv1_allocate_memory]]
|-
0x80000001 - [[HV_Syscall_Reference#lv1_write_htab_entry]]
| UDNL || 0x8E16C0 || 0xC0CC0 || It is responsible for selecting the modules and starting the IOP, during the final phase of the IOP reset where the desired modules are to be loaded into the IOP. || ELF
0x80000002 - [[HV_Syscall_Reference#lv1_construct_virtual_address_space]]
|-
0x80000007 - [[HV_Syscall_Reference#lv1_select_virtual_address_space]]
| IGREETING || 0x8E35C0 || 0xC2BC0 || Displays boot information (i.e. IOP boot type, EBOOTP, IBOOTP, switch positions for DSW602 and the type of DSW602 board installed || ELF
0x80000009 - [[HV_Syscall_Reference#lv1_pause]]
|-
0x8000000F - [[HV_Syscall_Reference#lv1_put_iopte]]
| EELOAD || 0x8E4620 || 0xC3C20 || The EE ELF loader, which is loaded by LoadExecPS2() to 0x00082000 in PS2 for loading ELFs. || BIN
0x80000012 - [[HV_Syscall_Reference#lv1_construct_event_receive_port]]
|-
0x8000001A - [[HV_Syscall_Reference#lv1_detect_pending_interrupts]]
| XCDVDMAN || 0x8F37A0 || 0xD2DA0 || cdvd_driver - Updated module || ELF
0x8000001B - [[HV_Syscall_Reference#lv1_end_of_interrupt]]
|-
0x8000001C - [[HV_Syscall_Reference#lv1_connect_irq_plug]]
| XCDVDFSV || 0x902530 || 0xE1B30 || cdvd_ee_driver - Updated module || ELF
0x80000039 - [[HV_Syscall_Reference#lv1_construct_logical_spe]]
|-
0x8000003D - [[HV_Syscall_Reference#lv1_set_spe_interrupt_mask]]
| OSDSND || 0x910960 || 0xEFF60 || OSD sound library. This is actually the tentative sound driver, which is called "librspu2" in the Sony SDK. || ELF
0x80000042 - [[HV_Syscall_Reference#lv1_clear_spe_interrupt_status]]
|-
0x80000043 - [[HV_Syscall_Reference#lv1_get_spe_interrupt_status]]
| PS2LOGO || 0x93B5B0 || 0x11ABB0 || Displays the PlayStation 2 logo from the inserted disc. For newer consoles, if the logo cannot be decrypted properly, it will fall back to the browser. Not actually required to boot games, but the Sony OSDSYS boots PS2 games through this program. || ELF
0x80000045 - [[HV_Syscall_Reference#lv1_get_logical_ppe_id]]
|-
0x80000049 - [[HV_Syscall_Reference#lv1_set_interrupt_mask]]
| XPARAM2 || 0x957F00 || 0x137500 || Store IOP emulation settings/flags || ELF
0x8000004A - [[HV_Syscall_Reference#lv1_get_logical_partition_id]]
|-
0x8000004E - [[HV_Syscall_Reference#lv1_get_spe_irq_outlet]]
| OSDSYS || 0x95A400 || 0x139A00 || The browser, in ps3 is stripped to parse xparam2. No real browser here. || BIN
0x8000005B - [[HV_Syscall_Reference#lv1_get_repository_node_value]]
|-
0x8000005F - [[HV_Syscall_Reference#lv1_read_htab_entries]]
| PIOPRP || 0x998280 || 0x177880 || Present in the PS3 ps2_(gx/soft/net)emu; contains version 3.1.0 of the IOP software (compared to version 1.3.4 on the root). || BIN
0x80000061 - [[HV_Syscall_Reference#lv1_set_vmx_graphics_mode]]
|-
0x80000062 - [[HV_Syscall_Reference#lv1_set_thread_switch_control_register]]
| KERNEL || 0x9DC1E0 || 0x1BB7E0 || The EE kernel || BIN
0x80000074 - [[HV_Syscall_Reference#lv1_allocate_io_segment]]
|}
  0x80000076 - [[HV_Syscall_Reference#lv1_allocate_ioid]]
Description source: https://gist.github.com/uyjulian/25291080f083987d3f3c134f593483c5
0x80000078 - [[HV_Syscall_Reference#lv1_construct_io_irq_outlet]]
 
0x8000007C - [[HV_Syscall_Reference#lv1_undocumented_function_124]]
===Bios region patch===
0x8000007D - [[HV_Syscall_Reference#lv1_undocumented_function_125]]
 
  0x8000007E - [[HV_Syscall_Reference#lv1_undocumented_function_126]]
Emulator patch loaded bios image to set proper region based on target_id, and string (separated for readability):
0x80000088 - [[HV_Syscall_Reference#lv1_undocumented_function_136]]
  JJjpnJJ AAengAUU EEengEEE EEengEOA HHengJAG ERengERD CCschJCC HKkorJAG HHtchJAG AAspaAMM
0x8000008C - [[HV_Syscall_Reference#lv1_construct_lpm]]
Note: Additional space after first set is intentional and exist also in full string.<br><br>
0x8000008D - [[HV_Syscall_Reference#lv1_destruct_lpm]]
'''Target id to region pairing:'''
  0x8000008E - [[HV_Syscall_Reference#lv1_start_lpm]]
  * JJjpnJJ for 0x83
0x8000008F - [[HV_Syscall_Reference#lv1_stop_lpm]]
  * AAengAUU for 0x84 , others (DECR, etc.)
  0x80000090 - [[HV_Syscall_Reference#lv1_copy_lpm_trace_buffer]]
  * EEengEEE for 0x85 , 0x87 (also forced if game id from SYSTEM.CNF is xxEx_yy.zzz)
0x80000091 - [[HV_Syscall_Reference#lv1_add_lpm_event_bookmark]]
  * HHengJAG for 0x86 , 0x8A , 0x8E
0x80000092 - [[HV_Syscall_Reference#lv1_delete_lpm_event_bookmark]]
  * AAspaAMM for 0x88 , 0x8F
0x80000093 - [[HV_Syscall_Reference#lv1_set_lpm_interrupt_mask]]
  * EEengEOA for 0x89
0x80000094 - [[HV_Syscall_Reference#lv1_get_lpm_interrupt_status]]
  * HHtchJAG for 0x8B
0x80000095 - [[HV_Syscall_Reference#lv1_set_lpm_general_control]]
  * ERengERD for 0x8C
0x80000096 - [[HV_Syscall_Reference#lv1_set_lpm_interval]]
  * CCschJCC for 0x8D (unreleased PS3 Chinese model)
0x80000097 - [[HV_Syscall_Reference#lv1_set_lpm_trigger_control]]
  * HKkorJAG unused
0x80000098 - [[HV_Syscall_Reference#lv1_set_lpm_counter_control]]
 
  0x80000099 - [[HV_Syscall_Reference#lv1_set_lpm_group_control]]
Bios is patched using EE memory mapping addresses, so offset in file + 0x1FC00000.
  0x8000009A - [[HV_Syscall_Reference#lv1_set_lpm_debug_bus_control]]
Using HKkorJAG example, addresses below are set to:
0x8000009B - [[HV_Syscall_Reference#lv1_set_lpm_counter]]
 
0x8000009C - [[HV_Syscall_Reference#lv1_set_lpm_signal]]
  * 0x1FC7FF04 = H (x in "0220xD20121227" string)
  0x8000009D - [[HV_Syscall_Reference#lv1_set_lpm_spr_trigger]]
  * 0x1FC7FF14 = K
  0x800000A3 - [[HV_Syscall_Reference#lv1_write_virtual_uart]]
  * 0x1FC7FF15 = k
  0x800000A4 - [[HV_Syscall_Reference#lv1_set_virtual_uart_param]]
  * 0x1FC7FF16 = o
  0x800000A5 - [[HV_Syscall_Reference#lv1_get_virtual_uart_param]]
  * 0x1FC7FF17 = r
  0x800000A6 - [[HV_Syscall_Reference#lv1_configure_virtual_uart_irq]]
  * 0x1FC7FF52 = J (x in "System ROM Version 5.0 12/27/12 x" string)
  0x800000AA - [[HV_Syscall_Reference#lv1_open_device]]
  * 0x1FC7FF20 = A
  0x800000AB - [[HV_Syscall_Reference#lv1_close_device]]
  * 0x1FC7FF90 = G
  0x800000AC - [[HV_Syscall_Reference#lv1_map_device_mmio_region]]
 
  0x800000AE - [[HV_Syscall_Reference#lv1_allocate_device_dma_region]]
==Virtual PS2 HDD==
  0x800000AF - [[HV_Syscall_Reference#lv1_free_device_dma_region]]
There are 2 different "PS2 game" contents that can be installed in PS3 HDD (CATEGORY's [[PARAM.SFO#CATEGORY_For_HDD_contents | 2P and 2G ]]).
  0x800000B0 - [[HV_Syscall_Reference#lv1_map_device_dma_region]]
'''2P''' are games released from PSN as "PS2 Classic" in .PKG format, and '''2G''' are a few real "PS2 DVD discs" that can be installed in the PS3 HDD, this installation is managed by the '''PS2_system_data.pkg'''.
0x800000B1 - [[HV_Syscall_Reference#lv1_unmap_device_dma_region]]
 
0x800000B2 - [[HV_Syscall_Reference#lv1_read_pci_config]]
This games can be installed in real PS2 (in the internall HDD of a PS2 fat)... later this same installation was used in the [http://en.wikipedia.org/wiki/PSX_(DVR) PSX]... and when implemented in PS3 there was needed to use a '''virtual PS2 HDD''' image file keeping the same format than the original HDD used in PS2.
0x800000B3 - [[HV_Syscall_Reference#lv1_write_pci_config]]
0x800000C5 - [[HV_Syscall_Reference#lv1_connect_interrupt_event_receive_port]]
  0x800000CF - [[HV_Syscall_Reference#lv1_enable_logical_spe]]
  0x800000D2 - [[HV_Syscall_Reference#lv1_gpu_open]]
  0x800000D4 - [[HV_Syscall_Reference#lv1_gpu_device_map]]
  0x800000D6 - [[HV_Syscall_Reference#lv1_gpu_memory_allocate]]
  0x800000D9 - [[HV_Syscall_Reference#lv1_gpu_context_allocate]]
  0x800000DD - [[HV_Syscall_Reference#lv1_gpu_context_iomap]]
  0x800000E1 - [[HV_Syscall_Reference#lv1_gpu_context_attribute]]
  0x800000E3 - [[HV_Syscall_Reference#lv1_gpu_context_intr]]
0x800000E4 - [[HV_Syscall_Reference#lv1_gpu_attribute]]
0x800000F5 - [[HV_Syscall_Reference#lv1_storage_read]]
0x800000F6 - [[HV_Syscall_Reference#lv1_storage_write]]
0x800000F9 - [[HV_Syscall_Reference#lv1_storage_get_async_status]]


Game files (extracted from the real PS2 disc) are installed in a '''IMAGE.DAT''' file, this file is a 1:1 "raw copy" of a PS2 HDD.
===LPAR / AUTH ID's===
 
{| border="1" cellspacing="0" cellpadding="5" border="#999" class="wikitable" style="border:1px solid #999; border-collapse: collapse;"
This '''IMAGE.DAT''' is placed in the "install folder" (inside USRDIR folder) and his size can vary up to 10+GB
|- bgcolor="#cccccc"
! Name !! Auth ID !! Self<br />(/dev_flash/ps2emu) !! Notes
|-
| PS2_LPAR  || 0x1020000003000001 || rowspan="2" | ps2_emu.self ||
|-
| *SCE_CELLOS_SYSTEM_MGR_PS2  || 0x107000001D000001 ||
|-
| PS2_GX_LPAR || 0x1020000003000001 || rowspan="2" | ps2_gxemu.self ||
|-
| *SCE_CELLOS_SYSTEM_MGR_PS2_GX || 0x107000001D000001 ||
|-
| PS2_SW_LPAR || 0x1020000003000001 || rowspan="2" | ps2_softemu.self ||
|-
| *SCE_CELLOS_SYSTEM_MGR_PS2_SW || 0x107000001D000001 ||
|-
| PS2_NE_LPAR || 0x1020000003000001 || rowspan="2" | ps2_netemu.self ||
|-
| *SCE_CELLOS_SYSTEM_MGR_PS2_NE || 0x107000001D000001 ||
|-
|}


There are 2 different installations: the most common is used to store "game expansions" (e.g: used by additional content in SOCOM games)... the other type of installation is a "full install" and it seems the only game that uses it is "Final Fantasy XI" (main game installation when the game boots for first time + game expansions added later when needed in the same '''IMAGE.DAT''')
===Getting compatibility hardware info===
See: [[PS2_Compatibility#Software]]


'''PS2_system_data.pkg''' itself uses an '''IMAGE.DAT''' file (6.43 MB)
===ps2bootparam.dat===
A file created at path: dev_hdd0/tmp/game/'''ps2bootparam.dat'''
*See: [[ps2bootparam.dat]]<!--we need this page because we have others like that in wiki-->


The structure of this "virtual PS2 HDD" uses an "APA header" and a "APA MBR" + several "APA partitions", some of them containing "PFS filesystems".
===Cobra core===
taken from storage_ext.c
<pre> patch_ps2emu_entry(ps2emu_type); </pre>
*sets proper ps2_(gx/soft)emu.self path for reboot
*patches ss_storage service 0x5004 disc checks on ss_server3.self inside lv1
  (Change from Parameter li r3, 2 and li r3, 1E (Drive Authentification) to li r3, 0x29 (Reset Drive))
*and the usual either replace read/ioctl for iso etc.


Error message trying to boot a CATEGORY "2G" game with hand-made SFO's and invalid IMAGE.DAT file:
==Game CONFIG==
'''The game partition for this game cannot be created because the installed game is corrupted.'''
Some of the PS2 emulator types (such ps2_gxemu.self, ps2netemu.self) are able to load config commands that are applyed "by game ID". The concept of "game patches" is not technically correct because some of the commands does patching functions but others does other things (not patching), and other commands works as switches or sets a value that are enviromental settings for the emulator (not for the game) but because are applyed "by game" should be considered enviromental settings for that specific game, so for simplification purposes you can think in all this data as "game configs"
'''To perform this operation, delete the game, and then reinstall the game using the disc.'''


*Notes
This "game config" data seems to work in the same way for all the PS2 emulator types but can be located in different places, some are hardcoded inside the emulators itself (inside the .self), and at the time the "PS2 classics" emulator (ps2_netemu.self) was developed this config can be loaded from an external file<!--and there is some more inside some .sprx or inside the ps2 hdd data pkg ?-->
**List of PS2 disc games compatibles with PS3 HDD installation hardcoded in '''dev_flash/vsh/module/[[game_ext_plugin]].sprx'''
**Virtual PS2 HDD support module '''dev_flash/vsh/module/[[libps2hdd]].sprx''' ?


===PS2 System Data (PSN HDD Tool package)===
In short, the "game configs" can modify the game image (by patching it) and can be used to configure the virtual PS2 (the emulated machine). And can be loaded from hardcoded data (inside the .self) or from an external file (this feature is supported only by ps2_netemu.self)
A direct link to the package can be found in NoPayStation database in DLCs


Content ID: IP9100-NPIA00001_00-PS2HDDSYSDAT0001
The config data consists in a list of concatenated values of 8 bytes lenght (uint32_t), and can be processed like this:
  QA Digest: 2A876715D42678BB7A6E00C030C0121B
  union{
  HASH: E1B0DBE46FC44190DC7A140681D8B9D4
  uint32_t command
  ...data...
  }


http://manuals.playstation.net/document/en/ps3/current/game/hddinstall.html
===Config Commands===
ps2_netemu.self fw4.50 sub_12D7D8, fw4.81 sub_12E050
params are uint32_t unless noted.


'''Titles supporting HDD installation'''
At the time of writing this, most of the commands are completely or partially unknown.<br />
* Nobunaga's Ambition Online and Expansion Packs
If you want to read some speculation and brainstorming about them, please join the {{talk}} page
* Final Fantasy XI (disc1=SCUS97266 disc2=SCUS97269)and Expansion Discs
* SOCOM II: U.S. NAVY SEALs and Related discs included with OPM Issue 87, OPM Issue 88, OPM Issue 89, OPM Issue 90
* SOCOM 3: U.S. NAVY SEALs
* SOCOM: U.S. NAVY SEALs Combined Assault
* Front Mission Online
* Official PlayStation Magazine Issue 87, 88, 89, 90 Discs
([[Talk:Emulation#PS2_HDD | non-official ps2hdd gameslist ]])


===TitleID/DiscID in game_ext_plugin.sprx===
{| class="wikitable sortable"
 
Mainly Final Fantasy 11, Nobunaga Ambition Online, Socom IDs and the required HDD Gigabyte amount for install onto the internal hdd.
 
Speculation: flags are AND' with 0,1,2 (selected from sys_sm_get_hw_config according to ps2emu hardware flags? 0 = no hw?, 1 = gxemu?, 2=full hw? )
 
{| class="wikitable" style="font-size:small;"
! Flags !! DiscID !! Alternative? DiscID !! GigaByte !! Title !! 0 = VMC<br>1 = IMAGE.DAT !! Internal Name? !! GigaByte
|-
|-
| rowspan="9" | 0xFFFF || SLPS20200 || rowspan="9" | SLPS25200 || rowspan="9" | 0x15 || rowspan="9" | FINAL FANTASY XI || rowspan="9" | 1 || rowspan="9" | PP.SLPM-25200.MAGIC.APPLICATION || rowspan="9" | 0x15
! CMD ID !! Example !! Notes
|-
|-
| SLPM65705
| 0x00|||| Copy following title id for enforcing if available.
|-
| 0x01|||| 2x uint32_t Params ( addr, func_id 0-0x3B) - EE_ADD_HOOK
 
Most of 0x01 commands are strictly per game fixes, or at least per game engine.
  [Grand Theft Auto 3 (EU)] uses 0x349790, 0x10 (somewhat floats related)
  [Max Payne] uses 0x52E9F4, 3 and 0x52EB78, 2 (set lwsync 0)
Maximum Amount of Usage: ?
(The command is used 3 times consecutively by SLUS-20565 (Champions of Norrath) and SLUS-21494 (Need for Speed Carbon)
game configs hardcoded inside ps2_gxemu.self)
{| class="wikitable sortable"
|-
!Function ID!! Notes
|-
|-
| SLPM65706
|0x00||
|-
|-
| SLPM65953
|0x01|| FIFA 2000 use it as hook for EE kernel at 0x80001858 (DMAC related).
|-
|-
| SLPM66393
|0x02||
Max Payne
sets some sync off?
|-
|-
| SLPM66394
|0x03||
Max Payne
sets some sync on?
|-
|-
| SLPM66893
|0x04|| Used by Castle Shikigami II store 0 on 0x94A290 (EMU Memory)
|-
|-
| SLPM66894
|0x05|| Used by Star Wars games developed by Pandemic Studios (freeze fix), Worms 3D and NBA 08.
|-
|-
| SLPM55229
|0x06||
|-
|-
|rowspan="4" | 0x0001 || SLPM65197 || rowspan="4" | SLPM65197 || rowspan="4" | 0x07 || rowspan="4" | 信長の野望 Online || rowspan="4" | 1 || rowspan="4" | PP.SLPM-65197.MAGIC.APPLICATION || rowspan="4" | 0x07
|0x07||  
|-
|-
| SLPM65783
|0x08|| Harry Potter - Quidditch World Cup US use it at offset 0x2BD45C (EE)
|-
|-
| SLPM66539
|0x09|| Harry Potter - Quidditch World Cup US use it at offset 0x2BD620 (EE)
|-
|-
| SLPM66954
|0x0A||
|-
|-
|rowspan="5" | 0xFFFF || SCUS97269 || rowspan="5" | SCUS97269 || rowspan="5" | 0x15 || rowspan="5" | FINAL FANTASY XI || rowspan="5" | 1 || rowspan="5" | PP.SCUS-97266.MAGIC.APPLICATION || rowspan="5" | 0x15
|0x0B||  
|-
|-
| SLUS21070
|0x0C|| Used by Piglet's Big Game
|-
|-
| SLUS21404
|0x0D|| usleep(100)
|-
|-
| SLUS21694
|0x0E|| Used 3 times in Need for Speed - Carbon [Collector's Edition] US
|-
|-
| SLUS21704
|0x0F||
GTA 3 (US)
using 0x348B40, 0x18E1F0, 0x348EC8 ( + 200000000 base )
0x348B40 = start CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))
0x18E1F0 = start CCollision::ProcessColModels((CMatrix const &, CColModel &, CMatrix const &, CColModel &, CColPoint *, CColPoint *, float *))
0x348EC8 = Almost end (only loading values preserved on stack) of CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))
|-
|-
|rowspan="7" | 0xFFFF || SCUS97275 || rowspan="7" | SCUS97275 || rowspan="7" | 0x02 || rowspan="7" | SOCOM || rowspan="7" | 0 || rowspan="7" | PP.SCUS-97275..SOCOM_II || rowspan="7" | 0x02
|0x10||  
GTA 3 (EU)
using 0x349790, 0x18E1F0, 0x349B18 ( + 200000000 base )
0x349790 = start CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))
0x18E1F0 = start CCollision::ProcessColModels((CMatrix const &, CColModel &, CMatrix const &, CColModel &, CColPoint *, CColPoint *, float *))
0x349B18 = Almost end (only loading values preserved on stack) of CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))
|-
|-
| SCUS97474
|0x11||
GTA 3 (EU different ver.)
using 0x3495C0, 0x18E1F0, 0x349948 ( + 200000000 base )
0x3495C0 = start CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))
0x18E1F0 = start CCollision::ProcessColModels((CMatrix const &, CColModel &, CMatrix const &, CColModel &, CColPoint *, CColPoint *, float *))
0x349948 = Almost end (only loading values preserved on stack) of CTheScripts::ClearSpaceForMissionEntity((CVector const &, CEntity *))
|-
|-
| SCUS97340
|0x12|| Used by Disney/Pixar Finding Nemo (fixes the pause menu freeze)
if condition met...
store 0 in [ 0x204FC500 + 200000000 base] 0x4FC500 EE memory
|-
|-
| SCUS97341
|0x13||
|-
|-
| SCUS97342
|0x14||
|-
|-
| SCUS97442
|0x15||
|-
|-
| SCUS97545
|0x16|| Used exclusively by Champions of Norrath (NTSC)
|}
store 0x01114BA8 in [ 0x208EAB4C + 200000000 base]
 
store 0x010C9E40 in [ 0x208EAB6C + 200000000 base]
In PS2 Emulator same Title IDs are present with following information:
|-
  SLPS25200 FINAL FANTASY XI          : 0x00000001
|0x17||
SCUS97269 FINAL FANTASY XI          : 0x00000003
condition r18 == 0x8000
  SLPM65981 Front Mission Online      : 0x00000001
  setting:
  SLPM65197 Nobunagas Ambition Online : 0x00000002 (return different value in IOP SPEED 0x10000004 read (2 instead of default 3) )
  stores 0x40490FDA somewhere
 
Note: 0x40490FDA (3.14159250) is the highest float approximation to π in hexadecimal without going over the value.<br />
==Emulators management from GameOS==
Probably can improve FPU accuracy for some games.
 
|-
===Mountpoints===
|0x18||
  dev_ps2disc
  condition [ 0x20183F04 + 200000000 base ] == 0x0C060F2C
  dev_ps2disc1
  setting:
 
  stores 0 in address 0x20183F04, 0x20183F34, 0x20183F3C ( + 0x200000000 base )
===ps2_netemu syscalls ===
  0x183F0C, sub_46334 (4.70)
Vector at 0xC00 address.
  0x183F3C, sub_45DA4 (4.70)
  0x00 -
  0x183D74, sub_47B50 (4.70)
      0 = return ((unk from 0x1C30/0x1C38 << 56) | thread_number << 48 | ctrl_CT1 (in bit 30) | srr1_EE (in bit 15) | srr1_PS (in bit 14) | srr1_DR (in bit 4))
|-
          Where 0x1C30/0x1C38 is selected depending on current HW thread.
|0x19||
          Thread number is current SW thread
|-
          ctrl_CT1 is lower bit of CT (Current Thread) from PPC Control Register (0 for HW0, 1 for HW1)
|0x1A||
          srr1_EE is MSR Enable External Interrupts bit from time when exception occurred (from before syscall was executed)
store 0 in [ 0x209FD560 + 200000000 base]
          srr1_PS is MSR Problem State bit from time when exception occurred (from before syscall was executed)
store 0 in [ 0x209F9550 + 200000000 base]
          srr1_DR is MSR Data Relocate bit from time when exception occurred (from before syscall was executed)
store 0 in [ 0x20A01570 + 200000000 base]
      1 = 0x132 lv1 panic
store 0 in [ 0x209F9540 + 200000000 base]
      2 = 0x133 lv1 panic
store 0 in [ 0x209F5540 + 200000000 base]
      3 = 0x134 lv1 panic
  store 0 in [ 0x209F1530 + 200000000 base]
      4 = 0x135 lv1 panic
|-
      else = 0x136 lv1 panic
|0x1B|| store 0 in [ 0x20552168 + 200000000 base]
0x02 - Destroy init code and perform illegal instructions check. Memzero following addresses:
|-
      CODE: 0x16000 - 0x20B80
|0x1C|| store 1 in [ 0x20552168 + 200000000 base]
      DATA: 0x930F80 - 0x933F80
|-
      UNK: 0x3D016000 - 0x3D020B80
|0x1D|| store 0 in [ 0x20556C08 + 200000000 base]
0x03 - Enable additional code related to VU0/COP2.
|-
      3 = Patch 0x186C10 to NOP
|0x1E|| store 1 in [ 0x20556C08 + 200000000 base]
      4 = Patch 0x186C40 to NOP
|-
      anything else = LV1 panic
|0x1F|| store 0 in [ 0x205243D8 + 200000000 base]
0x04 - Unknown. Available for HW0 only.
|-
0x05 - External interrupts disable (48 bit in MSR). Returns previous MSR state.
|0x20|| store 1 in [ 0x205243D8 + 200000000 base]
0x06 - External interrupts enable (48 bit in MSR) if param & 0x8000 is not 0, otherwise disable them.
|-
      This sc is more like restore 48th bit of MSR, but many times emu use it to enable bit without using old state.
|0x21|| store 0 in [ 0x20524F88 + 200000000 base]
      Also, emulator panic LV1 if syscall is called while external interrupts are already enabled.
|-
0x0A - IPU emulation related syscall
|0x22|| store 1 in [ 0x20524F88 + 200000000 base]
0x0B - IPU emulation related syscall
|-
0x0C - Used in PS2 COP0 MTC0/MFC0 r9/r25 (count/perf), decrementer/timing related, return value in r15.
|0x23|| store 0 in [ 0x2047E7F8 + 200000000 base]
        Config CMD 0x17 disable that syscall for r9 (count) r/w, and alternative path is used. Perf r/w still use it.
|-
0x0E - PS2 counters/timers related (also used on vsync related functions).
|0x24|| store 1 in [ 0x2047E7F8 + 200000000 base]
  0x0F - PS2 counters/timers related (also used on vsync related functions).
|-
  0x10 - lv1 panic.
|0x25|| store 0 in [ 0x204802B8 + 200000000 base]
  0x11 - Wrapper for lv1_read_virtual_uart(port_number, buffer, bytes) [HW0 only, only ports 0 and 2 available, else panic]
|-
  0x12 - Wrapper for lv1_storage_send_device_command(dev_id, cmd_id, cmd_block, cmd_size, data_buffer, blocks)
|0x26|| store 1 in [ 0x204802B8 + 200000000 base]
      [HW0 only, Available only for threads: VRC, MECHA, HDD, else panic]
|-
      params are rearranged:
|0x27|| store 0 in [ 0x20586348 + 200000000 base]
      r3 = cmd_block (0x245E000 is added to this value internally)
|-
      r4 = data_buffer (0x245E000 is added to this value internally)
|0x28|| store 1 in [ 0x20586348 + 200000000 base]
      r5 = blocks
|-
      dev_id is taken from 0x245D008 and it is 0(HDD) for my dump.
|0x29|| store 0 in [ 0x205868A8 + 200000000 base]
      cmd_id = 0x88 and cmd_size is 8.
|-
0x13 - Set thread info unknown byte to 1 for respective thread and set unknown byte to 1 in USB thread.
|0x2A|| store 1 in [ 0x205868A8 + 200000000 base]
      [HW0 only, else panic. Available only for threads: BL2MAIN and BL2LNK, else do nothing in exception handler]
|-
0x14 - Same as 0x13 but set all bits to 0 regardless which thread called it.
|0x2B||
      [HW0 only, else panic. Available only for threads: BL2MAIN and BL2LNK, else do nothing in exception handler]
|-
  0x1002 - Invalidate gpu hvcalls.
|0x2C|| Shin Onimusha - Dawn of Dreams Fix ingame IPU runtime - JPN/US release [https://github.com/PCSX2/pcsx2/issues/1141 bug]
0x800000XX - HV Syscall where XX is syscall nr.
|-
else (other syscalls) - jump to 0x12670 (FW4.78 - current) for HW_0
|0x2D|| Shin Onimusha - Dawn of Dreams Fix ingame IPU runtime - PAL release [https://github.com/PCSX2/pcsx2/issues/1141 bug]
                        jump to 0x12050 (FW4.78 - current) for HW_1
|-
 
|0x2E||
List of used HV syscalls:
|-
 
|0x2F|| condition [ 0x37B0C4 + 200000000 base ] == 0 -> 00 10 0B 98
  0x80000000 - [[HV_Syscall_Reference#lv1_allocate_memory]]
|-
  0x80000001 - [[HV_Syscall_Reference#lv1_write_htab_entry]]
|0x30|| condition [ 0x37B704 + 200000000 base ] == 0 -> 00 10 0B 98
0x80000002 - [[HV_Syscall_Reference#lv1_construct_virtual_address_space]]
|-
0x80000007 - [[HV_Syscall_Reference#lv1_select_virtual_address_space]]
|0x31|| condition [ 0x37630C + 200000000 base ] == 0 -> 00 10 0B A8
  0x80000009 - [[HV_Syscall_Reference#lv1_pause]]
|-
  0x8000000F - [[HV_Syscall_Reference#lv1_put_iopte]]
|0x32|| condition [ 0x37BB0C + 200000000 base ] == 0 -> 00 10 0B A8
  0x80000012 - [[HV_Syscall_Reference#lv1_construct_event_receive_port]]
|-
  0x8000001A - [[HV_Syscall_Reference#lv1_detect_pending_interrupts]]
|0x33||
  0x8000001B - [[HV_Syscall_Reference#lv1_end_of_interrupt]]
|-
  0x8000001C - [[HV_Syscall_Reference#lv1_connect_irq_plug]]
|0x34|| not filled
0x80000039 - [[HV_Syscall_Reference#lv1_construct_logical_spe]]
|-
0x8000003D - [[HV_Syscall_Reference#lv1_set_spe_interrupt_mask]]
|0x35||
  0x80000042 - [[HV_Syscall_Reference#lv1_clear_spe_interrupt_status]]
|-
  0x80000043 - [[HV_Syscall_Reference#lv1_get_spe_interrupt_status]]
|0x36||
  0x80000045 - [[HV_Syscall_Reference#lv1_get_logical_ppe_id]]
|-
  0x80000049 - [[HV_Syscall_Reference#lv1_set_interrupt_mask]]
|0x37||
  0x8000004A - [[HV_Syscall_Reference#lv1_get_logical_partition_id]]
|-
0x8000004E - [[HV_Syscall_Reference#lv1_get_spe_irq_outlet]]
|0x38||
  0x8000005B - [[HV_Syscall_Reference#lv1_get_repository_node_value]]
|-
  0x8000005F - [[HV_Syscall_Reference#lv1_read_htab_entries]]
|0x39||
  0x80000061 - [[HV_Syscall_Reference#lv1_set_vmx_graphics_mode]]
|-
  0x80000062 - [[HV_Syscall_Reference#lv1_set_thread_switch_control_register]]
|0x3A||
  0x80000074 - [[HV_Syscall_Reference#lv1_allocate_io_segment]]
|-
  0x80000076 - [[HV_Syscall_Reference#lv1_allocate_ioid]]
|0x3B|| GTA 3 (JP/AS) ? using 0x351210, 0x18F590, 0x351568 ( + 200000000 base )
  0x80000078 - [[HV_Syscall_Reference#lv1_construct_io_irq_outlet]]
|}
0x8000007C - [[HV_Syscall_Reference#lv1_undocumented_function_124]]
|-
  0x8000007D - [[HV_Syscall_Reference#lv1_undocumented_function_125]]
|0x02|||| 1 Param, Config file revision ?
  0x8000007E - [[HV_Syscall_Reference#lv1_undocumented_function_126]]
|-
  0x80000088 - [[HV_Syscall_Reference#lv1_undocumented_function_136]]
|0x03|||| 0 Param, sets something 0
  0x8000008C - [[HV_Syscall_Reference#lv1_construct_lpm]]
|-
  0x8000008D - [[HV_Syscall_Reference#lv1_destruct_lpm]]
|0x04|||| 1 Param uint32_t index (i*0x80, special 0x12345: 0x91a280?)
0x8000008E - [[HV_Syscall_Reference#lv1_start_lpm]]
|-
0x8000008F - [[HV_Syscall_Reference#lv1_stop_lpm]]
|0x05|||| read next command
  0x80000090 - [[HV_Syscall_Reference#lv1_copy_lpm_trace_buffer]]
|-
0x80000091 - [[HV_Syscall_Reference#lv1_add_lpm_event_bookmark]]
|0x06|||| 0 Param, sets something 0x14F80 (85888'd)
0x80000092 - [[HV_Syscall_Reference#lv1_delete_lpm_event_bookmark]]
|-
0x80000093 - [[HV_Syscall_Reference#lv1_set_lpm_interrupt_mask]]
|0x07|||| 1 Param uint32_t (default 1)
  0x80000094 - [[HV_Syscall_Reference#lv1_get_lpm_interrupt_status]]
  Delay VU xgkick by X cycles
  0x80000095 - [[HV_Syscall_Reference#lv1_set_lpm_general_control]]
|-
  0x80000096 - [[HV_Syscall_Reference#lv1_set_lpm_interval]]
|0x08|||| 8 Param uint32_t (read mask,read mask, original opcode, original opcode, write mask, write mask, replace opcode, replace opcode)
0x80000097 - [[HV_Syscall_Reference#lv1_set_lpm_trigger_control]]
  Maximum Amount of Usage: 3 times
0x80000098 - [[HV_Syscall_Reference#lv1_set_lpm_counter_control]]
  Patch VU memory by mask
  0x80000099 - [[HV_Syscall_Reference#lv1_set_lpm_group_control]]
|-
0x8000009A - [[HV_Syscall_Reference#lv1_set_lpm_debug_bus_control]]
|0x09|||| uint32_t count, <list> (offset, original opcode, original opcode, replace opcode, replace opcode) - EE_INSN_REPLACE64
0x8000009B - [[HV_Syscall_Reference#lv1_set_lpm_counter]]
  [Dark Cloud] uses 1
0x8000009C - [[HV_Syscall_Reference#lv1_set_lpm_signal]]
  [Dead Or Alive 2 Hardcore] uses 1
0x8000009D - [[HV_Syscall_Reference#lv1_set_lpm_spr_trigger]]
  Maximum List Count: 32
0x800000A3 - [[HV_Syscall_Reference#lv1_write_virtual_uart]]
|-
  0x800000A4 - [[HV_Syscall_Reference#lv1_set_virtual_uart_param]]
|0x0A|||| uint32_t count, <List> (offset, original opcode, replace opcode) - EE_INSN_REPLACE32 --- command present only in the ps2_netemu
  0x800000A5 - [[HV_Syscall_Reference#lv1_get_virtual_uart_param]]
  [Deadly Strike] uses 1
  0x800000A6 - [[HV_Syscall_Reference#lv1_configure_virtual_uart_irq]]
  [Dragon Force] uses 2
  0x800000AA - [[HV_Syscall_Reference#lv1_open_device]]
Maximum List Count: 32
  0x800000AB - [[HV_Syscall_Reference#lv1_close_device]]
|-
  0x800000AC - [[HV_Syscall_Reference#lv1_map_device_mmio_region]]
|0x0B|||| 1 Param uint32_t count, <List> {sector id, offset, sizeof present opcodes, replace opcodes, original opcodes} - MECHA_SET_PATCH
0x800000AE - [[HV_Syscall_Reference#lv1_allocate_device_dma_region]]
offset on disc = sector id * sector size + offset (-0xC for DVD [not always applied, see Psychonauts or
0x800000AF - [[HV_Syscall_Reference#lv1_free_device_dma_region]]
SRS: Street Racing Syndicate configs], +0x18 for CD [raw 2352 sector size])
0x800000B0 - [[HV_Syscall_Reference#lv1_map_device_dma_region]]
  [Dead Or Alive 2 Hardcore] uses 7
0x800000B1 - [[HV_Syscall_Reference#lv1_unmap_device_dma_region]]
  [Gradius V] uses 1
0x800000B2 - [[HV_Syscall_Reference#lv1_read_pci_config]]
  [Grand Theft Auto III] uses 1
0x800000B3 - [[HV_Syscall_Reference#lv1_write_pci_config]]
  [Katamari Damacy] uses 1
0x800000C5 - [[HV_Syscall_Reference#lv1_connect_interrupt_event_receive_port]]
  [Manhunt] uses 1
0x800000CF - [[HV_Syscall_Reference#lv1_enable_logical_spe]]
  [Odin Sphere] uses 2
0x800000D2 - [[HV_Syscall_Reference#lv1_gpu_open]]
  [Primal] uses 1
0x800000D4 - [[HV_Syscall_Reference#lv1_gpu_device_map]]
  [Psychonauts] uses 1
  0x800000D6 - [[HV_Syscall_Reference#lv1_gpu_memory_allocate]]
  [Syphon Filter The Omega Strain] uses 1
0x800000D9 - [[HV_Syscall_Reference#lv1_gpu_context_allocate]]
  Maximum List Count: 47
  0x800000DD - [[HV_Syscall_Reference#lv1_gpu_context_iomap]]
|-
  0x800000E1 - [[HV_Syscall_Reference#lv1_gpu_context_attribute]]
|0x0C|||| 1 Param (uint16_t, uint16_t) --- 0/1/2,<0x63>
0x800000E3 - [[HV_Syscall_Reference#lv1_gpu_context_intr]]
|-
0x800000E4 - [[HV_Syscall_Reference#lv1_gpu_attribute]]
|0x0D|||| 1 Param, true/false
0x800000F5 - [[HV_Syscall_Reference#lv1_storage_read]]
Default Init = 1?
0x800000F6 - [[HV_Syscall_Reference#lv1_storage_write]]
0 == skip some code,
  0x800000F9 - [[HV_Syscall_Reference#lv1_storage_get_async_status]]
  1 == some code + checks
0x800000FF - [[HV_Syscall_Reference#lv1_panic]]
|-
 
|0x0E|||| 1 Param offset --- Improves ADD/SUB accuracy for selected offset (incl. Floats)
===LPAR / AUTH ID's===
  [Rygar] only has 0x147DA8 sub.s  $f12, $f20, $f12
{| border="1" cellspacing="0" cellpadding="5" border="#999" class="wikitable" style="border:1px solid #999; border-collapse: collapse;"
Used in official configs: SCUS97501=0x3C458C, SCES53642=0x3C4854, SLUS21026=0x386864, SLUS20916=0x121F64, SLUS20437=0x11EDF0
|- bgcolor="#cccccc"
  Maximum Amount of Usage: 31 times
! Name !! Auth ID !! Self<br />(/dev_flash/ps2emu) !! SM Ability Mask !! Notes
|-
|0x0F|||| List <uint32_t Param, uint32_t Param> --- More accurate memory range (FPU mul/div/sub/add accuracy related)
  [Dark Cloud] uses 0x239334, 0x1FFFFFF
  [Grand Theft Auto SA] uses 0x1E46DC, 0x1E4AE8
  Maximum List Count: 31
|-
|0x10|||| List <uint32_t Param, uint32_t Param> --- More accurate memory range (COP2, mul/div/sub/add accuracy related) - MULDIV_Accurate_range
  Maximum List Count: 31
|-
|0x11|||| 1x uint32_t Param. ADD/SUB accuracy related, all emulated ADD/SUB instruction variations check that value. Param seems to be VU memory offset (need confirmation).
  Used in official configs: SLUS21172=0x208, SLUS20878=0x140,0x368,0x570
  Maximum Amount of Usage: 31 times
|-
|0x12|||| <List> (uint32_t count,
  [Primal] uses 0xD
  [Rayman Arena] uses 0x11
  [Syphon Filter: The Omega Strain] uses 0x5
  00 00 00 0?
  00 00 00 00
  type? count?
  ... 
  Maximum List Count: 63
|-
| 0x13|||| 1x uint64_t Param --- Memory card timing related
  Jak X: Combat Racing uses 0xf960 (63840)
  Netsu Chu! Pro Yakyuu 2004 uses 0xf960 (63840)
  Phantasy Star Universe uses 0x9bdc (39900)
  WRC II Extreme uses 0x9bdc (39900)
  Burnout Dominator uses 0x9bdc (39900)
  Jissen Pachi-Slot Hisshouhou! Kemono-Oh uses 0x1d394 (119700)
  Used in official configs: SCUS97429=0xF960(63840), SLPM66031=0x9BDC(39900), SLPS20131=0x1D394(119700)
|-
| 0x14|||| 0 Param, sets something 1
|-
| 0x15|| 4 || 1 Param ( <1, >1 ), different settings/mode?
  [Bloodrayne 2] uses 4
  [GRIMgRiMoiRe] uses 4
  [Mana Khemia 2] uses 4
  [Odin Sphere] uses 4
  [SMT Persona 3 FES] uses 4
|-
| 0x16|||| = 0x05 (next id)
|-
| 0x17||1 || 1 Param, true/false?
  [Bully] uses 1
|-
| 0x18|||| = 0x16 = 0x05 (next id)
|-
| 0x19 |||| 0 Param, sets something 1 --- SB_SIO2 related?
  [Grand Theft Auto III]
  [Red Faction 2]
  [Siren]
|-
| 0x1A|||| 0 Param, sets something 1
|-
| 0x1B|||| 0 Param, sets something 1
  [Mana Khemia 2]
|-
| 0x1C |||| read uint32_t (use uint8_t) Param (default 3)
|-
| 0x1D |||| read uint32_t (use uint8_t) Param
|-
| 0x1E |||| read uint32_t (use uint8_t) Param
|-
| 0x1F |||| uint32_t Param (default 0x3E8?)
|-
| 0x20|||| uint64_t Param (default 0x3C)
  Config value is used as multiplier for some value, and result is used in vsync related runtimes.
  Is worth to note that 0x3C is default multiplier even for PAL titles, so is not stricly related to framerate,
  but to vsync counters (where 0x3C is still wrong anyway..). Result of multiply is also compared at some point to vsync delay value.
|-
| 0x21|| 1 || 1 Param:
  0 = sets an option from 1 to 0 and another one to 0,
  1 = sets an option from 1 to 0 and another one to 1,
  2 = sets an option from 1 to 1 and another one to 0
  [Fatal Frame II] uses 0
  [Grand Theft Auto Vice City] uses 1
  [Grand Theft Auto III (EU)] uses 1
  [SMT Persona 3 FES] uses 0
|-
| 0x22|||| 0 Param, sets something 1
|-
| 0x23|||| 0 Param --- memcpy 0x100 Bytes and sets 0x14E00
|-
| 0x24|||| uint64_t Param
|-
| 0x25|||| = 0x18 = 0x16 = 0x05 (next id)
|-
| 0x26|||| List <uint32_t Param,uint32_t Param> --- Improves ADD/SUB accuracy for selected memory range (incl. Floats) - FPU_Accurate_range
   
  [Bloodrayne 2] uses 0x340000, 0x350000
  [Gradius V] uses 0x3046E0, 0x0x305E44
  Maximum List Count: 31
  Maximum Amount of Usage: ??
  The command is used 4 times consecutively by [Strawberry Shortcake: The Sweet Dreams]
  SLES-54309 (EU) and
  SLUS-21497 (US) game configs hardcoded inside ps2_gxemu.self
|-
| 0x27|||| List <uint32_t Param,uint32_t Param> --- Improves COP2 operations accuracy for selected memory range - VU0 macromode accurate range
  Maximum List Count: 31
|-
| 0x28|||| 1x uint32_t Param (<=3)
|-
| 0x29 |||| 2x uint32_t Param,
|-
| 0x2A|||| 0 Param, sets something 1 --- Allow online downloadable content (HDD)? Multitap? Local 2 player?
All-Star Baseball 2004
|-
| 0x2B|||| 0 Param, sets something 1 --- Allow disc eject/swap?
Dance Factory
|-
|-
| PS2_LPAR  || 0x1020000003000001 || rowspan="2" | ps2_emu.self || rowspan="2" | 0x201226D || rowspan="2" |
| 0x2C |||| 1 Param, uint32_t
Summoner uses 0x1
|-
|-
| *SCE_CELLOS_SYSTEM_MGR_PS2  || 0x107000001D000001
| 0x2D |||| = 0x25 = 0x18 = 0x16 = 0x05 (next id)
|-
|-
| PS2_GX_LPAR || 0x1020000003000001 || rowspan="2" | ps2_gxemu.self || rowspan="2" | 0x201226D || rowspan="2" |
| 0x2E |||| 1 Param, uint32_t
|-
|-
| *SCE_CELLOS_SYSTEM_MGR_PS2_GX || 0x107000001D000001
| 0x2F |||| 1 Param, uint32_t --- SPU2 related?
Indigo Prophecy/Fahrenheit uses 0x1
|-
|-
| PS2_SW_LPAR || 0x1020000003000001 || rowspan="2" | ps2_softemu.self || rowspan="2" | 0x201226D || rowspan="2" |
| 0x30|||| (nothing)
|-
|-
| *SCE_CELLOS_SYSTEM_MGR_PS2_SW || 0x107000001D000001
| 0x31|||| (nothing)
|-
|-
| PS2_NE_LPAR || 0x1020000003000001 || rowspan="2" | ps2_netemu.self || rowspan="2" | 0x412265 || rowspan="2" | Netemu additional SM abilities:
| 0x32|||| (nothing)
* 0x00400000 = Reboot into netemu LPAR (using opcode 0x8204).
Missing SM abilities when compared to other ps2 emus:
* 0x00000008 = Reboot into PS2/GX/SOFT LPAR (using opcode 0x8202).
* 0x02000000 = Unknown, seems to be unused by current system manager.
|-
|-
| *SCE_CELLOS_SYSTEM_MGR_PS2_NE || 0x107000001D000001
| 0x33|||| (nothing)
|-
|-
|}
| 0x34|||| (nothing)
Note: All PS2 emulator lack 0x00000100 ability, thus can't get/set fan speed without LV1 patch.
 
===Getting compatibility hardware info===
See: [[PS2_Compatibility#Software]]
 
===ps2bootparam.dat===
A file created at path: dev_hdd0/tmp/game/'''ps2bootparam.dat'''
*See: [[ps2bootparam.dat]]<!--we need this page because we have others like that in wiki-->
 
===Cobra core===
taken from storage_ext.c
<pre> patch_ps2emu_entry(ps2emu_type); </pre>
*sets proper ps2_(gx/soft)emu.self path for reboot
*patches ss_storage service 0x5004 disc checks on ss_server3.self inside lv1
  (Change from Parameter li r3, 2 and li r3, 1E (Drive Authentification) to li r3, 0x29 (Reset Drive))
*and the usual either replace read/ioctl for iso etc.
 
==Game CONFIG==
Some of the PS2 emulator types (such ps2_gxemu.self, ps2netemu.self) are able to load config commands that are applyed "by game ID". The concept of "game patches" is not technically correct because some of the commands does patching functions but others does other things (not patching), and other commands works as switches or sets a value that are enviromental settings for the emulator (not for the game) but because are applyed "by game" should be considered enviromental settings for that specific game, so for simplification purposes you can think in all this data as "game configs"
 
This "game config" data seems to work in the same way for all the PS2 emulator types but can be located in different places, some are hardcoded inside the emulators itself (inside the .self), and at the time the "PS2 classics" emulator (ps2_netemu.self) was developed this config can be loaded from an external file<!--and there is some more inside some .sprx or inside the ps2 hdd data pkg ?-->
 
In short, the "game configs" can modify the game image (by patching it) and can be used to configure the virtual PS2 (the emulated machine). And can be loaded from hardcoded data (inside the .self) or from an external file (this feature is supported only by ps2_netemu.self). Maximum CONFIG size for ps2_netemu is 16384 bytes.
 
===Config Commands===
Below is a brief summary table with basic info about available config commands. <br>
Detailed commands description can be found here: '''[[PS2_Emulation/PS2_Config_Commands|PS2 Config Commands]]'''. <br>
If you want to read some speculation and brainstorming about them, please join the {{talk}} page. <br>
 
{| class="wikitable" style="font-size:85%; line-height:100%; text-align:center"
|+PS2 Emulators Config Commands Overview
! rowspan="2" | Command Name !! colspan="3" | Command ID !! rowspan="2" style="padding:1px" | Max<br>Usage !! colspan="4" | Command Data
|-
|-
! style="padding:1px" | gxemu !! style="padding:1px" | softemu !! style="padding:1px" | netemu !! Length !! colspan="3" | Params
| 0x35|||| 0 Param --- Enables Force Flip Field, described in emu setting as "''Fix for [Hang] for soft-lock''"
|-
|-
! {{cellcolors|#c96|#000}} TitleID enforce
| 0x36|||| (nothing)
| {{NA}} || {{NA}} || 0x00
| 1 || style="text-align:left" | char[10]
| colspan="3" {{cellcolors|#c96|#000|center}} titleid
|-
|-
! {{cellcolors|#555|#fff}} Hook EE memory offset with emu function ID
| 0x37|||| (nothing)
| 0x00 || 0x00 || 0x01
| 3 ? || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| {{cellcolors|#555|#fff|center}} offset || colspan="2" {{cellcolors|#555|#fff|center}} functionid
|-
|-
! {{cellcolors|#fff|#000}} Set something
| 0x38|||| (nothing)
| 0x01 || 0x01 || 0x02
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
|-
|-
! {{cellcolors|#fff|#000}} Skip r5900 CACHE IXIN/IHIN opcodes
| 0x39 |||| (nothing)
| 0x02 || 0x02 || 0x03
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#bd5|#000}} Patch something in SP3 EEDMA
| 0x3A|||| (nothing)
| 0x03 || 0x03 || 0x04
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
|-
|-
! {{cellcolors|#bd5|#000}} Alternative VIF1 DIRECT/DIRECTHL handler
| 0x3B|||| (nothing)
| 0x04 || 0x04 || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x05</abbr>
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#fff|#000}} Alternative VIF1 OFFSET handler
| 0x3C |||| (nothing)
| 0x05 || 0x05 || 0x06
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#c96|#000}} Delay VU1 xgkick by X cycles
| 0x3D |||| 1 Param, uint32_t Config file revision
| 0x06 || 0x06 || 0x07
 
| 1 || style="text-align:left" | uint32_t
{| class="wikitable sortable"
| colspan="3" {{cellcolors|#c96|#000|center}} <abbr title="2=2cycles, 4=4cycles, 8=8cycles">cycles</abbr>
|-
|-
! {{cellcolors|#c96|#000}} Patch VU1 memory by <abbr title="two bit masks for original and patched data">bitmask</abbr>
! Firmware !! ps2_netemu Revision !! Max Supported Commands
| 0x07 || 0x07 || 0x08
| 3 || style="text-align:left" | 8&nbsp;*&nbsp;uint32_t
| colspan="3" {{cellcolors|#c96|#000|center}} <abbr title="read mask, read mask, original opcode, original opcode, write mask, write mask, replace opcode, replace opcode">MASK</abbr>
|-
|-
! {{cellcolors|#9f9|#000}} Patch EE memory 64 bit
| 3.70 || 15686 || 0x41
| 0x08 || 0x08 || 0x09
| <abbr title="command">1</abbr>→<abbr title="list">32</abbr> || style="text-align:left" | uint32_t&nbsp;+&nbsp;LIST
| {{cellcolors|#9f9|#000|center}} <abbr title="amount of patches in the LIST">count</abbr> || colspan="2" {{cellcolors|#9f9|#000|center}} <abbr title="offset, original opcode, original opcode, replace opcode, replace opcode">LIST</abbr>
|-
|-
! {{cellcolors|#9f9|#000}} Patch EE memory 32 bit
| 3.73 || 15936 || 0x41
| {{NA}} || {{NA}} || 0x0A
| <abbr title="command">1</abbr>→<abbr title="list">32</abbr> || style="text-align:left" | uint32_t&nbsp;+&nbsp;LIST
| {{cellcolors|#9f9|#000|center}} <abbr title="amount of patches in the LIST">count</abbr> || colspan="2" {{cellcolors|#9f9|#000|center}} <abbr title="offset, original opcode, replace opcode">LIST</abbr>
|-
|-
! {{cellcolors|#9f9|#000}} Patch game disc by sector & offset
| 3.74 || 15936 || 0x41
| 0x09 || 0x09 || 0x0B
| <abbr title="command">1</abbr>→<abbr title="list">47</abbr> || style="text-align:left" | uint32_t&nbsp;+&nbsp;LIST
| {{cellcolors|#9f9|#000|center}} <abbr title="amount of patches in the LIST">count</abbr> || colspan="2" {{cellcolors|#9f9|#000|center}} <abbr title="sector id, offset, sizeof present opcodes, replace opcodes, original opcodes">LIST</abbr>
|-
|-
! {{cellcolors|#fff|#000}} Set something
| 4.00 || 16195 || 0x41
| 0x0A || 0x0A || 0x0C
| 1 || style="text-align:left" | 2&nbsp;*&nbsp;uint16_t
| <abbr title="0=?, 1=?, 2=?">unk_mode</abbr> || colspan="2" | <abbr title="min 0x0, max 0xFFFF">unk_range</abbr>
|-
|-
! {{cellcolors|#fff|#000}} Set something
| 4.01 || 16195 || 0x41
| 0x0B || 0x0B || 0x0D
| 1 || style="text-align:left" | uint32_t
| colspan="3" | <abbr title="0=skip, 1=don't skip (default)">skip</abbr>
|-
|-
! {{cellcolors|#f93|#000}} COP2 and FPU accurate ADD/SUB address
| 4.10 || 16361 || 0x41
| 0x0C || 0x0C || 0x0E
| 32 || style="text-align:left" | uint32_t
| colspan="3" {{cellcolors|#f93|#000|center}} <abbr title="min 0x100000 ?, max 0x1FFFFFFF ?">offset</abbr>
|-
|-
! {{cellcolors|#f93|#000}} COP2 and FPU accurate ADD/SUB range
| 4.11 || 16361 || 0x41
| 0x0D || 0x0D || 0x0F
| 32 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| {{cellcolors|#f93|#000|center}} <abbr title="min 0x100000">start&nbsp;offset</abbr> || colspan="2" {{cellcolors|#f93|#000|center}} <abbr title="max 0x1FFFFFFF">end&nbsp;offset</abbr>
|-
|-
! {{cellcolors|#f93|#000}} FPU accurate MUL/DIV range
| 4.20 || 16604 || 0x43
| 0x0E || 0x0E || 0x10
| 32 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| {{cellcolors|#f93|#000|center}} <abbr title="min 0x100000">start&nbsp;offset</abbr> || colspan="2" {{cellcolors|#f93|#000|center}} <abbr title="max 0x1FFFFFFF">end&nbsp;offset</abbr>
|-
|-
! {{cellcolors|#f93|#000}} VU0 accurate ADD/SUB address
| 4.21 || 16604 || 0x43
| 0x0F || 0x0F || 0x11
| 32 || style="text-align:left" | uint32_t
| colspan="3" {{cellcolors|#f93|#000|center}} <abbr title="min 0x000, max 0xFF8">offset</abbr>
|-
|-
! {{cellcolors|#588|#fff}} VU0/COP2 multi cmd
| 4.23 || 16604 || 0x43
| 0x10 || 0x10 || 0x12
| <abbr title="command">1</abbr>→<abbr title="list">63</abbr> || style="text-align:left" | uint32_t&nbsp;+&nbsp;LIST
| {{cellcolors|#588|#fff|center}} flags ? || colspan="2" {{cellcolors|#588|#fff|center}} LIST
|-
|-
! {{cellcolors|#dda|#000}} Memory Card Delay
| 4.25 || 16740 || 0x43
| 0x11 || 0x11 || 0x13
| 1 || style="text-align:left" | uint64_t
| colspan="3" {{cellcolors|#dda|#000|center}} time ?
|-
|-
! {{cellcolors|#f93|#000}} Alternative VU1 ADD/SUB
| 4.26 || 16740 || 0x43
| 0x12 || 0x12 || 0x14
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#fff|#000}} Patch IOP SPE program
| 4.30 || 16808 || 0x45
| 0x13 || 0x13 || 0x15
| 1 || style="text-align:left" | uint32_t
| colspan="3" | 2 or higher
|-
|-
! {{cellcolors|#fff|#000}} Unknown
| 4.31 || 16808 || 0x45
| 0x14? || 0x14? || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x16</abbr>
| ? || style="text-align:left" | ?
| colspan="3" | ?
|-
|-
! {{cellcolors|#9cf|#000}} Alternative COP0 MTC0/MFC0 Count ($9) handler
| 4.40 || 16916 || 0x46
| 0x15 || 0x15 || 0x17
| 1 || style="text-align:left" | uint8_t ?
| colspan="3" {{cellcolors|#9cf|#000|center}} <abbr title="0=disabled, 1=enabled">status</abbr>
|-
|-
! {{cellcolors|#fff|#000}} Switch something
| 4.41 || 16916 || 0x46
| 0x16 || 0x16 || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x18</abbr>
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#ff9|#000}} Force analog controller mode
| 4.45 || 17041 || 0x48
| {{NA}} || 0x17 || 0x19
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#fff|#000}} End fromIPU DMA transfer on BCLR command
| 4.46 || 17041 || 0x48
| 0x17 || 0x18 || 0x1A
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#fff|#000}} IPU IDEC Hack
| 4.50 || 17179 || 0x4A
| 0x18 || 0x19 || 0x1B
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#ff9|#000}} Emulate Multitap
| 4.55 || 17277 || 0x4D
| 0x19? || 0x1A? || 0x1C
|-
| 1 || style="text-align:left" | uint8_t
|4.60<br />
| colspan="3" {{cellcolors|#ff9|#000|center}} port
4.70<br />
4.75<br />
4.76<br />
|| 17314 || 0x4D
|-  
|4.78<br />
4.80<br />
4.81<br />
|| 17495 || 0x50
|-
|}
|-
|-
! {{cellcolors|#ff9|#000}} Set Multitap
| 0x3E |||| 0 Params --- Sets something 1
| 0x1A || 0x1B || 0x1D
Default Init = 0
| 1 || style="text-align:left" | uint8_t
0 == do set some stuff,
| colspan="3" {{cellcolors|#ff9|#000|center}} order
1 == skip
Similar to 0x0D with param 0. Affect the same code path, but skips more code.
|-
|-
! {{cellcolors|#ff9|#000}} Multitap related
| 0x3F |||| 1 Param, uint32_t
| 0x1B || {{NA}} || 0x1E
| 1 || style="text-align:left" | uint8_t
| colspan="3" | ?
|-
|-
! {{cellcolors|#fff|#000}} Enable VIF0 cmds MSXXX/MPG/FLUSHE timings.
| 0x40|||| 0 Param --- Sets something 1
| 0x1C || 0x1C || 0x1F
Grand Theft Auto SA
| 1 || style="text-align:left" | uint32_t
Silent Hill Origins - unofficial fix
| colspan="3" | Initial cycles to run
|-
|-
! {{cellcolors|#fff|#000}} Set something
| 0x41|||| 0 Param --- Sets something 1 (Disables some lwsync - speedhack?)
| 0x1D || 0x1D || 0x20
Dragon Force
| 1 || style="text-align:left" | uint64_t
God Hand
| colspan="3" | ?
Gradius V
Katamari Damacy
|-
|-
! {{cellcolors|#fff|#000}} Set something
| 0x42|||| EE Overlay patch. 2 main Params + patch data: uint32_t address, uint32_t count, opcode,opcode,opcode...
| 0x1E || 0x1E || 0x21
Address need to be in 0xFF000 - 0xFFFFC range.
| 1 || style="text-align:left" | uint32_t
Count is size of patch in 4 bytes opcodes. So 5 opcode patch = count 5.
| colspan="3" | ?
Opcodes will be placed on selected address, we use only patch code, no need for original opcode.
Next opcode addresses are auto calculated (+4..) so we need to specify only patch start address.
Remember we need to jump to our new code, best way is command 0x0A with j (jump) opcode.
Also is important to add return jump if required. That one need to be added in our 0x42 patch. 
Maximum opcodes count seems to be 0x3FF (1023 opcodes).
|-
|-
! {{cellcolors|#fff|#000}} Switch something
| 0x43|||| 1 Param --- Equal to 0x40, but with Parameter:
| {{NA}} || 0x1F || 0x22
0 = Default
| 1 || style="text-align:left" | 0
1 = (like 0x40)
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
param =
-1 = failure?
|-
|-
! {{cellcolors|#fff|#000}} Snowblind Engine hack
| 0x44|||| 0 Param --- Disables Smoothing and Smoothing option
| 0x1F || 0x20 || 0x23
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#ddf|#000}} SIO2 Delay
| 0x45|||| 0 Param --- Sets something 1
| 0x20 || 0x21 || 0x24
Phantasy Star Complete Collection
| 1 || style="text-align:left" | uint64_t
| colspan="3" | ?
|-
|-
! {{cellcolors|#fff|#000}} Switch something
| 0x46|||| 0 Param --- Enables L2H Improvement, [Performance] related setting for titles using L2H (Local to Host, so called GS download (from GS to  EE))
| 0x21 || 0x22 || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x25</abbr>
SMT Digital Devil Saga 1
| 1 || style="text-align:left" | 0
SMT Nocturne
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
Fatal Frame II
|-
|-
! {{cellcolors|#f93|#000}} FPU accurate ADD/SUB range
| 0x47|||| 0 Param --- Enables XOR CSR - XOR System Status Register (0x12001000)?, [Graphics] related setting, should fix fullscreen line corruption
| 0x22 || 0x23 || 0x26
| 32 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| {{cellcolors|#f93|#000|center}} <abbr title="min 0x100000">start&nbsp;offset</abbr> || colspan="2" {{cellcolors|#f93|#000|center}} <abbr title="max 0x1FFFFFFF">end&nbsp;offset</abbr>
|-
|-
! {{cellcolors|#f93|#000}} COP2 accurate ADD/SUB range
| 0x48|||| VSYNC Delay, 2x uint32_t Param
| 0x23 || 0x24 || 0x27
*First param possible value are 1 = No IPU, 2 = IPU, 3 = Anytime.
| 32 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
*Second param is delay (in ms?), and can be also negative value.
| {{cellcolors|#f93|#000|center}} <abbr title="min 0x100000">start&nbsp;offset</abbr> || colspan="2" {{cellcolors|#f93|#000|center}} <abbr title="max 0x1FFFFFFF">end&nbsp;offset</abbr>
**Emu has standard presets for second param.
***Agressive = 0x3D090 (250000 decimal),
***Normal = 0x186A0 (100000 decimal),
***Conservative = 0x4E20 (20000 decimal),
***But other values can be used.
[SMT Digital Devil Saga 1] uses 1, 0x3D090
[Fatal Frame II] uses 0x2, 0xFFFFE69C (-6500 decimal)
|-
|-
! {{cellcolors|#aaf|#000}} Set something <abbr title="PS2 MECHACON related">(CDVD)</abbr>
| 0x49|||| 0 Param --- Sets something 0xB,0,0
| 0x24 || 0x25? || 0x28
Trapt
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
|-
|-
! {{cellcolors|#aaf|#000}} CDVD seek timing
| 0x4A|||| 0 Param --- Sets something 0x15100
| 0x25 || 0x26? || 0x29
Applies to the Snowblind Engine games. Fixes the rest of flickering textures.
| 1 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
Meant to be used in conjunction with the GX/SOFT Snowblind Engine's specific commands (double 0x01 and 0x23 combo).
| ? || colspan="2" | ?
|-
|-
! {{cellcolors|#fff|#000}} Switch something
| 0x4B|||| Redirect SAVEDATA by ID, 2 x uint32_t Params + ID: offset, int, char[12]
| 0x26 || 0x27 || 0x2A
For proper config we need at least 2 (can be more if needed) 0x4B commands, one to enable redirect, one to disable.
| 1 || style="text-align:left" | 0
First param is EE memory offset that when is hit enable/disable redirection.
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
Second param is partially unknown, seems to be size of next param to read * 4 (3 in known configs), or 0xFFFFFFFF for disable redirect command.
Third param is ID of SAVEDATA we want to use padded with 00 to match 12 bytes, or all 00 in disable redirect config.
Important note here is that config have own 00 00 00 00 terminator at the end.
So after 12 bytes of ID we need to add 4 bytes of 00. That apply also to disable redirect version.
|-
|-
! {{cellcolors|#aaf|#000}} Enable CDDA hack <abbr title="PS2 MECHACON related">(CDVD)</abbr>
| 0x4C|||| 2x uint32_t Params: offset,int (2 = current path?, 3 = new ISO.BIN.ENC path?, other= ?)
| 0x27? || 0x28 || 0x2B
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#fff|#000}} Set something
| 0x4D|||| 1 uint32_t Param (can be -1) --- Sets something (same as 0x49 but) 0xC, Param, 0
| 0x28 || 0x29 || 0x2C
Wild Arms: The Fifth Vanguard uses 0x3F800000
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
|-
|-
! {{cellcolors|#fff|#000}} Switch something
| 0x4E|||| (nothing)
| 0x29? || 0x2A || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x2D</abbr>
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
|-
! {{cellcolors|#fff|#000}} Set something
| 0x4F|||| (nothing)
| 0x2A || 0x2B || 0x2E
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
|-
|-
! {{cellcolors|#fff|#000}} SPU2 multi cmd.
| 0x50|||| 0 Param --- Enables pressure sensitive controls
| 0x2B || {{NA}} || 0x2F
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
|-
|-
! {{cellcolors|#eee|#b44|left}} Reserved
|}
| {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A</abbr> || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A</abbr> || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x30<br>0x31<br>0x32<br>0x33<br>0x34</abbr>
| 0 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
! {{cellcolors|#f66|#000}} Enable Force Flip Field
| {{NA}} || {{NA}} || 0x35
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
! {{cellcolors|#eee|#b44|left}} Reserved
| {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A</abbr> || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A<br>N&thinsp;/&thinsp;A</abbr> || {{cellcolors|#eee|#b44|center}} <abbr style="cursor:help; text-decoration:none" title="Not Available">0x36<br>0x37<br>0x38<br>0x39<br>0x3A<br>0x3B<br>0x3C</abbr>
| 0 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
! {{cellcolors|#c96|#000}} Config revision
| {{NA}} || {{NA}} || 0x3D
| 1 || style="text-align:left" | uint32_t
| colspan="3" {{cellcolors|#c96|#000|center}} revision
|-
! {{cellcolors|#fff|#000}} Switch something
| {{NA}} || {{NA}} || 0x3E
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
! {{cellcolors|#fff|#000}} Set something
| {{NA}} || {{NA}} || 0x3F
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
|-
! {{cellcolors|#fff|#000}} Switch something
| {{NA}} || {{NA}} || 0x40
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
! {{cellcolors|#fff|#000}} Switch something
| {{NA}} || {{NA}} || 0x41
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
! {{cellcolors|#9f9|#000}} Patch EE memory by overlay
| {{NA}} || {{NA}} || 0x42
| <abbr title="command">1</abbr>→<abbr title="list">1023</abbr> || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t&nbsp;+&nbsp;LIST
| {{cellcolors|#9f9|#000|center}} offset || {{cellcolors|#9f9|#000|center}} count || {{cellcolors|#9f9|#000|center}} <abbr title="opcode,opcode,opcode, etc...">LIST</abbr>
|-
! {{cellcolors|#fff|#000}} Set something
| {{NA}} || {{NA}} || 0x43
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
|-
! {{cellcolors|#fcc|#000}} Disable smoothing filter
| {{NA}} || {{NA}} || 0x44
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
! {{cellcolors|#fff|#000}} Switch something
| {{NA}} || {{NA}} || 0x45
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
! {{cellcolors|#f66|#000}} Enable L2H Improvement
| {{NA}} || {{NA}} || 0x46
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
! {{cellcolors|#f66|#000}} Enable XOR CSR
| {{NA}} || {{NA}} || 0x47
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
! {{cellcolors|#f66|#000}} Set VSYNC IPU & Delay
| {{NA}} || {{NA}} || 0x48
| 1 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| {{cellcolors|#f66|#000|center}} <abbr title="1=No IPU, 2=IPU, 3=Anytime">ipu</abbr> || colspan="2" {{cellcolors|#f66|#000|center}} <abbr title="20000=Conservative, 100000=Normal, 250000=Agressive, Any other">delay</abbr>
|-
! {{cellcolors|#fff|#000}} Switch something
| {{NA}} || {{NA}} || 0x49
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
! {{cellcolors|#fff|#000}} Switch something
| {{NA}} || {{NA}} || 0x4A
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|-
! {{cellcolors|#fff|#000}} Set something
| {{NA}} || {{NA}} || 0x4B
| 1 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| ? || colspan="2" | ?
|-
! {{cellcolors|#fff|#000}} Set something
| {{NA}} || {{NA}} || 0x4C
| 1 || style="text-align:left" | 2&nbsp;*&nbsp;uint32_t
| ? || colspan="2" | ?
|-
! {{cellcolors|#fff|#000}} Set something
| {{NA}} || {{NA}} || 0x4D
| 1 || style="text-align:left" | uint32_t
| colspan="3" | ?
|-
! {{cellcolors|#fff|#000}} Unknown
| {{NA}} || {{NA}} || 0x4E
| 1 || style="text-align:left" | ?
| colspan="3" | ?
|-
! {{cellcolors|#fff|#000}} Unknown
| {{NA}} || {{NA}} || 0x4F
| 1 || style="text-align:left" | ?
| colspan="3" | ?
|-
! {{cellcolors|#ff9|#000}} Enable pressure sensitive controls
| {{NA}} || {{NA}} || 0x50
| 1 || style="text-align:left" | 0
| colspan="3" {{cellcolors|#ddd|#666|center}} ''Nothing''
|}


===Config file examples (for netemu)===
===Config file examples (for netemu)===
Line 1,914: Line 1,635:
! Bug !! Description !! Known Affected Games
! Bug !! Description !! Known Affected Games
|-
|-
| Missing Emotion Engine Data Cache emulation || Emulating that is literally not possible without making games run at 3 fps. Fixed by patches to game image, or EE code. Instruction Cache (not Data) seems to be implemented, at least partially. || Ice Age 2, DOA2: Extreme, Nascar 2009.
| Missing Emotion Engine Cache emulation || Emulating that is literally not possible without making games run at 3 fps. Fixed by patches to game image, or EE code. || Ice Age 2, DOA2: Extreme, Nascar 2009 (luckily fixed by instant VIF bug).
|-
|-
| Branch delay slot violation not supported on EE || Some games have Branch instruction inside Branch delay slots, this is not emulated correctly on EE (VU have proper emulation of that). This is patched in configs by rearangging MIPS code. || WRC 3,4,Rally Evolved, one of Action Replay discs.   
| Branch delay slot violation not supported on EE || Some games have Branch instruction inside Branch delay slots, this is not emulated correctly on EE (VU have proper emulation of that). This is patched in configs by rearangging MIPS code. || WRC 3,4,Rally Evolved, one of Action Replay discs.   
|-
|-
| Unmapped write only EE memory (confirmed only for SIF) || Reads/Writes to 0x2000000+ shouldn't throw bus error on dma transfers. Write should be performed as successful, memory should stay unchanged. Reads should return 0. || Games developed by In Utero, while creating initial save file, send DMA where address is EE stack pointer. At the time of transfer start $sp is too high, and requested transfer size make MADR overflow above 0x2000000 at some point. This is game bug, and happen also on real hardware. Fixed by config.
| VIF is instant || There is no correct timing, or even attempt to emulate that. Everyting done by VIF0/1 is done right when pushed || Nascar 2009 is affected in possitive way, game don't have time to corrupt transfer. Probably many more games.  
|-
| VIF bugs || There is no correct timing, and queuing for some VIF commands like MSCAL. || Snowblind Engine games. Probably more.  
|-
|-
| XGKick is instant || Some games expect to XGKick happen few cycles in future, on PS3 is done instant. Fixed by config 0x07 which delay XGKick by selected value || WRC series, Wakeboarding Unleashed, TriAce games, World of Outlaws - Sprint Cars, Ty - The Tazmanian Tiger, dot Hack - G.U. series, and more
| XGKick is instant || Some games expect to XGKick happen few cycles in future, on PS3 is done instant. Fixed by config 0x07 which delay XGKick by selected value || WRC series, Wakeboarding Unleashed, TriAce games, World of Outlaws - Sprint Cars, Ty - The Tazmanian Tiger, dot Hack - G.U. series, and more
Line 1,926: Line 1,645:
| COP2 instructions are instant || Some games rely on fact that COP2 operations can take some time, on PS3 emulators they are done instantly due to lack of correctly emulated pipeline Patched by rearranging mips code || FFX, FFX-2, Ghost in The Shell SAC, Ace Combat series, Sprint Cars 1/2, Black, Run Like Hell, Everblue 2, Dragon Quest - Shounen Yangus no Fushigi na Daibouken, and many more
| COP2 instructions are instant || Some games rely on fact that COP2 operations can take some time, on PS3 emulators they are done instantly due to lack of correctly emulated pipeline Patched by rearranging mips code || FFX, FFX-2, Ghost in The Shell SAC, Ace Combat series, Sprint Cars 1/2, Black, Run Like Hell, Everblue 2, Dragon Quest - Shounen Yangus no Fushigi na Daibouken, and many more
|-
|-
| VU0 is not running in sync with EE core || VU0 is running program "at once", which mean that VU0 run until it hits E bit. From EE perspective it looks like whole VU0 program run in 1 cycle. Games that expect VU0 registers to be changed from EE side while VU0 is running are broken due to that. Partially resolved using 0x12 command with 2/3 subcommands, or by code rearranging.|| 24 The Game, ATV Quad Power Racing 2, Twisted Metal Head-On, Primal, Ghosthunter, Rayman Arena, Rayman 3, Largo winch. All games using M-bit.
| VU0 is not running in sync with EE core || Seems like old pcsx2 mVU approach is used where VU0 is running thousands of cycles ahead of EE. Partially resolved on emu using 0x12 command with 2/3 subcommands. || 24 The Game, ATV Quad Power Racing 2, Twisted Metal Head-On, Primal, Ghosthunter, Rayman Arena, Rayman 3, All games using M-bit.  
|-
| M-Bit not supported || Emulator ignore VU0 M-Bit, that cause issues for games that need it to work correctly. This is done because there is no way to sync correctly running VU0 without sync with EE. Partially resolved on emu using 0x12 command with 2/3 subcommands, or direct VU0/MIPS code rearranging. || Totally Spies! Totally Party, Mike Tyson Heavyweight Boxing, My Street, Crash Twinsanity, Marvel Nemesis, Panzer Elite Action - Fields of Glory, TriAce games (speed optimizations only), Super Monkey Ball Adventure, most Eko Software games, and many more.
|-
|-
| T-Bit not supported on VU0 || Emulator ignore VU0 T-Bit, that cause issues for games that need it to work. Note: T-Bit is correctly handled for VU1. || Spiderman 3 set T-Bit, then do cfc2 from TPC (address where VU0 stopped). Since T-Bit is ignored, TPC is wrong. Value is later copied to CMSAR0, and program continue at wrong address. Well that's what should happen, but T-Bit also not signalize correct bit in VPU-STAT. Causing another issue, also in Spiderman 3.  
| M-Bit not supported || Emulator ignore VU0 M-Bit, that cause issues for games that need it to work correctly. This is done because there is no way to sync correctly running VU0 without sync with EE. Partially resolved on emu using 0x12 command with 2/3 subcommands. || Totally Spies! Totally Party, Mike Tyson Heavyweight Boxing, My Street, Crash Twinsanity, Marvel Nemesis, Panzer Elite Action - Fields of Glory, TriAce games (speed optimizations only), Super Monkey Ball Adventure, most Eko Software games, and many more.
|-
|-
| Emulator do not update correct flag instances for COP2 while ending VU0 program on Ebit || This cause few games to read bad flag status (not status flag!) on COP2. This is resolved on emu by forcing update of MAC flag on every STATUS flag read (by config 0x12), this cause slowdowns creating a lot of unnecessary operations. || Driving Emotion Type-S, State of Emergency 2, The Getaway Black Monday.
| Emulator Fail to save correct flag instances while ending VU0 program on Ebit || This cause few games to read bad flag status (not status flag!) on COP2. This is resolved on emu by forcing update of MAC flag on every STATUS flag read (by config 0x12), this cause slowdowns creating a lot of unnesessary operations. || Driving Emotion Type-S, State of Emergency 2, The Getaway Black Monday.
|-
|-
| Not updated status flag when VDIV/VSQRT/VRSQRT is done on COP2 || Potential bad flag state can cause a lot of issues that are not related on first sight || Yanya Caballista (already patched by custom config)
| Not updated status flag when VDIV/VSQRT/VRSQRT is done on COP2 || Potential bad flag state can cause a lot of issues that are not related on first sight || Yanya Caballista (already patched by custom config)
|-
|-
| In corner cases emu select wrong block flags pipeline state (both VU0/EEonBE and VU1/VRC affected). || This can cause various issues, mostly SPS, missing graphic, specific slowdowns, etc. Issue seems to occur when branch/jump delay slot have opcode important for flags calculation. Theory is that cached microprogram don't include modified flags state from delay slot instruction. So when already recompiled program is fetched from pool, it will miss one cycle in fmac flags pipeline. This can be crucial in games that rely on it. || Tales of Legendia and Klonoa 2 set sticky flag bits to 0 and branch with sub.xyzw in delay slot (expecting that sub change status flag), Tamsoft engine games set sticky bits to 0 in branch delay slot, this was most ridiculous bug, because problematic branch was pointing to next opcode after delay slot, removing branch was enough. True Crime: NY is only known game where VU0 is affected by this bug. more..
| In corner cases emu select wrong block pipeline state while processing Flag VU opcodes. || This can cause various issues, mostly SPS, missing graphic, specific slowdowns, etc. For now it was only confirmed that FSAND opcode don't ask for exact pipeline state, but looking at assembly of other opcode this rather affect all of them. || Tales of Legendia, more..
|-
| CTC2 opcode write whole value to R register, while only 23 bits are writable. Rest is hardcoded to 0x3F800000. || Can cause many weird issues like broken physics, broken graphics. PCSX2 was also affected [[https://github.com/PCSX2/pcsx2/pull/6611 more]]. || The one game that is known to be affected, and is already patched, is Musashi: Samurai Legend.
|-
|-
| CFC2 from R register should return only 23 lower bits. || CFC2 from R on real PS2 return only lower 23 bits. Originally found out by PCSX2 team  [[https://github.com/PCSX2/pcsx2/pull/8409 more]] and later confirmed to affect ps2_netemu in emu assembly. || There is only one game that is known to be affected, Onimusha Dawn of Dreams.
|-
| Missing floating point result overflow/underflow detection (U/O flags not set) || Since this affect all units (FPU/VU), many issues can occur. But in reality it seems to not affect any games. While this is easier to implement than on x86 system (full floats range, compared to ieee754), there is no way to do that by hardware way. Because SPU add/sub don't set those flags on single precision operations, and vmx have them disabled in spu compatibility mode. || Superman Returns.
|-
| DMA between SPR and VU1 memory cause emulator panic. || Currently cause is unknown. It seems that functions responsible for transfer don't check that VU is running. Manual state that dma can be performed only when VU is not active, and pcsx2 wait until VU end. Games affected in emulators on ps3 display this warning in pcsx2 if mtvu is enabled: "MTVU: SPR Accessing VU1 Memory". Affected games are fixed by rearranging code to do lq/sq loop instead of DMA. || Summoner 2 (SPRfrom to VU1 data mem), Kaena (SPRto from VU1 data mem).
|-
| IOP SIF0/1 DMA IRQs can be disabled (masked), which is not true on real hardware. || IOP interrupts 0x2A and 0x2B should always trigger. Fixed by patches to IOP code. Ps2_emu seems to be unfacted, probably handled on real hw in CXD9208GP. || Knockout Kings 2001, DOA2: Hardcore.
|}
|}
===Software emulation bugs===
===Software emulation bugs===
Line 1,953: Line 1,661:
! Bug !! Description !! Known Affected Games
! Bug !! Description !! Known Affected Games
|-
|-
| No mipmapping support || Emulator does ignore the mipmap layers, probably for performance reasons. It is processing only the level 0 texture base pointer specified in the TEX0 register. There are games writing garbage data into that memory area, when the mipmap level is different than zero. As a result, a garbled texture is shown instead of a correct one. || Ace Combat series, Ape Escape 2, EA Sports F1 series, Harry Potter series, ICO (psuedo volumetric rays), Jak and Daxter series, Nickelodeon Barnyard and Nicktoons Unite (very strange implementation), Ratchet and Clank series and more.
| SCANMSK register ignored || Emulator does ignore the SCANMSK setting responsible for restricting the drawing primitives on the odd or even lines. It is used as a fake transparency effect in some games by merging the two display circuits. || Metal Gear Solid series (heavy used in the MGS2 on the water and reflection effects), Gran Turismo series (ghost cars).
|-
| SCANMSK register ignored || Emulator does ignore the SCANMSK setting responsible for restricting the drawing primitives on the odd or even lines. It is used as a fake transparency effect in some games by merging the two display circuits. || Metal Gear Solid series (water and reflection effects), Gran Turismo series (ghost cars), Raw Danger! (depth of field effect)
|-
| Missing PCRTC feedback write support || PCRTC feature that writes back the image to the frame buffer is not supported or broken. Additional RGB to YCbCr conversion could be performed there. || Xenosaga Episode I: Der Wille zur Macht (black and white cut scenes)
|-
|-
|}
|}
Line 2,390: Line 2,094:
|-
|-
|SLUS_209.18 || Super Monkey Ball: Deluxe                                            || 0x01 ||      0x800 || SIO2_MASK
|SLUS_209.18 || Super Monkey Ball: Deluxe                                            || 0x01 ||      0x800 || SIO2_MASK
|-
|-
|SLUS_210.59 || Tekken 5                                                            || 0x0B || 0x40000000 || SPU2_BEHAVIOR
|SLUS_210.59 || Tekken 5                                                            || 0x0B || 0x40000000 || SPU2_BEHAVIOR
|-
|-
|SLUS_210.70 || Final Fantasy XI: Chains of Promathia                                || 0x02 ||        0xB || DEV9_MASK
|SLUS_210.70 || Final Fantasy XI: Chains of Promathia                                || 0x02 ||        0xB || DEV9_MASK
|-
|-
|SLUS_210.89 || Karaoke Revolution Vol.3                                            || 0x08 ||    0x1388 || CPU_DELAY
|SLUS_210.89 || Karaoke Revolution Vol.3                                            || 0x08 ||    0x1388 || CPU_DELAY
|-
|-
|SLUS_213.31 || Sonic Riders                                                        || 0x01 ||      0x800 || SIO2_MASK
|SLUS_213.31 || Sonic Riders                                                        || 0x01 ||      0x800 || SIO2_MASK
|-
|-
|SLUS_213.39 || Puzzle Challenge                                                    || 0x01 ||      0x800 || SIO2_MASK
|SLUS_213.39 || Puzzle Challenge                                                    || 0x01 ||      0x800 || SIO2_MASK
|-
|-
|SLUS_214.04 || Final Fantasy XI: Treasures of Aht Urhgan                            || 0x02 ||        0xB || DEV9_MASK
|SLUS_214.04 || Final Fantasy XI: Treasures of Aht Urhgan                            || 0x02 ||        0xB || DEV9_MASK
|-
|-
|SLUS_214.52 || Valkyrie Profile 2: Silmeria                                        || 0x08 ||    0x1388 || CPU_DELAY
|SLUS_214.52 || Valkyrie Profile 2: Silmeria                                        || 0x08 ||    0x1388 || CPU_DELAY
|-  
|-  
|}
|}
 
 
==Other game patches (unofficial)==
==Other game patches (unofficial)==
There are other unofficial ways to patch the PS2 games such the [https://forums.pcsx2.net/Thread-A-simplistic-guide-to-pnach-files-aka-pnach-for-dummies pnach] format, or the widescreen patches that allows 16:9 screen output for some games by hex editing the ISO, or by applying ppf patches. Games work fine on PS3 with same compatibility like before patching. Also some 480p (aka progressive scan) patches work fine. http://ps2wide.net/
There are other unofficial ways to patch the PS2 games such the [https://forums.pcsx2.net/Thread-A-simplistic-guide-to-pnach-files-aka-pnach-for-dummies pnach] format, or the widescreen patches that allows 16:9 screen output for some games by hex editing the ISO, or by applying ppf patches. Games work fine on PS3 with same compatibility like before patching. Also some 480p (aka progressive scan) patches work fine. http://ps2wide.net/
 
The problem of this methods is the patch is applyed over the ISO and is modifyed permanently, but this problem can be avoided in PS3 because that unofficial patches can be "ported" to the official config format to be used by ps2_netemu.self, by using the official config format the settings and patchs from the config file are applyed "on the fly" and the ISO is not modifyed
 
==ps2_title_brute code==


The problem of this methods is the patch is applyed over the ISO and is modifyed permanently, but this problem can be avoided in PS3 because that unofficial patches can be "ported" to the official config format to be used by ps2_netemu.self, by using the official config format the settings and patchs from the config file are applyed "on the fly" and the ISO is not modifyed
A script to calculate whatever this encode is that is used in ps2emu, gxemu and softemu from given input title id.
 
==ps2_title_brute code==


A script to calculate cdvd key magic used in ps2emu, gxemu and softemu from given input title id.
On real PS2 this value seems to be stored at 0x1F402020-0x1F402024.
It contains code for bruting as well. Just call gen_sum with the title id in a specific format to get it.
It contains code for bruting as well. Just call gen_sum with the title id in a specific format to get it.


Line 2,538: Line 2,242:
'''
'''
</syntaxhighlight>
</syntaxhighlight>
<br>
Alternative script version for better readability. Work same way as one above, just cleaner looking code.
<syntaxhighlight lang="python">
ID = "SLUS_202.02"
def gen_sum2(title):


        decimal_id = 0
        decimal_id += ( ord(title[10:11]) - 0x30)
        decimal_id += ((ord(title[9:10])  - 0x30) * 10)
        decimal_id += ((ord(title[7:8])  - 0x30) * 100)
        decimal_id += ((ord(title[6:7])  - 0x30) * 1000)
        decimal_id += ((ord(title[5:6])  - 0x30) * 10000)
       
        first_char  = ord(title[0:1])
        second_char = ord(title[1:2])
        third_char  = ord(title[2:3])
        fourth_char = ord(title[3:4])
       
        temp0  = (first_char  >> 4) & 7
        temp1  = (second_char >> 3) & 0xF
        temp2  = (third_char  >> 2) & 0x1F
        temp3  = (fourth_char >> 1) & 0x3F
        temp4  = (first_char  << 4)
        temp5  = (second_char << 5)
        temp6  = (third_char  << 6)
        temp7  = (fourth_char << 7)
       
        temp8  = (decimal_id >> 10) & 0x7F
        temp9  = (decimal_id << 3 )
        temp10 = (decimal_id >> 2 ) & 0xF8
        temp8 |= temp7
        temp3 |= temp6
        temp2 |= temp5
        temp1 |= temp4
        temp0 |= temp9
       
        temp8 &= 0xFF
        temp3 &= 0xFF
        temp2 &= 0xFF
        temp1 &= 0xFF
        temp0 &= 0xFF
       
        temp8 ^= temp10
        temp3 ^= temp10
        temp2 ^= temp10
        temp1 ^= temp10
        temp0 ^= temp10       
        result = (temp0 | (temp1 << 8) | (temp2 << 16) | (temp3 << 24) | (temp8 << 32))
        return result
print(hex(gen_sum2(ID)))
</syntaxhighlight>
Alternative implementation: https://github.com/PCSX2/pcsx2/blob/1a3d77b2c0c6b57313f0dceaf5ecc3f8cb453497/pcsx2/CDVD/CDVD.cpp#L545


==External References==
==External References==
Line 2,608: Line 2,257:
* http://wiki.pcsx2.net/index.php/Category:Software_rendering_only_games
* http://wiki.pcsx2.net/index.php/Category:Software_rendering_only_games


{{Reverse engineering}}<noinclude>
{{Reverse engineering}}<noinclude>[[Category:Main]]</noinclude>
[[Category:Main]]
</noinclude>
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