Editing PS2 Compatibility
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= PS2-Compatibility = | = PS2-Compatibility = | ||
Early PS3 FAT [[CECHAxx]]/[[COK-00x#COK-001|COK-001]] and [[CECHBxx]]/[[COK-00x#COK-001|COK-001]] : Full compatibility with GS+EE and Rambus memory. Later [[CECHCxx]]/[[COK-00x#COK-002|COK-002]] and [[CECHExx]]/[[COK-00x#COK-002W|COK-002W]] had instead of GS+EE a single GS and lacked the Rambus memory. | |||
== PS2 Hardware == | |||
[[Category:Hardware]] | |||
=== PS2 EE/GS and PS2 GS === | |||
<div style="float:right">[[File:CXD9833GB-ps2eegs-bw-bottomside.png|200px|thumb|left|IC7004, (PS2 EE/GS)<br />Productcode: Sony CXD9833GB<br />PartNo.: 8-753-227-14<br />BALL-GRID-ARRAY overview CPU view<br />facing BGA A1 marker:northeast/topright]]<br />[[File:CXD9833GB-ps2eegs-bw-pcbview.png|200px|thumb|left|IC7004, (PS2 EE/GS)<br />Productcode: Sony CXD9833GB<br />PartNo.: 8-753-227-14<br />BALL-GRID-ARRAY overview PCB view<br />facing BGA A1 marker:northwest/topleft]]</div> | |||
= | ==== Sony CXD2953AGB (PS2 EE/GS) ==== | ||
Used on [[CECHAxx]]/[[COK-00x#COK-001|COK-001]] and [[CECHBxx]]/[[COK-00x#COK-001|COK-001]] <br /> | |||
http://www.ps3devwiki.com/index.php?title=File:SCEI_CXD2953AGB.JPG <br /> | |||
==== Sony CXD9833GB (PS2 EE/GS) ==== | |||
8-753-227-14 / IC7004 <br /> | |||
http://www.ps3devwiki.com/index.php?title=File:CXD9833GB.png <br /> | |||
BGA 536 (32x32 minus 22*22 center square minus 4 cornerpads) | |||
pitch : 0.76mm | |||
<div style="height:420px; overflow:auto"> | |||
<!--// insert fancy table here //--> | |||
</div> | |||
[http://www.ps3devwiki.com/ | ==== Sony CXD2972GB (PS2 GS) ==== | ||
Used on PS3 FAT [[CECHCxx]]/[[COK-00x#COK-002|COK-002]] and [[CECHExx]]/[[COK-00x#COK-002W|COK-002W]] <br /> | |||
http://www.ps3devwiki.com/index.php?title=File:CXD2972GB.JPG <br /> | |||
< | === PS2 Rambus 32MB memory === | ||
File: | <div style="float:right">[[File:K4R271669F.png|200px|thumb|left|54-ball FBGA<br />Samsung K4R271669F / K4R271669H<br />Rambus]]</div> | ||
The earlier models [[CECHAxx]]/[[COK-00x#COK-001|COK-001]] and [[CECHBxx]]/[[COK-00x#COK-001|COK-001]] with hardware PS2 compatibility also contained an extra 32MB of RDRAM using two 16MB Samsung chips. | |||
{| border="1" cellspacing="0" cellpadding="5" border="#999" class="wikitable" style="border:1px solid #999; border-collapse: collapse;" | |||
{| | |- bgcolor="#cccccc" | ||
! Type !! Size !! Speed !! Voltage !! Packaging !! Manufacturer !! Serial Number !! Description | |||
| | |||
|- | |- | ||
| | | RDRAM || 16MB || 800MHz || 2.50 +/- 0.13V || 54-pin || Samsung || K4R271669F || 32MB total (2 chips) PS2 HW BC | ||
|- | |- | ||
| | | RDRAM || 16MB || 800MHz || 2.50 +/- 0.13V || 54-pin || Samsung || K4R271669H || 32MB total (2 chips) PS2 HW BC | ||
|- | |||
| | |||
| | |||
| | |||
|- | |- | ||
|} | |} | ||
==== Samsung K4R271669F / K4R271669H (PS2 Rambus 800MHz 16MB 2.5V FBGA54 - 2x) ==== | |||
Used on PS3 FAT [[CECHAxx]]/[[COK-00x#COK-001|COK-001]] and [[CECHBxx]]/[[COK-00x#COK-001|COK-001]] <br /> | |||
Datasheet: [http://www.samsung.com/global/system/business/semiconductor/product/2007/6/11/XDR_RDRAM/RDRAM/Component/128MbitConsumer/K4R271669H/ds_k4r271669h_rev10.pdf ds_k4r271669h_rev10.pdf] <br /> | |||
http://www.ps3devwiki.com/index.php?title=File:K4R271669F.png <br /> | |||
== | === PS2 bridgechip === | ||
==== Sony CXD9208GP2 (PS2 ?) ==== | |||
to | 6-710-433-01 / IC7301 <br /> | ||
Used on PS3 FAT [[CECHAxx]]/[[COK-00x#COK-001|COK-001]] and [[CECHBxx]]/[[COK-00x#COK-001|COK-001]] <br /> | |||
Unknown bridge chip from EE+GS to the CXM4024R (see [[MultiAV]]) and the [[RSX]] <br /> | |||
http://www.ps3devwiki.com/index.php?title=File:SCEI_CXD9208GP.JPG <br /> | |||
== Software == | |||
See: [[Emulation#ps2emu]] | |||
{{Models}} | |||
[[Category:PS2 Compatibility]] | |||
[[Category: | |||