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== PCIe ==
== PCIe ==
Bus, resembling [https://en.wikipedia.org/wiki/PCI_Express Conventional PCIe] x4 1.0, partly connected to [[South Bridge]], with 200 exposed pads.<br>
Bus, resembling Conventional PCIe x4 1.0, partly connected to [[South Bridge]], with 200 exposed pads.<br/>
Can be activated by setting the [[Repository_Nodes|Repository Node]] ''sys.lv1.iosys.pciex'' to ''1'' (in [[sysctl.txt]]). The PCIe MMIO address space can be extended to 1GB by setting ''sys.lv1.large_pciex'' to ''1''.<br>
Can be activated by setting the repository node ''sys.lv1.iosys.pciex'' to ''1''. The PCIe MMIO address space can be extended to 1GB by setting ''sys.lv1.large_pciex'' to ''1''.
Supported PCIe devices:
 
{| class="wikitable sortable"
|-
! Device ID !! Subsystem ID !! Device "Name" !! Firmware
|-
| 10330125 || - || NEC µPD720400 PCI Express - PCI/PCI-X Bridge || [[0.8.0.004.r010|080.004]] to {{latestPS3}}
|-
| 10DE00F8 || 10DE01FE || Nvidia NV45GL Quadro FX 3400 256MB based graphics card || [[010.???]] to [[0.6.0.013.r010|060.013]]
|-
| 10DE00F9 || 10DE02E6 || Nvidia NV40 GeForce 6800 Ultra 256MB based graphics card || [[020.???]] to [[0.6.0.013.r010|060.013]]
|-
| 10DE0091 || 10DE02C2 || Nvidia NV47 GeForce 7800 GTX 256MB based graphics card || [[030.017.r00?|030.017]] to [[0.6.0.013.r010|060.013]]
|-
| 10DE009D || 10DE0303 || Nvidia NV47 Quadro FX 4500 512MB based graphics card || [[040.001.r007|040.001]] to [[0.6.0.013.r010|060.013]]
|-
| - || 10DE02D2 || Nvidia RSX (A01/A02) based graphics card || [[0.6.0.004.r010|060.004]] to [[0.6.0.013.r010|060.013]]
|-
|}


=== 200-pin layout ===
=== 200-pin layout ===
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{| class="wikitable sortable"
{| class="wikitable sortable"
|-
|-
! Pin !! Usage !! [https://en.wikipedia.org/wiki/PCI_Express#Pinout Standardized Pinout] !! Remark
! Pin !! Usage !! Standardized Pinout !! Remark
|-
|-
| 1  || GND ||  ||
| 1  || GND ||  ||
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