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<span style="background:red; color:#ffffff;">Warning, this page is way too long and is voted to be split into seperate sections</span>
[[Category:Software]]
<span style="background:red; color:#ffffff;">Warning, this page way too long and voted to be split into seperate sections</span>


----
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Line 19: Line 20:
LPAR = Logical Partition  
LPAR = Logical Partition  


lpar1 starts at 0x&lt;unknown&gt;, and it's believed to be the memory space where lv1 stores its variables, flags and other data.  
lpar1 starts at 0x&lt;unknown&gt;, and its believed to be the memory space where lv1 stores its variables, flags and other data.  


lpar2 starts at 0x80000000000 and it's believed to be the memory space where lv2 stores its variables, flags and other data.  
lpar2 starts at 0x80000000000 and it's belived to be the memory space where lv2 stores its variables, flags and other data.  


<br>
<br>
Line 180: Line 181:
There are 2 system call tables in HV. The first one stores system calls 0 - 36. The second one stores system calls 0x10000 - 0x100FF.  
There are 2 system call tables in HV. The first one stores system calls 0 - 36. The second one stores system calls 0x10000 - 0x100FF.  


== UX System call table 0 - 36  ==
== System call table 0 - 36  ==


0x0035FAE8 (3.15)  
0x0035FAE8 (3.15)  
Line 187: Line 188:


=== System call numbers  ===
=== System call numbers  ===
0x0 - void eosh(void) //end_of_signal_handling(void)


0x1 - pid_t getpid(void)  
0x1 - getpid(void)  


0x2 - pid_t getppid(void)  
0x2 - getppid(void)  


0x3 - pid_t fork(void)  
0x3 - fork(void)  


0x4 - void exit(int status)
0x4 - exit  


0x5 - void execv(const char *path, char *const argv[])  
0x5 - exec(filename)  


0x6 - void wait(int *status)  
0x6 - wait(status)  


0x7 - int open(const char *path, int flags)  
0x7 - open(filename)  


0x8 - void close(int fd)  
0x8 - close(fd)  


0x9 - ssize_t read(int fd, void *buf, unsigned int nbyte)
0x9 - read  


0xA - ssize_t write(int fd, const void *buf, unsigned int nbyte)
0xA - write  


0xB - void lseek(int fd, long offset, int whence)
0xB - seek


0xC - unlink(const char *path)  
0xC - unlink(filename)  


0xD - void signal(int sig, void *func(int sig))
0xD - signal  


0xE - int kill(int pid, int signal_type)  
0xE - kill(pid, signal type)  


0xF - int brk(void *addr)
0xF - brk  


0x10 - int socket(int af, int type, int protocol) (supports only address family 0x1F, type 0x0 and protocol 0x0)  
0x10 - socket(af, type, protocol) (supports only address family 0x1F, type 0x0 and protocol 0x0)  


0x11 - int bind(int sockfd , const sockaddr *addr, unsigned int addrlen)
0x11 - bind  


0x12 - int listen(int sockfd, int backlog)  
0x12 - listen(fd, backlog)  


0x13 - int accept(int sockfd, sockaddr *addr, unsigned int *addrlen)
0x13 - accept  


0x14 - int connect(int sockfd, const sockaddr *serv_addr, unsigned int addrlen)
0x14 - connect  


0x15 - void putchar(int c)
0x15 -&nbsp;?


0x16 - int pause(void)  
0x16 - pause(void)  


0x17 - int sleep(unsigned int seconds)  
0x17 - sleep(seconds)  


0x18 - int mmap(void *addr, unsigned long size, int prot, int flags, int fd, long offset, void *mapped_addr)  
0x18 - mmap(addr, size, prot, flags, fd, offset)  


0x19 - int munmap (void *addr, unsigned long size)
0x19 - munmap  


0x1A - int chdir(const char *path)
0x1A - some fs func for directories, perhaps readdir


0x1B - void getchar(char *c)
0x1B -&nbsp;?


0x1C - map_pages(...) (used for alloc)  
0x1C - map_pages (used for alloc)  


0x1D - unmap_pages(...) (used for free)  
0x1D - unmap_pages (used for free)  


0x1E - int select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds, struct timeval *timeout)
0x1E - select  


0x1F - getcwd(...)
0x1F - getcwd  


0x20 - Not used
0x20 -&nbsp;?


0x21 - unsigned int alarm(unsigned int seconds)
0x21 - alarm  


0x22 - int ioctl(int fd, unsigned __int64 request, ...)
0x22 - ioctl  


0x23 - pme_memalign(...)
0x23 - _map_pages


0x24 - ?
0x24 - _unmap_pages


== PMI System call table 0x10000 - 0x100FF  ==
== System call table 0x10000 - 0x100FF  ==


0x0035DE78 (3.15)  
0x0035DE78 (3.15)  
Line 269: Line 269:
=== System call numbers  ===
=== System call numbers  ===


0x10000 - allocate_memory(LPAR id, size, log2 of page size,&nbsp;?,&nbsp;?) / construct_memory_segment
0x10000 - allocate_memory_region(LPAR id, size, log2 of page size,&nbsp;?,&nbsp;?)  


0x10001 - query_logical_partition_address_region_info
0x10001 - lpar_query_address_region_info


0x10002 - translate_logical_partition_to_physical_address(LPAR id, LPAR address, physical addr)  
0x10002 - lpar_memory_addr_to_phys_addr(LPAR id, LPAR address, physical addr)  
 
0x10003 - map_physical_address_region
 
0x10004 - unmap_physical_address_region


0x10005 - construct_logical_pu  
0x10005 - construct_logical_pu  
0x10006 - destruct_logical_pu


0x10007 - activate_logical_pu(LPAR id, PPE id)  
0x10007 - activate_logical_pu(LPAR id, PPE id)  


0x10009 - construct_logical_partition(0, LPAR id, outlet)  
0x10009 - construct_logical_partition(0, LPAR id, outlet)  
0x1000A - get_logical_console_info
0x1000B - get_remote_file_size
0x1000C - read_remote_file
0x1000D - write_remote_file


0x1000E - release_memory_region(LPAR id, memory region address)  
0x1000E - release_memory_region(LPAR id, memory region address)  


0x1001A - construct_event_receive_port  
0x1001A - construct_event_receive_port  
0x1001B - destruct_event_receive_port
0x1001C - request_to_connect_event_ports
0x1001D - connect_event_ports
0x1001E - destruct_event_send_port
0x1001F - send_event_externally
0x10020 - get_status_of_event_send_port
0x10021 - get_event_port_connection_request
0x10022 - end_of_control_signal_processing


0x10024 - shutdown_logical_partition(LPAR id, shutdown command)  
0x10024 - shutdown_logical_partition(LPAR id, shutdown command)  
Line 320: Line 290:


0x10026 - get_logical_partition_info  
0x10026 - get_logical_partition_info  
0x10027 - read_privilege_set
0x10028 - modify_privilege_set
0x10029 - get_remote_file_size_long_name
0x1002A - read_remote_file_long_name
0x1002B - write_remote_file_long_name


0x1002C - construct_scheduling_table  
0x1002C - construct_scheduling_table  
Line 335: Line 295:
0x1002D - set_scheduling_slot  
0x1002D - set_scheduling_slot  


0x1002E - load_scheduling_table
0x1002E - ?
 
0x10032 - poweroff


0x10033 - get_remote_file_name
0x10032 - accesses system console


0x10034 - allocate_cp_channel
0x10034 - ?


0x10035 - release_cp_channel
0x10035 - ?


0x10036 - power_down
0x10036 - accesses system console


0x10037 - ?
0x10037 - ?
Line 353: Line 311:
0x10039 - ?
0x10039 - ?


0x10040 - construct_spe_type_1(SPE id, shaddow_addr) / construct_logical_spu
0x10040 - construct_spe_type_1(SPE id, shaddow_addr)  


0x10041 - destruct_spe(SPE id) / destruct_logical_spu
0x10041 - destruct_spe(SPE id)  


0x10042 - decrypt_lv2_self(spe id, LPAR auth id, SELF file image ptr, LPAR memory address)  
0x10042 - decrypt_lv2_self(spe id, LPAR auth id, SELF file image ptr, LPAR memory address)  
Line 363: Line 321:
0x10044 - disable_spe_execution  
0x10044 - disable_spe_execution  


0x10045 - read_spu_puint_mb(unsigned long spu_id, unsigned long msg)
0x10045 - set_spe_interrupt_mask
 
0x10046 - read_spe_problem_state_register(spe id, register offset, value) / read_spu_problem_state_area_register


0x10047 - write_spe_problem_state_register(spe id, register offset, value) / write_spu_problem_state_area_register
0x10046 - read_spe_problem_state_register(spe id, register offset, value)  


0x1004A - install_revoke_list
0x10047 - write_spe_problem_state_register(spe id, register offset, value)


0x1004B - disable_spe_loading  
0x1004B - disable_spe_loading  
0x1004C - install_access_control_table?
0x1004D - get_storage_status?
0x1004E - get_region_table_bits?
0x1004F - commit_region_update?
0x10050 - abort_region_update?
0x10051 - set_storage_tampered?


0x10053 - pmi_set_guest_os_mode  
0x10053 - pmi_set_guest_os_mode  


0x1007F - pause
0x10081 - accesses system console
 
0x10080 - get_total_execution_time
 
0x10081 - reset
 
0x10083 - construct_logical_rsx


0x10084 - construct_virtual_uart(LPAR id, VUART id, VUART data buffer size)  
0x10084 - construct_virtual_uart(LPAR id, VUART id, VUART data buffer size)  


0x10085 - destruct_virtual_uart(LPAR id, VUART id)  
0x10085 - destruct_virtual_uart(LPAR id, VUART id)  
0x10086 - establish_virtual_uart_channel


0x10088 - RSX_syscall_10088(LPAR id)  
0x10088 - RSX_syscall_10088(LPAR id)  
Line 415: Line 351:
0x100C2 - modify_repository_node_value(LPAR id)  
0x100C2 - modify_repository_node_value(LPAR id)  


0x100C3 - remove_repository_node(LPAR id)
0x100C3 - remove_repository_node_value(LPAR id)


= Process  =
= Process  =
Line 423: Line 359:
HV supports only 32 processes simultaneously. The number of processes currently running in HV is stored at address 0x0035EA54 (3.15) and 0x00357E3C (2.60).  
HV supports only 32 processes simultaneously. The number of processes currently running in HV is stored at address 0x0035EA54 (3.15) and 0x00357E3C (2.60).  


The process table is an array of 32 process table entries.
The process table is an array of 32 process table entries.  
 
0x0036C930 (4.30)
 
0x0036C8B0 (4.21)
 
0x00365458 (4.11)


0x0035F8D0 (3.55)
0x0035F8D0 (3.55)
Line 570: Line 500:
*0x000A9870 (PID 6)  
*0x000A9870 (PID 6)  
*0x00084B80 (PID 9)
*0x00084B80 (PID 9)
In JIG 2.43:
*(PID3) <- ss_server3
*(PID4) <- ss_sc_init_pu
*(PID5) <- ss_server2
*(PID6) <- ss_server1
*(PID7) <- factory_data_mngr_server
*(PID8) <- updater_frontend
(see [http://pastie.org/pastes/9407461/text?key=f6bk5lof0g4bgeu6xrn5ua this])


= PThread  =
= PThread  =
Line 671: Line 591:
== Member variables  ==
== Member variables  ==


offset 0x0 - pointer to previous AddressProtectionDomain object  
offset 0x8 - pointer to previous AddressProtectionDomain object  


offset 0x8 - pointer to next AddressProtectionDomain object  
offset 0x10 - pointer to next AddressProtectionDomain object  


offset 0x10 - poiinter to pointer to SLB entries  
offset 0x18 - poiinter to pointer to SLB entries  


offset 0x18 - pointer to AddressSpace object that owns this object  
offset 0x20 - pointer to AddressSpace object that owns this object  


offset 0x2A - pointer to previous ProtectionPage  
offset 0x34 - pointer to previous ProtectionPage  


offset 0x34 - pointer to next ProtectionPage  
offset 0x3C - pointer to next ProtectionPage  


offset 0x40 - Mutex object
offset 0x48 - Mutex object  


= ProtectionPage  =
= ProtectionPage  =
Line 840: Line 760:
=== vtable  ===
=== vtable  ===


0x003569F8 (3.15)
0x003569F8 (3.15)  


== IOIF device file objects  ==
== IOIF device file objects  ==
Line 1,026: Line 946:
=== vtable  ===
=== vtable  ===


0x352308 (3.15)
0x000x352308 (3.15)  


=== Member variables  ===
=== Member variables  ===
Line 1,705: Line 1,625:


*Before a storage region is accessed, HV checks access rights of the caller.  
*Before a storage region is accessed, HV checks access rights of the caller.  
*Repository node '''ss.laid''' ([[Authority ID|LPAR Authority ID]]) is evaluated for this purpose.  
*Repository node '''ss.laid''' (LPAR authentication id) is evaluated for this purpose.  
*If LPAR has a repository node '''ios.ata.region0.access''' (value doesn't matter) then the access rights check never fails. After System Manager sets ATA keys it removes this repository node from LPAR 1. If we add this repository node again or patch System Manager so it's not removed then we will be able to access all storage regions of all storage devices.
*If LPAR has a repository node '''ios.ata.region0.access''' (value doesn't matter) then the access rights check never fails. After System Manager sets ATA keys it removes this repository node from LPAR 1. If we add this repository node again or patch System Manager so it's not removed then we will be able to access all storage regions of all storage devices.
*'''ALL storage accesses from LPAR 1 are allowed'''  
*'''ALL storage accesses from LPAR 1 are allowed'''  
Line 1,758: Line 1,678:


*The storage subsystem is a storage device itself.  
*The storage subsystem is a storage device itself.  
*It's a pseudo device used to notify a LPAR when storage devices become e.g. ready.  
*It's a psuedo device used to notify a LPAR when storage devices become e.g. ready.  
*Linux implements a loop and reads from this device and process notifications (adds new devices dynamically).
*Linux implements a loop and reads from this device and process notifications (adds new devices dynamically).


Line 1,836: Line 1,756:


*The commands can be used with HV call '''lv1_storage_send_device_command'''.  
*The commands can be used with HV call '''lv1_storage_send_device_command'''.  
*However, before a command is executed HV does bit manipulation with it and checks it against the value of repository node '''ss.laid''' or also called '''[[Authority ID|LPAR Authority ID]]'''. If this test fails then the command is NOT executed.
*However, before a command is executed HV does bit manipulation with it and checks it against the value of repository node '''ss.laid''' or also called '''LPAR authentication ID'''. If this test fails then the command is NOT executed.


{| class="wikitable FCK__ShowTableBorders"
{| class="wikitable FCK__ShowTableBorders"
Line 2,089: Line 2,009:


*The commands can be used with HV call '''lv1_storage_send_device_command'''.  
*The commands can be used with HV call '''lv1_storage_send_device_command'''.  
*However, before a command is executed HV does bit manipulation with it and checks it against the value of repository node '''ss.laid''' or also called '''[[Authority ID|LPAR Authority ID]]'''. If this test fails then the command is NOT executed.
*However, before a command is executed HV does bit manipulation with it and checks it against the value of repository node '''ss.laid''' or also called '''LPAR authentication ID'''. If this test fails then the command is NOT executed.


{| class="wikitable FCK__ShowTableBorders"
{| class="wikitable FCK__ShowTableBorders"
Line 2,689: Line 2,609:


*The commands can be used with HV call '''lv1_storage_send_device_command'''.  
*The commands can be used with HV call '''lv1_storage_send_device_command'''.  
*However, before a command is executed HV does bit manipulation with it and checks it against the value of repository node '''ss.laid''' or also called '''[[Authority ID|LPAR Authority ID]]'''. If this test fails then the command is NOT executed.
*However, before a command is executed HV does bit manipulation with it and checks it against the value of repository node '''ss.laid''' or also called '''LPAR authentication ID'''. If this test fails then the command is NOT executed.


{| class="wikitable FCK__ShowTableBorders"
{| class="wikitable FCK__ShowTableBorders"
Line 2,742: Line 2,662:
block size = 512  
block size = 512  


*It's a pseudo device.  
*It's a psuedo device.  
*'''This storage device redirects all requests to the region 1 of HDD storage device&nbsp;!!!'''
*'''This storage device redirects all requests to the region 1 of HDD storage device&nbsp;!!!'''


Line 3,475: Line 3,395:
! Address of Data in HV Dump  
! Address of Data in HV Dump  
! Size of Data
! Size of Data
! Entry Id
|-
|-
| 0  
| 0  
| lv1ldr
| -
| 0x0C150000  
| 0x0C150000  
| 0x1E5CC
| 0x1E5CC
| 0x01
|-
|-
| 1  
| 1  
Line 3,487: Line 3,405:
| 0x00011000  
| 0x00011000  
| 0xE8D0
| 0xE8D0
| 0x00
|-
|-
| 2  
| 2  
Line 3,493: Line 3,410:
| 0x00020000  
| 0x00020000  
| 0x16DA0
| 0x16DA0
| 0x02
|-
|-
| 3  
| 3  
Line 3,499: Line 3,415:
| 0x00055000  
| 0x00055000  
| 0x12E44
| 0x12E44
| 0x04
|-
|-
| 4  
| 4  
Line 3,505: Line 3,420:
| 0x00037000  
| 0x00037000  
| 0x1DAE4
| 0x1DAE4
| 0x03
|-
|-
| 5  
| 5  
Line 3,511: Line 3,425:
| 0x00068000  
| 0x00068000  
| 0x860
| 0x860
| 0x0C
|-
|-
| 6  
| 6  
| QA Flag
| -
| 0x00069010  
| 0x00069010  
| 0x8
| 0x8
| 0x0F
|-
|-
| 7  
| 7  
| QA Flag Token
| -
| 0x00069020  
| 0x00069020  
| 0x50
| 0x50
| 0x10
|-
|-
| 8  
| 8  
| Trace Level
| -
| 0x00069070  
| 0x00069070  
| 0x8
| 0x8
| 0x11
|}
|}


Line 3,593: Line 3,503:
=== appldr  ===
=== appldr  ===


*'''appldr''' is used for decryption of SELFs or EDATs
*'''appldr''' is used for decryption of SELFs  
*HV call '''lv1_authenticate_program_segment''' loads '''appldr'''
*HV call '''lv1_authenticate_program_segment''' loads '''appldr'''


Line 3,602: Line 3,512:
==== Loading appldr  ====
==== Loading appldr  ====


*64 bit memory address of '''appldr''' is written into 32 bit SPU register '''SPU_In_Mbox'''  
*64 bit memory address of '''isoldr''' is written into 32 bit SPU register '''SPU_In_Mbox'''  
*'''metldr''' is loaded
*'''metldr''' is loaded


Line 3,989: Line 3,899:
offset 0x90 - LPAR image path  
offset 0x90 - LPAR image path  


offset 0x1C0 - LPAR ability (8 bytes)
offset 0x1C0 - LPAR ability (8 bytes)  


=== Types of System Manager  ===
=== Types of System Manager  ===
Line 4,449: Line 4,359:
| 0xA  
| 0xA  
| 0x1B6  
| 0x1B6  
| Makes a triple beep
| Makes a double beep
|-
|-
| 0x29  
| 0x29  
Line 4,461: Line 4,371:
| Makes a continuous beep
| Makes a continuous beep
|}
|}
field 1 seems relative to beep tone, as 0x25 sounds different


=== Active System Managers in HV dump 3.15  ===
=== Active System Managers in HV dump 3.15  ===
Line 4,656: Line 4,565:
| 0x8000  
| 0x8000  
| 8  
| 8  
| 0x8001 - 0x8005
|  
| [[Updater_Frontend|Updater Frontend]]
|  
|-
|-
| 0x9000  
| 0x9000  
Line 4,666: Line 4,575:
| 0x10000  
| 0x10000  
| 0x23  
| 0x23  
| 0x10001-0x10007
| -  
| [[SB_Manager|SBM (South Bridge Manager)]]
| -
|-
|-
| 0x11000  
| 0x11000  
Line 4,702: Line 4,611:
| 0x16  
| 0x16  
| 0x22001 - 0x22004
| 0x22001 - 0x22004
| [[Factory_Data_Manager|Factory Data Manager]]
|  
|-
|-
| 0x24000  
| 0x24000  
Line 4,740: Line 4,649:
     uint32_t retval;
     uint32_t retval;
     uint8_t res[4];
     uint8_t res[4];
     uint64_t laid;            /* LPAR Authority ID */
     uint64_t laid;            /* LPAR authority id */
     uint64_t paid;            /* Program Authority ID */
     uint64_t paid;            /* Program authority id */
}
}
</pre>
</pre>
Line 4,772: Line 4,681:
*The size of the body depends on a used service.
*The size of the body depends on a used service.


= LPAR Memory Management =
== 0x5000 - Storage Manager ==


== Memory Region class ==
{| class="wikitable FCK__ShowTableBorders"
 
|-
This class is the base class for different memory region types.
! Packet ID
 
! Description
=== vtable  ===
|-
 
| 0x5001
0x003578B0 (3.15)  
| Set Encdec Key
|-
| 0x5002
| Set/Delete ATA (Encdec) Key
|-
| 0x5003
| Get Random Number
|-
| 0x5004
| Authenticate BD Drive
|-
| 0x5005
| Authenticate PS2 Disc
|-
| 0x5006
| Get Secure Firmware Version
|-
| 0x5007
| HW disc auth emu
|-
| 0x5008
| HW mc
|-
| 0x5009
| HW me auth header
|-
| 0x500A
| HW me dec block
|}


=== Member variables  ===
*Storage Manager service is used e.g. by '''syscall 864''' and '''syscall SYS_SS_MEDIA_ID'''
*GameOS's VSH uses '''syscall 864'''
*Storage Manager executes SPU module '''sb_iso_spu_module.self'''
*Storage Manager communicates with devices '''/dev/encdec0''' and '''/dev/rbd0''' from LPAR 1
*2nd value from repository node '''bus1.id''' is used by Storage Manager
*Storage Manager communicates with '''sb_iso_spu_module.self''' through a shared DMA memory buffer and SPU MBox
*'''EID4''' data is passed to '''sb_iso_spu_module.self''' module.


offset 0x40 - pointer to LPAR object that owns this memory region
==== SB Isolation DMA Buffer Header  ====
<pre>struct sb_iso_header
{
    u32 seqno;
    u32 mbmsg;
    u32 cmd;
    u32 cmd_size;
    u8 cmd_data[0];
}
</pre>
*seqno has values 0x03 to 0x08. It is incremented when sending and receiving data from the spu.


offset 0x48 - type of memory region (8 bytes)
=== 0x5001 - Set Encdec Key  ===


offset 0x50 - LPAR start address of memory region
* This service allows you to set ENCDEC keys with index '''0xC - 0xF'''
* '''By patching HV process 6 it would be possible to set default ENCDEC key (used for HDD encryption) to a value different from the default one !!! It means we could encrypt our HDDs with a key we want !!!'''
* The service accepts 2 parameters: a key (max 24 bytes) and a key length (in bits)
* Valid key length values: '''0x40''', '''0x80''' and '''0xC0'''
* The service returns the ENCDEC key index used for the key
* '''ENCDEC supports upto 16 keys !!!'''
* Storage Manager in HV process 6 has a bit mask of size 2 bytes which indicates which keys are used currently.
Per default, keys with index 0x0 - 0xB are not free. But we could patch it also.


offset 0x58 - size of memory region (8 bytes)  
=== 0x5002 - Set/Delete ATA (Encdec) Key  ===


offset 0x60 - flags (8 bytes)  
*Sets/Deletes ATA (Encdec) Key
*The service has only one parameter of size 8 bytes: '''0x100 - Set ATA Key''' and '''0x110 - Delete ATA Key'''.
*This service is used e.g. by '''System Manager''' in HV Process 9 during LPAR booting.
*SPM doesn't allow GameOS to use this service.
*3 possible key lengths: 0x40, 0x80 and 0xC0
*This service communicates with '''/dev/encdec0''' device.
*The service uses ENCDEC device commands '''EdecKgen1 (0x81)''', '''EdecKgen2 (0x82)''', '''EdecKset (0x83)''' and '''EdecKgenFlash (0x84)'''.
*This service communicates also with '''/dev/rbd0''' device.
*I guess that the ATA key is stored encrypted in '''EID4''' data.
*This service is used by LPAR Manager in HV Process 9 during LPAR 2 loading.
* I tested this service on Linux with '''ps3dm-utils''' and after deleting ATA key the sectors on VFLASH or HDD were NOT decrypted by HV
* After setting ATA key again, the sectors were encrypted/decrypted by HV again
* '''Deleting an ENCDEC key is nothing more than setting key with all bytes set to 0x0 !!!'''
* On old PS3s which didn't use HDD for VFLASH, HV uses 2 ENCDEC keys, one for HDD (key index 1) and one for VFLASH (key index 0). On new PS3s which use HDD for VFLASH, only one ENCDEC key is used (key index 1).


offset 0xA0 - log2 of page size
==== Service Parameter Table ====


=== Generating New LPAR Memory Region Addresses ===
{| class="wikitable FCK__ShowTableBorders"
|-
! Service Parameter
! Description
|-
| 0xC - 0xF
| Delete Encdec Key
|-
| 0x10*
| Set ATA Key (index 1)
|-
| 0x11*
| Delete ATA Key (index 1)
|}


generate_new_lpar_mem_region_address(?, memory region size, log2(page size), ?, ?) - 002C82E8 (3.15)
=== 0x5003 - Get Random Number  ===


generate_new_lpar_mem_region_address - 002C6570 (3.41)
*I have got access to Get Random Number service through DM and tested it with PSGroove
*The service returns 192-bit random numbers
*It has no input parameters except those in SS packet header
*Storage Manager communicates with device '''/dev/encdec0'''.
*This service is used e.g. by USB Dongle Authenticator to generate the body of a challenge or by GameOS to generate hardware random numbers.


*The function returns a new LPAR memory region address.
=== 0x5004 - Authenticate BD Drive  ===
*This method is used e.g. in all HV calls which create any kind of memory regions, e.g. '''lv1_allocate_memory''', '''lv1_map_htab''', '''lv1_undocumented_function_114''', '''lv1_construct_logical_spe''', '''lv1_map_device_mmio_region''' or '''syscall 0x10040'''.


==== Encoding LPAR Memory Region Start Addresses and Sizes ====
*Used by LPAR Manager in HV Process 9 during LPAR 2 loading and unloading.
*Used by SLL Load GOS service (0x14004) in HV Process 3 during PS2EMU loading and by SLL Unload GOS service (0x14005) during PS2EMU unloading.
*The service expects one additional parameter.
*The service is used during loading of LPAR 2 to authenticate BD drive and during unloading LPAR 2 to reset BD drive.
*The service uses isolated SPU module '''sv_iso_spu_module.self''' for BD drive authentication.
*The service communicates with LPAR 1 device '''/dev/rbd0''' through ATAPI interface.


*Size of LPAR memory region is encoded in the LPAR memory region start address.
==== Service Parameter Table ====
*That is why e.g. the LPAR Memory Region Start Addresses of LPAR Memory Region of size 4096 byte begin with '''0x300000000000''', '''0x300000000000 >> 42 = 0xC = log2(4096)'''.
*Each LPAR has a counter (8 bytes) which is incremented by 1 every time a new LPAR Memory Region is created.
*Before incrementing, the counter is shifted left by '''log2(LPAR Memory Region Size)''' and ored with '''log2(LPAR Memory Region Size) << 42'''.


LPAR Memory Region Start Address >> 42 = log2(LPAR Memory Region Size)
{| class="wikitable FCK__ShowTableBorders"
 
|-
LPAR Memory Region Start Address = (log2(LPAR Memory Region Size) << 42) |
! Service Parameter
    (counter << log2(LPAR Memory Region Size))
! Description
|-
| 0x01
| (unknown)
|-
| 0x02
| Used by SLL service 0x14004 during PS2EMU loading
|-
| 0x1E
| Used by SLL service 0x14005 during PS2EMU unloading
|-
| 0x29
| Reset BD Drive
|-
| 0x46
| Authenticate BD Drive
|-
| 0x52
| Authenticate PS2 Disc Insert
|}


===== LPAR Memory Region Address Counter =====
=== 0x5005 - PS2 Disc Authenticate  ===


*LPAR Memory Region Address Counter is stored at address: '''0x38(LPAR ptr) + 0x9E8'''
=== 0x5006 - Get Version  ===
*LPAR1's Memory Region Address Counter is at address '''0x00677A48''' in HV dump 3.15
*LPAR2's Memory Region Address Counter is at address '''0x007632D8''' in HV dump 3.15
*LPAR1's Memory Region Address Counter is at address '''0x00677A48''' in HV dump 3.41
*LPAR2's Memory Region Address Counter is at address '''0x00161E68''' in HV dump 3.41


== Physical Memory Region class  ==
* By default not accessible from GameOS. But it can be enabled by patching Dispatcher Manager.


This type of memory region is created e.g. in '''lv1_allocate_memory''' HV call or in '''syscall 0x10000'''.
=== 0x5007 - Control BD Drive  ===


=== vtable  ===
*Used by GameOS to authenticate discs and for BD emulation.


0x00357D08 (3.15)
==== Service Parameter Table ====


=== Member variables  ===
{| class="wikitable FCK__ShowTableBorders"
|-
! Service Parameter
! Description
|-
| 0x0D
| -
|-
| 0x3F
| -
|-
| 0x41
| -
|-
| 0x43
| -
|-
| 0x46
| -
|-
| 0x4B
| media id?
|-
| 0x51
| -
|-
| 0x52
| -
|-
| 0x53
| PS3 Disc Insert
|-
| 0xA3
| BD emu
|-
| 0xA5
| BD emu
|-
| 0xA7
| BD emu
|-
| 0xAA
| BD emu
|}


offset 0xB0 - pointer to object that stores a list of addresses of physical pages owned by this memory region
=== 0x5008 - HW mc  ===


offset 0xB8 - pointer to LPAR object that owns this memory region
==== Service Parameter Table ====


offset 0xC0 - reference counter (8 bytes)
{| class="wikitable FCK__ShowTableBorders"
 
|-
=== Objects  ===
! Service Parameter
! Description
|-
| 0x01
|
|-
| 0x02
|
|-
|}


Here is the list of physical memory region objects i found in HV 3.15.
== 0x6000 - Update Manager  ==


{| class="wikitable FCK__ShowTableBorders"
{| class="wikitable FCK__ShowTableBorders"
|-
|-
! Address in HV dump
! Packet ID
! LPAR id
! Description
! LPAR Start Address
|-
! Size
| 0x6001
! Flags
| Update Package Tophalf
! log2(Page Size)
|-
! Physical Page Addresses
| 0x6002
| Inspect Package Tophalf
|-
| 0x6003
| Get Package Info
|-
|-
| 0x006B5510
| 0x6004
| 1
| Get Fix Instruction
| 0x300000001000
| 0x1000
| 0x0
| 0xC
| 0x672000
|-
|-
| 0x006B5E50
| 0x6005
| 1
| Extract Package Tophalf
| 0x440000040000
| 0x20000
| 0x0
| 0x11
| 0x6C0000
|-
|-
| 0x006B6980
| 0x6006
| 1
| Get Extract Package
| 0x440000060000
|-
| 0x20000
| 0x6007
| 0x0
| Check Integrity too
| 0x11
|-
| 0x6E0000
| 0x6008
| Check Integrity too
|-
| 0x6009
| Get Token Seed
|-
| 0x600A
| Set Token
|-
| 0x600B
| Read EPROM
|-
| 0x600C
| Write EPROM
|-
| 0x600D
| Get Status
|-
| 0x600E
| Allocate Buffer
|-
|-
| 0x006B7F00
| 0x600F
| 1
| Release Buffer
| 0x400000040000
| 0x10000
| 0x0
| 0x10
| 0x100000
|-
|-
| 0x003A80F0
| 0x6010
| 2
| Check Integrity
| 0x6C0058000000
| 0x7000000
| 0x4
| 0x18
| 0x1000000 - 0x7000000
|-
|-
| 0x003BE800
| 0x6011
| 2
| Get Applicable Version
| 0x300000047000
| 0x1000
| 0x0
| 0xC
| 0x1FA000
|-
|-
| 0x006BDAA0
| 0x6012
| 2
| (Re?)Allocate Buffer
| 0x0
| 0x8000000
| 0x8
| 0x1B (single huge page)  
| 0x8000000
|}
|}


So, Linux kernel should be located at physical address 0x8000000 and Linux syscall handler at 0x8000C00. Too bad that the HV dump is not large enough.  
*Update Manager service is accessed by GameOS '''syscall 863'''
 
=== 0x6001 - Update Package Tophalf  ===
 
*The result of the request can be checked by reading the value of repository node '''ss.update.request.&lt;Request ID&gt;''' periodically


=== GameOS Physical Memory Regions ===
=== 0x6002 - Inspect Package Tophalf ===


*GameOS allocates nearly all physical memory of PS3 for itself&nbsp;!!! That is why new HV calls '''lv1_allocate_memory''' with large memory region sizes will fail.  
*I have got access to this service through DM and tested it with PSGroove
*So when someone wants a large piece of physical memory, he can borrow it from GameOS's LPAR memory region that starts at '''0x700020000000'''. It can be used for example to send update packages to Update Manager which are very large.
*This service can tell you if a package can be installed or not, the service just checks a package but does not install it
*'''Packages can be updated without GameOS&nbsp;!!! I'm using only HV calls and communicate directly with Dispatcher Manager and Update Manager'''  
*I just sent a whole SCE package to GameOS through network, created a LPAR memory region and stored the file there
*It expects a SCE package that can be easily extracted from '''PUP file'''  
*The data of SCE package can be passed either in SS packet itself or through LPAR memory of requester
*When the data of SCE package is too large for SS packet (SS packets are sent through DM, GameOS and DM communicate through VUART that has only 0x800 bytes buffer) then the data of SCE package has to be passed through GameOS LPAR memory. The requester sends a vector of LPAR memory addresses where the data of SCE package is stored and Update Manager maps it into the address space of Process 6
*E.g. '''Revoke List''' packages can be sent in SS packets because they are small (about 0x200 bytes). All other packages are too big to sent them in SS packets
*The service is actually split into 2 halfs: '''Top-Half''' and '''Bottom-Half'''
*The '''Top-Half''' is executed synchronously with service request and it sends a reply to the requester
*In the reply sent by '''Top-Half''' a '''Request ID''' (8 bytes) is returned to the requester
*'''Request ID''' is calculated by using '''SHA-1'''
*After the '''Top-Half''' is done, a reply is sent to the requester but the service just checked some input parameter upto now and the passed SCE package was not really checked yet
*The '''Bottom-Half''' is called asynchronously to the request, it does the real job, it checks the passed SCE package.  
*The result of the request can be checked by reading the value of repository node '''ss.inspect.request.&lt;Request ID&gt;''' periodically
*I successfully tested this service with '''RL_FOR_PROGRAM.img''' from '''3.50 PUP file''' and the service returned '''Success''', so theoretically i could install this package on my PS3. But of course i want to downgrade and NOT to upgrade.


Here is the list of physical memory regions of GameOS i found in HV 3.41:
==== Inspect Package Tophalf Return Values  ====


{| class="wikitable FCK__ShowTableBorders"
{| class="wikitable FCK__ShowTableBorders"
|-
|-
! Start Address
! Error Code
! Size
! Description
! Access Right
|-
! Max Page Size
| 0x00000000
! Flags
| Success
! Real Addresses
|-
|-
| 0x0
| 0x00000013
| 0x1000000
| Same Version/Older Version
| 0x3
| 0x18
| 0x8
| 0x1000000 - 0x1FFF000
|-
|-
| 0x500000300000
| 0x00000014
| 0xA0000
| -
| 0x3
| 0x10
| 0x8
| 0x380000 - 0x38F000, 0x3B0000 - 0x3BF000, 0x1E0000 - 0x1FF000, 0x3C0000 - 0x3FF000, 0xFF00000 - 0xFF1F000
|-
| 0x700020000000
| 0xE900000 (huge memory region)
| 0x3
| 0x14
| 0x0
| 0x400000 - 0x5FF000, 0x800000 - 0xFFF000, 0x2000000 - 0xFEFF000
|}
|}


== HTAB Memory Region class ==
=== 0x6003 - Get Package Info ===


This memory region is created when a HTAB is mapped into LPAR's address space. It's created in '''lv1_map_htab''' HV call.
*I have got access to this service through DM and tested it with PSGroove
*The service expects one additional parameter: package type (valid values are 1-9)
*The service returns the version (8 bytes) of a package type installed


=== vtable  ===
Here are the versions of packages installed on my PS3:
 
0x00357C98 (3.15)
 
=== Member variables  ===
 
offset 0xB0 - pointer to VAS object that owns the HTAB
 
=== Objects  ===
 
Here is the list of HTAB memory region objects i found in HV 3.15.


{| class="wikitable FCK__ShowTableBorders"
{| class="wikitable FCK__ShowTableBorders"
|-
|-
! Address in HV dump
! Package Type
! LPAR id
! Returned Version
! VAS id
! Description
! LPAR Start Address
! Package Name in PUP File
! Size
|-
! Flags
| 1
! log2(Page Size)
| 0x0003004100000000
| Core OS Package
| CORE_OS_PACKAGE.pkg
|-
|-
| 0x001FE0F0
| 2  
| 2  
| 0x0003004100000000
| Revoke List Package for Program
| RL_FOR_PROGRAM.img
|-
| 3  
| 3  
| 0x500000C00000
| 0x0002003000000000
| 0x100000
| Revoke List Package for Package
| 0xC000000000000000
| RL_FOR_PACKAGE.img
| 0x14
|-
| 4
| 0xDEADBEAFFACEBABE
| -
| -
|-
|-
| 0x003BD850
| 5
| 2
| 0xDEADBEAFFACEBABE
| 3
| -
| 0x500004300000
| -
| 0x100000
| 0xC000000000000000
| 0x14
|-
|-
| 0x003BDEA0
| 6
| 2
| 0x0003004000000000
| 3
| BD Firmware Package
| 0x500004500000
| BDIT_FIRMWARE_PACKAGE.pkg, BDPT_FIRMWARE_PACKAGE_*.pkg
| 0x100000
|-
| 0xC000000000000000
| 7
| 0x14
| Invalid Parameter
|}
| Bluetooth Firmware, dev_flash tarballs
 
| BLUETOOTH_FIRMWARE.pkg, dev_flash, dev_flash3
=== GameOS HTAB ===
|-
| 8
| Invalid Parameter
| -
| -
|-
| 9
| Invalid Parameter
| SC Firmware Package
| SYS_CON_FIRMWARE_*.pkg
|}
 
==== Decrypting and Extracting Packages with spu_pkg_rvk_verifier.self ====
 
*I have managed to decrypt and extract '''Revoke List Packages 3.41 and 3.50''' by using SPE HV calls and '''spu_pkg_rvk_verifier.self'''
*Important: Parameters to SPU module shuold be aligned, i used cache line alignment, don't know exactly alignment requerements. Or else some very strange things could happen. E.g SYSCON firmware was only partially decrypted when i used no cache line alignment.
*I have also managed to decrypt and extract '''Core OS Packages 1.10, 1.18 Debug, 2.40, 2.80, 3.15, 3.41 and 3.50''' by using SPE HV calls and '''spu_pkg_rvk_verifier.self''' but it's compressed with '''zlib'''.Update Manager in Process 6 from 3.15 uses '''zlib 1.2.3 inflate''' to decompress it after it was decrypted and then it stores the data to flash memory.
*I decompressed the decrypted Core OS Packages with zlib.
*I am able now to decrypt and decompress all Core OS Packages
*'''The decrypted and decompressed package CORE_OS_PACKAGE.pkg looks exactly like it's stored on flash.'''
*I also decrypted BD Firmwares '''BDIT_FIRMWARE_PACKAGE.pkg''' and '''BDPT_FIRMWARE_PACKAGE.pkg''' successfully. The firmware is not compressed.
*I also decrypted Bluetooth Firmware '''BLUETOOTH_FIRMWARE.pkg''' successfully. The firmware is encrypted and compressed.
*I also managed to decrypt System Controller Firmware '''SYS_CON_FIRMWARE_01050101.pkg''' from 3.41.
*Core OS Package 3.50 contains a new isolated SPU module that is not contained in older versions. The SPU module is '''manu_info_spu_module.self'''.
*Here links to PS3 Firmwares: [http://forums.penhacks.net/Thread-ALL-PS3-Firmware-to-date] and [http://www.ps3-hacks.com/category/3]
 
===== RL_FOR_PROGRAM.img 3.41  =====
<pre>Offset      0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
 
00000200  00 00 00 04 00 00 00 01  00 03 00 41 00 00 00 00  ...........A....
00000210  00 00 00 06 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000220  00 00 00 03 00 00 00 01  00 03 00 41 00 00 00 00  ...........A....
00000230  00 00 00 00 00 00 00 02  FF FF FF FF FF FF FF FF  ........ÿÿÿÿÿÿÿÿ
00000240  00 00 00 04 00 00 00 01  00 03 00 41 00 00 00 00  ...........A....
00000250  10 70 00 05 FF 00 00 01  FF FF FF FF FF FF FF FF  .p..ÿ...ÿÿÿÿÿÿÿÿ
00000260  00 00 00 04 00 00 00 01  00 03 00 41 00 00 00 00  ...........A....
00000270  10 70 00 05 FE 00 00 01  FF FF FF FF FF FF FF FF  .p..þ...ÿÿÿÿÿÿÿÿ
00000280  00 00 00 04 00 00 00 01  00 03 00 41 00 00 00 00  ...........A....
00000290  10 70 00 05 FD 00 00 01  FF FF FF FF FF FF FF FF  .p..ý...ÿÿÿÿÿÿÿÿ
000002A0  00 00 00 04 00 00 00 01  00 03 00 41 00 00 00 00  ...........A....
000002B0  10 70 00 05 FC 00 00 01  FF FF FF FF FF FF FF FF  .p..ü...ÿÿÿÿÿÿÿÿ
000002C0  00 00 00 04 00 00 00 03  00 01 00 00 00 00 00 00  ................
000002D0  10 70 00 04 00 00 00 01  FF FF FF FF FF FF FF FF  .p......ÿÿÿÿÿÿÿÿ
</pre>
===== RL_FOR_PROGRAM.img 3.50  =====
<pre>Offset      0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
 
00000200  00 00 00 04 00 00 00 01  00 03 00 50 00 00 00 00  ...........P....
00000210  00 00 00 06 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000220  00 00 00 03 00 00 00 01  00 03 00 50 00 00 00 00  ...........P....
00000230  00 00 00 00 00 00 00 02  FF FF FF FF FF FF FF FF  ........ÿÿÿÿÿÿÿÿ
00000240  00 00 00 04 00 00 00 01  00 03 00 50 00 00 00 00  ...........P....
00000250  10 70 00 05 FF 00 00 01  FF FF FF FF FF FF FF FF  .p..ÿ...ÿÿÿÿÿÿÿÿ
00000260  00 00 00 04 00 00 00 01  00 03 00 50 00 00 00 00  ...........P....
00000270  10 70 00 05 FE 00 00 01  FF FF FF FF FF FF FF FF  .p..þ...ÿÿÿÿÿÿÿÿ
00000280  00 00 00 04 00 00 00 01  00 03 00 50 00 00 00 00  ...........P....
00000290  10 70 00 05 FD 00 00 01  FF FF FF FF FF FF FF FF  .p..ý...ÿÿÿÿÿÿÿÿ
000002A0  00 00 00 04 00 00 00 01  00 03 00 50 00 00 00 00  ...........P....
000002B0  10 70 00 05 FC 00 00 01  FF FF FF FF FF FF FF FF  .p..ü...ÿÿÿÿÿÿÿÿ
000002C0  00 00 00 04 00 00 00 03  00 01 00 00 00 00 00 00  ................
000002D0  10 70 00 04 00 00 00 01  FF FF FF FF FF FF FF FF  .p......ÿÿÿÿÿÿÿÿ
</pre>
===== RL_FOR_PACKAGE.img 3.41  =====
<pre>Offset      0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
 
00000200  00 00 00 03 00 00 00 02  00 01 00 00 00 00 00 00  ................
00000210  00 00 00 01 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000220  00 00 00 01 00 00 00 00  00 00 00 01 00 00 00 02  ................
00000230  00 00 00 08 00 05 00 00  00 00 00 00 00 00 00 00  ................
</pre>
===== RL_FOR_PACKAGE.img 3.50  =====
<pre>Offset      0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
 
00000200  00 00 00 03 00 00 00 02  00 01 00 00 00 00 00 00  ................
00000210  00 00 00 01 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000220  00 00 00 01 00 00 00 00  00 00 00 01 00 00 00 02  ................
00000230  00 00 00 08 00 05 00 00  00 00 00 00 00 00 00 00  ................
</pre>
===== CORE_OS_PACKAGE.pkg 3.15  =====
 
Here is a piece of data from decrypted and decompressed package.
<pre>Offset      0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F
 
00000000  00 00 00 01 00 00 00 17  00 00 00 00 00 6F FF E0  .............oÿà
00000010  00 00 00 00 00 00 04 60  00 00 00 00 00 04 00 00  .......`........
00000020  63 72 65 73 65 72 76 65  64 5F 30 00 00 00 00 00  creserved_0.....
00000030  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000040  00 00 00 00 00 04 04 60  00 00 00 00 00 00 00 08  .......`........
00000050  73 64 6B 5F 76 65 72 73  69 6F 6E 00 00 00 00 00  sdk_version.....
00000060  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000070  00 00 00 00 00 04 04 80  00 00 00 00 00 01 E5 CC  .......€......åÌ
00000080  6C 76 31 6C 64 72 00 00  00 00 00 00 00 00 00 00  lv1ldr..........
00000090  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
000000A0  00 00 00 00 00 05 EA 80  00 00 00 00 00 01 6D A0  ......ê€......m&nbsp;
000000B0  6C 76 32 6C 64 72 00 00  00 00 00 00 00 00 00 00  lv2ldr..........
000000C0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
000000D0  00 00 00 00 00 07 58 80  00 00 00 00 00 01 2E 44  ......X€.......D
000000E0  69 73 6F 6C 64 72 00 00  00 00 00 00 00 00 00 00  isoldr..........
000000F0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000100  00 00 00 00 00 08 87 00  00 00 00 00 00 01 DA E4  ......‡.......Úä
00000110  61 70 70 6C 64 72 00 00  00 00 00 00 00 00 00 00  appldr..........
00000120  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000130  00 00 00 00 00 0A 61 E4  00 00 00 00 00 00 FA CC  ......aä......úÌ
00000140  73 70 75 5F 70 6B 67 5F  72 76 6B 5F 76 65 72 69  spu_pkg_rvk_veri
00000150  66 69 65 72 2E 73 65 6C  66 00 00 00 00 00 00 00  fier.self.......
00000160  00 00 00 00 00 0B 5C B0  00 00 00 00 00 00 5C 94  ......\°......\”
00000170  73 70 75 5F 74 6F 6B 65  6E 5F 70 72 6F 63 65 73  spu_token_proces
00000180  73 6F 72 2E 73 65 6C 66  00 00 00 00 00 00 00 00  sor.self........
00000190  00 00 00 00 00 0B B9 44  00 00 00 00 00 00 65 D0  ......¹D......eÐ
000001A0  73 70 75 5F 75 74 6F 6B  65 6E 5F 70 72 6F 63 65  spu_utoken_proce
000001B0  73 73 6F 72 2E 73 65 6C  66 00 00 00 00 00 00 00  ssor.self.......
000001C0  00 00 00 00 00 0C 1F 14  00 00 00 00 00 01 53 2C  ..............S,
000001D0  73 63 5F 69 73 6F 2E 73  65 6C 66 00 00 00 00 00  sc_iso.self.....
000001E0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
000001F0  00 00 00 00 00 0D 72 40  00 00 00 00 00 00 44 98  [email protected]˜
00000200  61 69 6D 5F 73 70 75 5F  6D 6F 64 75 6C 65 2E 73  aim_spu_module.s
00000210  65 6C 66 00 00 00 00 00  00 00 00 00 00 00 00 00  elf.............
00000220  00 00 00 00 00 0D B6 D8  00 00 00 00 00 00 D7 F0  ......¶Ø......×ð
00000230  73 70 70 5F 76 65 72 69  66 69 65 72 2E 73 65 6C  spp_verifier.sel
00000240  66 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  f...............
00000250  00 00 00 00 00 0E 8E C8  00 00 00 00 00 00 80 8C  ......ŽÈ......€Œ
00000260  6D 63 5F 69 73 6F 5F 73  70 75 5F 6D 6F 64 75 6C  mc_iso_spu_modul
00000270  65 2E 73 65 6C 66 00 00  00 00 00 00 00 00 00 00  e.self..........
00000280  00 00 00 00 00 0F 0F 54  00 00 00 00 00 00 88 B8  .......T......ˆ¸
00000290  6D 65 5F 69 73 6F 5F 73  70 75 5F 6D 6F 64 75 6C  me_iso_spu_modul
000002A0  65 2E 73 65 6C 66 00 00  00 00 00 00 00 00 00 00  e.self..........
000002B0  00 00 00 00 00 0F 98 0C  00 00 00 00 00 00 C0 78  ......˜.......Àx
000002C0  73 76 5F 69 73 6F 5F 73  70 75 5F 6D 6F 64 75 6C  sv_iso_spu_modul
000002D0  65 2E 73 65 6C 66 00 00  00 00 00 00 00 00 00 00  e.self..........
000002E0  00 00 00 00 00 10 58 84  00 00 00 00 00 00 5D B0  ......X„......]°
000002F0  73 62 5F 69 73 6F 5F 73  70 75 5F 6D 6F 64 75 6C  sb_iso_spu_modul
00000300  65 2E 73 65 6C 66 00 00  00 00 00 00 00 00 00 00  e.self..........
00000310  00 00 00 00 00 10 B6 34  00 00 00 00 00 00 22 A0  ......¶4......"&nbsp;
00000320  64 65 66 61 75 6C 74 2E  73 70 70 00 00 00 00 00  default.spp.....
00000330  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000340  00 00 00 00 00 10 D9 00  00 00 00 00 00 12 B1 70  ......Ù.......±p
00000350  6C 76 31 2E 73 65 6C 66  00 00 00 00 00 00 00 00  lv1.self........
00000360  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000370  00 00 00 00 00 23 8A 80  00 00 00 00 00 03 E8 28  .....#Š€......è(
00000380  6C 76 30 00 00 00 00 00  00 00 00 00 00 00 00 00  lv0.............
00000390  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
000003A0  00 00 00 00 00 27 72 A8  00 00 00 00 00 16 EE B8  .....'r¨......î¸
000003B0  6C 76 32 5F 6B 65 72 6E  65 6C 2E 73 65 6C 66 00  lv2_kernel.self.
000003C0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
000003D0  00 00 00 00 00 3E 61 60  00 00 00 00 00 07 0F 94  .....&gt;a`.......”
000003E0  65 75 72 75 73 5F 66 77  2E 62 69 6E 00 00 00 00  eurus_fw.bin....
000003F0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000400  00 00 00 00 00 45 70 F4  00 00 00 00 00 07 FC 48  .....Epô......üH
00000410  65 6D 65 72 5F 69 6E 69  74 2E 73 65 6C 66 00 00  emer_init.self..
00000420  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000430  00 00 00 00 00 4D 6D 3C  00 00 00 00 00 06 16 00  .....Mm&lt;........
00000440  68 64 64 5F 63 6F 70 79  2E 73 65 6C 66 00 00 00  hdd_copy.self...
00000450  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
 
00040460  33 31 35 2E 30 30 30 0A  00 00 00 00 00 00 00 00  315.000.........
00040470  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
</pre>
===== BDIT_FIRMWARE_PACKAGE.pkg 3.50  =====
 
Here is a piece of data from decrypted package.
<pre>Offset      0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F


*HTAB of GameOS is already mapped into address space of GameOS so that is why HV call '''lv1_map_htab''' will fail until you unmap it with '''lv1_unmap_htab'''
00000300  43 6F 70 79 72 69 67 68  74 28 43 29 20 32 30 30  Copyright(C) 200
*Effective address of GameOS HTAB is '''0x800000000F000000'''
00000310  35 2D 32 30 30 36 2C 20  53 6F 6E 79 20 43 6F 6D  5-2006, Sony Com
*Virtual address of GameOS HTAB is '''0xF000000'''
00000320  70 75 74 65 72 20 45 6E  74 65 72 74 61 69 6E 6D  puter Entertainm
*Size of GameOS HTAB is '''0x40000'''
00000330  65 6E 74 20 49 6E 63 2E  1A 00 00 00 00 00 00 00  ent Inc.........
*GameOS HTAB supports large pages of size '''64K''' and '''1M'''
00000340  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
*GameOS HTAB can be easily dumped by reading 0x40000 bytes at EA 0x800000000F000000
00000350  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000360  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
00000370  41 96 18 D3 2D 8F 0F 68  11 4D A7 09 E4 1F A7 6F  A–.Ó-.h.M§.ä.§o
00000380  EF 29 48 A0 E9 F2 A8 F0  CC 4B F3 4D E0 4A B0 17  ï)H&nbsp;éò¨ðÌKóMàJ°.
00000390  C2 DA 07 5F 96 B3 C8 8D  E1 06 2E 3A 1D A7 FD 20  ÂÚ._–³Èá..:.§ý
</pre>
===== BDPT_FIRMWARE_PACKAGE_301R.pkg 3.50  =====


=== GameOS SLB ===
Here is a piece of data from decrypted package.
<pre>Offset      0 1  2  3  4  5  6  7  8  9  A  B  C  D  E  F


Here is the dump of SLB entries from GameOS 3.41:
00000300  43 6F 70 79 72 69 67 68 74 28 43 29 20 32 30 30  Copyright(C) 200
<pre>0x8000000008000000 0x0000000000000500
00000310  35 2D 32 30 30 39 2C 20 53 6F 6E 79 20 43 6F 6D  5-2009, Sony Com
0x8000000208000000 0x0000000000020500
00000320  70 75 74 65 72 20 45 6E 74 65 72 74 61 69 6E 6D  puter Entertainm
0x8000000300000000 0x0000000000030510
00000330  65 6E 74 20 49 6E 63 2E 1A 00 00 00 00 00 00 00  ent Inc.........
0x0000000000000000 0x0000000000000000
00000340  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x0000000080000000 0x0000000000038C00
00000350  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x00000000A0000000 0x000000000003AC00
00000360  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x00000000C0000000 0x000000000003CC00
00000370  80 18 D2 E4 22 AA 2B D7 85 47 F4 40 53 9A 04 0C  €.Òä"ª+×…Gô@Sš..
0x0000000000000000 0x0000000000000000
00000380  D0 B8 A5 04 20 51 9E 90 09 4F 2E 78 BA 32 C0 EA  и¥. Qž.O.xº2Àê
0x0000000000000000 0x0000000000000000
00000390  E9 61 96 ED D8 2A 70 C0 59 68 4E B2 47 25 9C 97  éa–íØ*pÀYhN²G%œ—
0x0000000000000000 0x0000000000000000
</pre>
0x0000000000000000  0x0000000000000000
===== BLUETOOTH_FIRMWARE.pkg 3.41 =====
0x0000000000000000 0x0000000000000000
<pre>Offset      0 1 2 3 4 5 6 7  8 9 A B C D E F
0x0000000000000000 0x0000000000000000
 
0x0000000000000000 0x0000000000000000
00000000  52 43 32 39 5F 66 69 72 6D 77 61 72 65 5F 66 6F  RC29_firmware_fo
0x0000000000000000 0x0000000000000000
00000010  6F 74 65 72 2E 64 66 75 00 00 00 00 00 00 00 00  oter.dfu........
0x0000000000000000 0x0000000000000000
00000020  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x0000000000000000 0x0000000000000000
00000030  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x0000000000000000 0x0000000000000000
00000040  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x0000000000000000 0x0000000000000000
00000050  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x0000000000000000 0x0000000000000000
00000060  00 00 00 00 30 30 30 30 36 34 34 00 30 30 30 30  ....0000644.0000
0x0000000000000000 0x0000000000000000
00000070  30 30 30 00 30 30 30 30 30 30 30 00 30 30 30 30  000.0000000.0000
0x0000000000000000 0x0000000000000000
00000080  31 35 36 36 33 30 30 00 31 31 30 36 34 33 34 36  1566300.11064346
0x0000000000000000 0x0000000000000000
00000090  33 30 36 00 30 31 35 34 36 33 00 20 30 00 00 00  306.015463. 0...
0x0000000000000000 0x0000000000000000
000000A0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x0000000000000000 0x0000000000000000
000000B0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x0000000000000000 0x0000000000000000
000000C0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x0000000000000000  0x0000000000000000
000000D0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x0000000000000000 0x0000000000000000
000000E0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x0000000000000000 0x0000000000000000
000000F0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x0000000000000000 0x0000000000000000
00000100  00 75 73 74 61 72 20 20 00 72 6F 6F 74 00 00 00  .ustar .root...
0x0000000000000000 0x0000000000000000
00000110  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x0000000000000000 0x0000000000000000
00000120  00 00 00 00 00 00 00 00 00 72 6F 6F 74 00 00 00  .........root...
0x8000000010057960 0x8000000000313E78
00000130  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
0x8000000010057940 0x0000000000000000
00000140  00 00 00 00 00 00 00 00 00 30 30 30 30 30 30 30  .........0000000
0x800000000001B698 0x0000000000000000
00000150  00 30 30 30 30 30 30 30 00 00 00 00 00 00 00 00  .0000000........
0x8000000010057930 0x8000000000490708
0x80000000002B6C68 0x80000000003DE928
0x8000000010057EC0 0x80000000003DE920
0x0000000000000000 0x8000000000309810
0x80000000004B3000 0x0000000000000000
0x8000000010057CC0 0x0000000000000000
0x80000000004AF000 0x80000000004E1F00
0x80000000100579C8 0x80000000100579C0
0x80000000100579E0 0x2400002200000000
0x80000000004CF5B0 0x8000000200012000
0x80000000100579F8 0x80000000100579F0
0x8000000010057A10 0x80000000004A3A00
0x80000000004CF5B0 0x80000000004C8D00
0x800000000001BF6C 0x80000000004CD400
0x800000000001B698 0x80000000004C8100
0x80000000100579D0  0x80000000004B48C0
0x0000000000001C08  0x0000000000000000
0x8000000010057A78  0x8000000010057A70
0x8000000010057A90  0x0000000000000000
0x80000000004CF90C  0x0000000000000000
0x0000000000000000  0x8000000010057A80
0x8000000010057A90  0x8000000000309810
0x80000000004CF62C  0x0000000000000000
0x8000000010057CC0  0x0000000000000000
0x80000000004AF000  0x80000000004B48C0
0x00004000001C0000  0x0000000000000001
0x00000000D0000000  0x0000A8E3EE7D10DA
0x0000000000000000  0x0000000000000000
0x80000000004D8088  0x80000000004D9000
</pre>
== SPE MMIO Memory Region class  ==


This type of memory region represents MMIO memory region of a SPE. It's created e.g. in '''lv1_construct_logical_spe''' or in '''syscall 0x10040'''.


=== vtable ===
000A5950  84 1B 00 C0 94 04 00 00 74 06 00 00 45 75 72 75  „..À”...t...Euru
000A5960  73 5F 50 72 69 6D 61 72  79 5F 50 68 79 00 00 00  s_Primary_Phy...
000A5970  4D 61 72 76 65 6C 6C 5F  41 50 00 00 94 BB 01 C0  Marvell_AP..”».À


0x003583F8 (3.15)


=== Member variables ===
000B7CC0  00 00 00 00 01 10 60 23 4D 61 72 76 65 6C 6C 20  ......`#Marvell
000B7CD0  46 69 72 6D 77 61 72 65  20 53 44 4B 20 56 65 72  Firmware SDK Ver
000B7CE0  73 69 6F 6E 20 32 2E 33  2E 30 54 74 5D 04 02 2B  sion 2.3.0Tt]..+
000B7CF0  0F 14 E1 36 04 32 0A 1A  FD 08 32 1A 1A C1 08 02  ..á6.2..ý.2..Á..


=== Objects  ===


Here is the list of SPE memory region objects i found in HV 3.15.
000F42B0  44 6F 53 68 61 72 65 64  4B 65 79 53 65 71 31 3A  DoSharedKeySeq1:
000F42C0  20 45 6E 74 65 72 65 64  20 2D 2D 2D 20 72 73 70    Entered --- rsp
000F42D0  4D 61 63 20 3D 20 25 30  32 78 3A 25 30 32 78 3A  Mac =&nbsp;%02x:%02x:
000F42E0  25 30 32 78 3A 25 30 32  78 3A 25 30 32 78 3A 25  &nbsp;%02x:%02x:%02x:%
000F42F0  30 32 78 0A 00 00 00 00  6D 6C 6D 65 41 75 74 68  02x.....mlmeAuth
000F4300  44 6F 53 68 61 72 65 64  4B 65 79 53 65 71 31 3A  DoSharedKeySeq1:
000F4310  20 56 61 6C 69 64 61 74  69 6F 6E 20 66 61 69 6C    Validation fail
000F4320  65 64 20 2D 2D 2D 20 72  73 70 4D 61 63 20 3D 20  ed --- rspMac =
000F4330  25 30 32 78 3A 25 30 32  78 3A 25 30 32 78 0A 00  &nbsp;%02x:%02x:%02x..
000F4340  6D 6C 6D 65 41 75 74 68  44 6F 53 68 61 72 65 64  mlmeAuthDoShared
000F4350  4B 65 79 53 65 71 33 3A  20 76 61 6C 69 64 61 74  KeySeq3: validat
000F4360  69 6F 6E 20 66 61 69 6C  65 64 21 20 2D 2D 2D 20  ion failed! ---
000F4370  72 73 70 4D 61 63 20 3D  20 25 30 32 78 3A 25 30  rspMac =&nbsp;%02x:%0
000F4380  32 78 3A 25 30 32 78 0A  00 65 65 70 72 6F 6D 00  2x:%02x..eeprom.
000F4390  62 74 5F 68 63 69 00 62  74 5F 75 61 72 74 00 75  bt_hci.bt_uart.u
000F43A0  73 62 30 00 75 73 62 31  00 4F 53 41 00 77 6C 61  sb0.usb1.OSA.wla
000F43B0  F3 B8 E9 70 01 00 00 00  1C 6B 03 00 00 02 00 00  ó¸ép.....k......
</pre>
===== SYS_CON_FIRMWARE_01050101.pkg 3.41  =====
<pre>Offset      0  1  2  3  4  5  6  7  8  9  A  B  C  D  E  F


{| class="wikitable FCK__ShowTableBorders"
00000300  1B 2D 70 0F AB 5E B3 99  68 20 FE 3D E1 80 6A 1D  .-p.«^³™h þ=á€j.
|-
00000310  B8 FD 37 CF CD 45 85 AB  51 F7 05 E3 EA 32 A5 EA  ¸ý7ÏÍE…«Q÷.ãê2¥ê
! Address in HV dump
00000320  67 45 F9 48 00 00 00 00  00 10 00 00 C0 0F 00 00  gEùH........À...
! LPAR id
00000330  8B 04 07 F9 9B A2 90 3A  75 89 F1 42 12 59 DA 0D  ‹..ù›¢:u‰ñB.YÚ.
! SPE
00000340  21 7C A2 C3 5A E4 78 00  10 8D 4B F7 A2 73 9C 63  &nbsp;!|¢ÃZäx..K÷¢sœc
! LPAR Start Address
00000350  5D 8D 5D 49 16 C7 6F 2C  AD 33 FE 1F D3 6C A1 CA  ]]I.Ço,­3þ.Ól¡Ê
! Size
00000360  BA AD 2B FE 8F 33 71 D7  C5 E6 5C FF BF 77 6C 80  º­+þ3q×Åæ\ÿ¿wl€
! Physical Address
00000370  F2 BE 11 BB 3C 52 52 DC  A9 68 E5 24 AD 4F F3 48  ò¾.»&lt;RRÜ©hå$­OóH
! Flags
</pre>
! log2(Page Size)
=== 0x6005 - Extract Package Tophalf  ===
 
*The result of the request can be checked by reading the value of repository node '''ss.extract.request.&lt;Request ID&gt;''' periodically
 
=== 0x600B - Read EEPROM  ===
 
*I have got read access to EEPROM of Update Manager through DM and tested it with PSGroove
*I read PRODUCT_MODE from it successfully, PRODUCT_MODE = 0x000000FF
*The service expects one additional parameter: offset (4 bytes)
*The service accepts only some predefined offsets
*The service returns the specified offset and the value at this offset
 
==== EEPROM Offset Table  ====
 
Here is the table of EEPROM offsets that can be accessed through Update Manager (3.15):
 
[[SC_EEPROM#EEPROM_Offset_Table_-_Flags_and_Tokens| --> EEPROM Offset Table]]
 
=== 0x600C - Write EEPROM  ===
 
*Writting to EEPROM of Update Manager is also possible through DM
*Tested this service successfully with QA flag
 
=== 0x6010 - Check Integrity  ===
 
*This service checks integrity of important files stored on '''/dev/rflash1''', e.g. '''lv0''' or '''lv1'''
*The service is used e.g. by System Manager
*When '''product mode''' is NOT '''0xFF''' then check is skipped&nbsp;!!!
** This check is patched to always skip, with 'nocheck' downgrader patches
 
=== 0x6011 - Get Applicable Version  ===
 
*I have got access to this service through DM and PSGroove and tested it
*The service expects one additional unknown parameter of size 4 bytes, it has to be 0x00000001 or else the service fails<br> (sc863(0x6011,1,out:uint64_t,0,0,0,0,0))
 
Here is the return value:
<pre>00 00 00 01 00 00 00 00 00 03 00 20 00 00 00 00 00 00 00 00 00 00 00 01
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01
</pre>
 
=== BD Firmware Update  ===
 
*Update Manager in HV Process 6 updates BD firmware through '''ATAPI Interface''' of '''/dev/rbd0''' device.
*BD firmware is sent to BD drive by using '''ATAPI Write Buffer (0x3B)''' command with '''Mode 0x07 (Download microcode with offsets and save)''' and '''Buffer ID 0x00'''.
*The current BD drive firmware version and hash is also stored by and retrieved from SYSCON by using '''SC Manager Get/Set Region Data (0x9006/0x9007)''' service. After successfull BD firmware update, Update Manager sends the new firmware version and hash to SYSCON.
*BD firmware package is decrypted, SCE header size + 0x80 bytes are skipped and data beginning with copyright message is sent to BD drive.
*BD firmware is sent packet wise, one packet is at most 0x8000 bytes.
*After each sent packet, Update Manager checks the result by using '''ATAPI Request Sense (0x3)''' command.
*Theoretically, BD firmware update can be done also from GameOS by using ATAPI interface of the BD drive.
 
==== Detecting BD Drive Type, Generation and Revision  ====
 
*To detect BD drive type, Update Manager uses '''ATAPI Inquiry''' command.
*To detect BD drive generation, Update Manager uses '''ATAPI Mode Sense 10''' command.
 
===== BD Drive Type Table  =====
 
Here is the BD Drive Type Table extracted from HV Process 6 (3.15):
 
{| class="wikitable FCK__ShowTableBorders"
|-
! Index
! Vendor Identification String
! Drive Type
|-
| 0
| <pre>"SONY    EmerFlashROM"</pre>
| 0x2100000000000001
|-
|-
| 0x003ABC20
| 2
| 1  
| 1  
| 0x4C0000880000
| <pre>"SONY    PS-EMBOOT  300R"</pre>
| 0x80000
| 0x2100000000000001
| 0x20000080000
| 0xA000000000000000
| 0xC
|-
|-
| 0x003AAD70
| 2
| 2  
| 2  
| 0x4C0000980000
| <pre>"SONY    BDRW AQUAM(BDIT)"</pre>
| 0x80000
| 0x1100000000000001
| 0x20000100000
| 0xA000000000000000
| 0xC
|-
|-
| 0x003A8880
| 2
| 3  
| 3  
| 0x4C0000780000
| <pre>"SONY    PS-SYSTEM  300R"</pre>
| 0x80000
| 0x1100000000000001
| 0x20000180000
| 0xA000000000000000
| 0xC
|-
|-
| 0x003B4F70
| 2
| 4  
| 4  
| 0x4C0000A80000
| <pre>"SONY    PS-SYSTEM  V300"</pre>
| 0x80000
| 0x1100000000000001
| 0x20000200000
| 0xA000000000000000
| 0xC
|-
|-
| 0x003AB700
| 2
| 5  
| 5  
| 0x4C0000680000
| <pre>"SCEI    EMER-FLASH-8"</pre>
| 0x80000
| 0x2200000000000002
| 0x20000280000
|-
| 0xA000000000000000
| 6
| 0xC
| <pre>"SONY    PS-EMBOOT  301R"</pre>
| 0x2200000000000002
|-
| 7
| <pre>"SONY    PS-SYSTEM  301R"</pre>
| 0x1200000000000002
|-
| 8
| <pre>"SONY    PS-EMBOOT  302R"</pre>
| 0x2200000000000003
|-
| 9
| <pre>"SONY    PS-SYSTEM  302R"</pre>
| 0x1200000000000003
|-
| 10
| <pre>"SONY    PS-EMBOOT  303R"</pre>
| 0x2200000000000004
|-
| 11
| <pre>"SONY    PS-SYSTEM  303R"</pre>
| 0x1200000000000004
|-
| 12
| <pre>"SONY    PS-EMBOOT  304R"</pre>
| 0x2200000000000005
|-
| 13
| <pre>"SONY    PS-SYSTEM  304R"</pre>
| 0x1200000000000005
|-
| 14
| <pre>"SONY    PS-EMBOOT  306R"</pre>
| 0x2200000000000007
|-
|-
| 0x003B5BE0
| 15
| 2
| <pre>"SONY    PS-SYSTEM  306R"</pre>
| 6
| 0x1200000000000007
| 0x4C0000B80000
| 0x80000
| 0x20000300000
| 0xA000000000000000
| 0xC
|}
|}


== SPE Shadow Registers Memory Region class ==
==== Methods (HV Process 6) ====
 
update_manager_update_bd_firmware - 0x800064BC (3.15)
 
bd_updater_prepare_drive - 0x80011A88 (3.15)
 
bd_updater_send_firmware - 0x80011544 (3.15)


This type of memory region represents shadow registers memory region of a SPE. It's created e.g. in '''lv1_construct_logical_spe''' or in '''syscall 0x10040'''.  
bd_updater_disable_reqsense - 0x80010410 (3.15)


=== vtable  ===
bd_updater_enable_reqsense - 0x800104D8 (3.15)


0x00358448 (3.15)  
send_atp_command - 0x80023B10 (3.15)


=== Objects ===
== 0x9000 - SC Manager ==


Here is the list of SPE Shadow Registers memory region objects i found in HV 3.15.  
*SC Manager cannot be accessed directly by using DM unfortunately (DM discards all requests) but it's used by other services that are accessable through DM
*E.g. Update Manager services "Read EEPROM" and "Write EEPROM" send requests to SC Manager services "Read EEPROM" and "Write EEPROM"
*SC Manager runs '''sc_iso.self'''
* With full HV rights you could patch Dispatcher Manager and enable access to SC Manager from GameOS.


{| class="wikitable FCK__ShowTableBorders"
{| class="wikitable FCK__ShowTableBorders"
|-
|-
! Address in HV dump
! Packet ID
! LPAR id
! Description
! SPE
! LPAR Start Address
! Size
! Physical Address
! Flags
! log2(Page Size)
|-
|-
| 0x003ABDA0
| 0x9001
| 2
| Get SRH
| 1
| 0x300000012000
| 0x1000
| -
| 0xA000000000000000
| 0xC
|-
|-
| 0x003B4290
| 0x9002
| 2
| Set SRH
| 2
| 0x300000014000
| 0x1000
| -
| 0xA000000000000000
| 0xC
|-
|-
| 0x003A8A00
| 0x9003
| 2
| Encrypt
| 3
|-
| 0x300000010000
| 0x9004
| 0x1000
| Decrypt
| -  
|-
| 0xA000000000000000
| 0x9005
| 0xC
| Init For VTRM
|-
| 0x9006
| Get Region Data
|-
| 0x9007
| Set Region Data
|-
| 0x9008
| Set RTC
|-
| 0x9009
| Get Time
|-
| 0x900A
| Set Time
|-
| 0x900B
| Read EPROM
|-
| 0x900C
| Write EPROM
|-
| 0x900D
| Init For Updater
|-
| 0x900E
| Get SC Status
|-
| 0x9011
| SC Binary Patch
|-
| 0x9012
| SC RTC Factory
|-
| 0x9013
| Correct RTC Factory
|-
|-
| 0x003B50F0
| 0x9014
| 2
| Set SC Status
| 4
| 0x300000016000
| 0x1000
| -
| 0xA000000000000000
| 0xC
|-
|-
| 0x001FFC90
| 0x9015
| 2
| Backup Root Info
| 5
| 0x30000000E000
| 0x1000
| -
| 0xA000000000000000
| 0xC
|-
|-
| 0x003AE5B0
| 0x9016
| 2
| Restore Root Info
| 6
| 0x300000018000
| 0x1000
| -
| 0xA000000000000000
| 0xC
|}
|}


== Device MMIO Memory Region class ==
=== 0x9001 - SC Get SRH ===
 
<pre>
struct ss_sc_mgr_get_srh
{
    u8 field0[20];
    u8 res1[4];
    u8 field18[20];
    u8 res2[4];
};
</pre>


This type of memory region is created when a device MMIO region is mapped into LPAR address space, e.g. in '''lv1_map_device_mmio_region'''.
=== 0x9003 - SC Encrypt  ===


=== vtable  ===
*There are 5 different types/kinds of encryption: 1 - 5.


0x00352468 (3.15)
<pre>
struct ss_sc_mgr_encrypt
{
    u32 type;              /* 1 - 5 */
    u8 res[4];
    u8 field8[16];
    u8 field18[16];
    u64 field28;
};
</pre>


=== Member variables ===
=== 0x9004 - SC Decrypt ===


offset 0xA8 - physical address where the device MMIO region is mapped to
*There are 5 different types/kinds of decryption: 1 - 5.
*'''Virtual TRM Decrypt Master (0x200E)''' service uses e.g. decryption type 4.


=== Objects ===
=== 0x9006 - SC Get Region Data ===


Here is the list of Device MMIO memory region objects i found in HV 3.15.  
*This service expects an ID. The valid range of ID is 0 - 15.
*E.g. Update Manager uses this service to retrieve hash and version of some SELFs and firmwares, e.g. '''lv0''' and '''lv1'''.


{| class="wikitable FCK__ShowTableBorders"
<pre>
struct ss_sc_mgr_get_region_data
{
    u64 id;
    u64 data_size;    /* max 0x30 bytes */
    u8 data[0];
};
</pre>
 
==== Update Package Type - ID Mapping Table ====
 
{| class="wikitable FCK__ShowTableBorders"
|-
! Update Package Type
! ID
|-
| 1
| 0
|-
|-
! Address in HV dump
| 2
! LPAR id
| 2
! LPAR Start Address
! Size
! Flags
! log2(Page Size)
! Physical Address
! Device
|-
|-
| 0x001FDF00
| 3
| 2
| 4
| 0x4000001D0000
| 0x10000
| 0x8000000000000000
| 0xC
| 0x24003010000
| USB controller
|-
|-
| 0x003B3850
| 4
| 2
| 6
| 0x400000200000
| 0x10000
| 0x8000000000000000
| 0xC
| 0x24003020000
| USB controller
|-
|-
| 0x003B6E50
| 5
| 2
| 7
| 0x4000001E0000
| 0x10000
| 0x8000000000000000
| 0xC
| 0x24003810000
| USB controller
|-
|-
| 0x003B9950
| 6
| 2
| 8
| 0x4000001F0000
| 0x10000
| 0x8000000000000000
| 0xC
| 0x24003820000
| USB controller
|}
|}


== GPU Device Memory Region class ==
=== 0x9007 - SC Set Region Data ===


This type of memory region is created e.g. in '''lv1_gpu_open''', '''lv1_gpu_device_map''' and '''lv1_undocumented_function_114'''.  
*This service expects an ID. The valid range of ID is 0 - 15.
*E.g. Update Manager uses this service to store hash and version of some SELFs and firmwares, e.g. '''lv0''' and '''lv1'''.


=== vtable  ===
<pre>
struct ss_sc_mgr_set_region_data
{
    u64 id;
    u64 data_size;    /* max 0x30 bytes */
    u8 data[0];
};
</pre>


0x00357C48 (3.15)
=== 0x900B - SC Read EPROM  ===


=== Member variables  ===
* There are 2 ways to access SC EPROM: '''NVS Service''' and '''Device Access Service'''.
* '''NVS Service''' uses '''Block ID''' and '''Block Offset'''.
* Not all EPROM offsets can be accessed through SC Manager.


offset 0xA8 - physical address
<pre>
struct ss_sc_mgr_read_eprom
{
    u32 offset;
    u8 res1[4];
    u32 nread;              /* max 0x100 bytes */
    u8 res2[4];
    u64 buf_size;
    u8 buf[0];
    /* here follows buf */
};
</pre>


=== Objects  ===
==== EPROM Offset - Block ID and Block Offset Mapping Table (NVS Service) ====
 
Here is the list of Device GPU memory region objects i found in HV 3.15.


{| class="wikitable FCK__ShowTableBorders"
{| class="wikitable FCK__ShowTableBorders"
|-
|-
! Address in HV dump
! EPROM Offset
! LPAR id
! Block ID
! LPAR Start Address
! Block Offset
! Size
! Notes
! Flags
|-
! log2(Page Size)
| 0x48000 - 0x480FF
! Physical Address
| 0x00
| 0x48000 - 0x480FF
|
|-
| 0x48800 - 0x488FF
| 0x01
| 0x48800 - 0x488FF
|
|-
|-
| 0x003AF380
| 0x48C00 - 0x48CFF
| 2
| 0x02
| 0x700190000000
| 0x48C00 - 0x48CFF
| 0xFE00000
|
| 0x8000000000000000
| 0x14
| 0x28080000000
|-
|-
| 0x003AF500
| 0x48D00 - 0x48DFF
| 2
| 0x03
| 0x4000001A0000
| 0x48D00 - 0x48DFF
| 0xC000
|
| 0x8000000000000000
| 0xC
| 0x3C0000
|-
|-
| 0x003AF680
| 0x2F00 - 0x2FFF
| 2
| 0x10
| 0x4800006C0000
| 0x2F00 - 0x2FFF
| 0x40000
| "Industry Area" aka OS Version Area
| 0x8000000000000000
| 0xC
| 0x2808FE00000
|-
|-
| 0x003AFC30
| 0x3000 - 0x30FF
| 2
| 0x20
| 0x440000380000
| 0x3000 - 0x30FF
| 0x20000
| "CS Area"
| 0x8000000000000000
| 0xC
| 0x28000C00000
|-
|-
| 0x003BB420
| All other offsets
| 2
| Invalid
| 0x3C0000108000
| Invalid
| 0x8000
| 0x8000000000000000
| 0xC
| 0x28000080100
|}
|}


== Direct Map Memory Region class ==
=== 0x900C - SC Write EPROM  ===


This type of memory region is created in HV call '''lv1_undocumented_function_114'''.
<pre>
'''lv1_undocumented_function_114''' allows you to map any memory address into LPAR's memory address.
struct ss_sc_mgr_write_eprom
{
    u32 offset;
    u8 res1[4];
    u32 nwrite;
    u8 res2[4];
    u64 buf_size;
    u8 buf[0];
    /* here follows buf */
};
</pre>


* The HV call '''lv1_undocumented_function_115''' destroys a memory region of this type.
=== 0x900E - SC Get Status ===
* HV allows GameOS to create objects of this type of size 0 only !!! But it can be exploited with a dangling HTAB entry.


=== vtable  ===
Here is what the service returned on my fat PS3:
<pre>
0x00 0x00 0x00 0x03 0x00 0x00 0x00 0x00 0xC0 0x00 0x00 0xFF 0x00 0x00 0x00 0x00
</pre>


0x00357C48 (3.15)
So, '''version''' is '''0x00000003''' and '''mode''' is '''0xC00000FF'''.


=== Member variables  ===
<pre>
struct ss_sc_mgr_get_sc_status
{
    u32 version;
    u8 res1[4];
    u32 mode;
    u8 res2[4];
};
</pre>


offset 0xA8 - physical address
=== 0x9011 - SC Binary Patch  ===


=== Exploiting HV with memory glitching and HV call lv1_undocumented_function_114 ===
*This service is used by Update Manager to send a new SC firmware version to SYSCON.


Here is a short description of the method i used to exploit HV from GameOS 3.15 and 3.41.
==== SC Isolation DMA Buffer Header  ====
<pre>struct sc_iso_header
{
    u32 seqno;
    u32 mbmsg;
    u32 cmd;
    u32 cmd_size;
    u8 cmd_data[0];
};
</pre>


* First i used the Geohot's method to create a dangling HTAB entry.
== 0x11000 - SPM (Security Policy Manager) ==
* Making memory glitch work on GameOS was the largest of my obstacles but i solved it and i'm able to create a dangling HTAB entry from GameOS within 1-3 minutes.
* Then i created many '''Direct Map Memory Region''' objects of size 0 with HV call '''lv1_undocumented_function_114''' and checked if they are within the page to which the dangling HTAB entry points to.
* When i found one such '''Direct Map Memory Region''' object i patched the size of this object to 0x1000. Then i pointed this memory region object to the code of HV call '''lv1_undocumented_function_114''' and patched 4 bytes in this HV call which allows me to create any '''Direct Map Memory Region''' objects without any restrictions.
* Function '''LPAR_construct_direct_mapping_mem_region''' which is used by HV call '''lv1_undocumented_function_114''' has a parameter (register %r9) and when this parameter is not 0 then HV will allow you to create any '''Direct Map Memory Region''' objects without restrictions, but unfortunately the HV call '''lv1_undocumented_function_114''' passes 0 in this parameter, so i just patched it.
* Then i mapped whole HV memory range with the patched HV call '''lv1_undocumented_function_114''' into the address space of GameOS.
* And now you have read/write access to the whole HV.
* $ONY could fix this exploit by disallowing creating of '''Direct Map Memory Region''' objects of size 0, but i know tons of other HV C++ classes which will allow me to exploit the HV in a similar way, so it wouldn't bring $ONY anything :-) And they have to change member variable offsets in those objects to make sure that i cannot patch them easily :-)


== Methods  ==
*Packet ID is mapped to '''SS id'''
*SS id value range is 0x0 - 0x84


LPAR_get_memory_region_by_start_address - 0x002C7C40 (3.15)
{| class="wikitable FCK__ShowTableBorders"
|-
! Packet ID
! Description
|-
| 0x11001
| Request
|-
| 0x11002
| Load Additional Policy
|}


LPAR_get_memory_region_by_address - 0x002C7DA8 (3.15)  
== 0x14000 - SLL (Secure LPAR Loader) ==


LPAR_mem_addr_to_phys_addr(LPAR id, LPAR address, phys_addr) - 0x002FB8F0 (3.15)
*SLL opens '''lv2_kernel.self''', parses ELF header and determines the size of initial memory region for GameOS LPAR
*SLL creates a memory region for GameOS LPAR by using '''syscall 0x10000'''.
*SLL opens '''/proc/partitions/&lt;LPAR id&gt;/mem''' file and maps it with mmap syscall into it's address space.
*Then it authenticates, decrypts and copies the SELF file of GameOS to LPAR's memory region by using '''SPE syscalls 0x10040 and 0x10042'''.
*Linux is not loaded by SLL, it's loaded in Process 9 by Linux System Manager
*GameOS file image '''lv2_kernel.self''' is stored on '''/dev/rflash1'''


LPAR_construct_direct_mapping_mem_region - 0x002D4D04 (3.15)
{| class="wikitable FCK__ShowTableBorders"
|-
! Packet ID
! Description
|-
| 0x14004
| Load GOS
|-
| 0x14005
| Unload GOS
|}


= Network Devices =
== 0x15000 - SPL (Secure Profile Loader) ==


== Ethernet Gelic Device  ==
*DEFAULT.SPP file is stored on '''/dev/rflash1'''


device id = 0
{| class="wikitable FCK__ShowTableBorders"
|-
! Packet ID
! Description
|-
| 0x15001
| Get LPAR Parameter Size/Get LPAR Parameter
|-
| 0x15003
| Get Contents Size/Get Contents
|-
| 0x15009
| Get Component
|}


MAC Address: 00:1F:A7:C6:2A:C5
=== SPP File  ===


device memory base address = 0x24003004000 (size = 0x1000)  
*The file is encrypted but can be read by using 0x15003 service of SPL
*SPL reads SPP file, parses SPP header and checks some fields
*SPP file is verified and decrypted by SPU module '''spp_verifier.self''' that cab be executed with HV SPE calls
*Even old default.spp from PS3 Firmware 1.10 can be decrypted with spp_verifier.self from PS3 Firmware 3.41
*Header format version should be '''5''' or else the header check fails
*If (SPP header size&nbsp;% 256&nbsp;!= 0) then header check fails
*'''Finally i was able to decrypt profile file from 3.41 but by using SPE HV calls only&nbsp;!!! And Linux Manager is still there&nbsp;!!!'''
*The decrypted file is a binary file


== WLAN Gelic Device  ==
Here are the contents of [[Default.spp#3.56_RETAIL.2FCEX]] from 3.55. <br />
Here are the contents of [[Default.spp#3.55_RETAIL.2FCEX]] from 3.55. <br />
Here are the contents of [[Default.spp#3.41_RETAIL.2FCEX]] from 3.41. <br />
Here are the contents of [[Default.spp#3.15_RETAIL.2FCEX]] from 3.15. <br />
Here are the contents of [[Default.spp#1.00_DEBUG.2FDEX]] from 1.00 Debug Firmware. <br />


device id = 0
==== SPP Header  ====


MAC Address: 02:1F:A7:C6:2A:C5 (locally administered)  
offset 0x2 - header format version (2 bytes)  


=== Net Manager  ===
offset 0x4 - header size (4 bytes)


*Net Manager runs in Process 9
offset 0x18 - number of segments (4 bytes)
*It sends commands to '''/dev/sc1''' to reset WLAN Gelic device
*It opens '''/dev/net0''', sets MAC address and writes device firmware '''eurus_fw.bin''' to WLAN device by using '''ioctl''' syscall


=== /dev/net0 ===
==== Segments ====


The device supports 3 ioctl commands:
*Segments follow after the header
*SPP file contains several segments.


*0 - 0x002AC10C (3.15)
Here is the list of profile segments from 3.41:
*1 - 0x002AC250 (3.15)
*2 - EURUS_STAT 0x002AC320 (3.15)


=== Methods  ===
{| class="wikitable FCK__ShowTableBorders"
|-
! Name
! auth id/authority id
|-
|*SCE_CELLOS_PME               
|0x1070000001000001
|-
|*PS3_LPAR                     
|0x1070000002000001
|-
|*PS2_LPAR                     
|0x1020000003000001
|-
|*PS2_GX_LPAR                   
|0x1020000003000001
|-
|*PS2_SW_LPAR                   
|0x1020000003000001
|-
|*LINUX_LPAR                   
|0x1080000004000001
|-
|*SCE_CELLOS_SYSTEM_MGR         
|0x107000001D000001
|-
|*SCE_CELLOS_SYSTEM_MGR_LINUX   
|0x107000001D000001
|-
|*SCE_CELLOS_SYSTEM_MGR_PS2     
|0x107000001D000001
|-
|*SCE_CELLOS_SYSTEM_MGR_PS2_SW 
|0x107000001D000001
|-
|*SCE_CELLOS_SYSTEM_MGR_PS2_GX 
|0x107000001D000001
|-
|*SCE_CELLOS_SS_SECURE_RTC     
|0x1070000033000001
|-
|*SCE_CELLOS_SS_INDI_INFO_EID
|
|-
|*SCE_CELLOS_SS_INIT_LV1_ACL   
|0x1070000017000001
|}


net_control_cmd_GELIC_LV1_POST_WLAN_CMD - 0x0024A55C (3.15)
== 0x15003 - Get Contents Size/Get Contents  ==


net_control_wlan_cmd_GELIC_EURUS_CMD_ASSOC - 0x00246C78 (3.15)
*This service provides the contents of a segment specified by a service requester
*I have got access to this service through DM but couldn't get through access policy yet, the service returns error code 0x00000005 that means '''Access Violation'''
*But i still could test with this service which segment names are valid
*I need valid '''laid''' and '''paid''' to get through it


net_control_wlan_cmd_GELIC_EURUS_CMD_START_SCAN - 0x00248A14 (3.15)
== 0x17000 - Indi Info Manager  ==


net_control_wlan_cmd_GELIC_EURUS_CMD_SET_WEP_CFG - 0x00249F24 (3.15)
{| class="wikitable FCK__ShowTableBorders"
 
|-
net_control_wlan_cmd_GELIC_EURUS_CMD_SET_WPA_CFG - 0x002497B8 (3.15)
! Packet ID
! Description
|-
| 0x17001
| Read EID Data Size By Index/Read metldr Size
|-
| 0x17002
| Read EID Data By Index/Read metldr
|-
| 0x17003
| Read ID Data
|-
| 0x17004
| Read System Data
|-
| 0x17005
| Write System Data?
|-
| 0x17006
| Write smth?
|-
| 0x17007
| Read System Data From EEPROM
|-
| 0x17008
| not implemented
|-
| 0x17009
| unknown
|-
| 0x1700A
| not implemented
|-
| 0x1700B
| not implemented
|-
| 0x1700C
| not implemented
|-
| 0x1700D
| not implemented
|-
| 0x1700E
| not implemented
|-
| 0x1700F
| not implemented
|-
| 0x17010
| unknown
|-
| 0x17011
| unknown
|-
| 0x17012
| unknown
|-
| 0x17013
| Read eEID Size
|-
| 0x17014
| Write eEID/Write metldr
|-
| 0x17015
| Read cISD Size
|-
| 0x17016
| Read cISD
|-
| 0x17017
| Write cISD
|}


= Event Notification  =
*Indi Info Manager is accessed e.g. in '''syscall 868''' on GameOS


*Event Notfication is used e.g. to notify a LPAR about some event, e.g. device interrupt or notify a LPAR about destruction of another LPAR.
=== 0x17001 - Read EID Data Size By Index  ===
*For example Process 9 is notified through Event Notification when LPAR 2 is destructed.
*During LPAR construction, Process 9 creates an Outlet object with '''syscall 0x1001A''' and then passes the outlet ID to the '''syscall 0x10009''' that constructs the LINUX LPAR. In this way Process 9 is notified when LINUX LPAR is destructed.


== Outlet class  ==
*I have got access to this service through DM and tested it
*This service is used e.g. by Update Manager, User Token Manager or Storage Manager
*The service expects 2 additional parameters, each parameter is 8 bytes
*I tested it with values: 0x0, 0x4 and 0x1000 for the 1st parameter. I extracted this values from HV Processes which use this service
*The 2nd parameter is not used in a request but in a response. It contains EID size.


This is the base Outlet class. There are different types of Outlet and they derive from this base class.  
{| class="wikitable FCK__ShowTableBorders"
 
|-
=== vtable ===
! Index
 
! Size Of Data
0x00357DC0 (3.15)
! Description
|-
| 0
| 0x860
| EID0
|-
| 1
| 0x2A0
| EID1
|-
| 2
| 0x730
| EID2
|-
| 3
| 0x100
| EID3
|-
| 4
| 0x030
| EID4
|-
| 5
| 0xA00
| EID5
|-
| 6
| 0x020
| cISD0
|-
| 7
| 0x200
| cISD1
|-
| 8
| 0x010
| cISD2
|-
| 9
| 0x030
| cCSD0
|-
| 0x1000
| 0xe960
| metldr - size is version dependand
|}
 
=== 0x17002 - Read EID Data By Index  ===
 
*I have got access to this service through DM and tested it
*This service is used e.g. by Update Manager, User Token Manager or Storage Manager
*The service expects 2 additional parameters, each parameter is 8 bytes
*The 1st parameter is same as the 1st parameter of service '''Read EID Data Size By Index'''
*The 2nd parameter is '''EID Data Size''' that is returned by the service '''Read EID Data Size By Index'''
*The returned data is some binary data.
*The data returned by the service with 1st parameter set to 0x0 or 0x4 is from file '''eEID''' stored on FLASH storage device region 0.
*The data returned by the service with 1st parameter set to 0x1000 contains string '''metldr'''.
*E.g. EID0 data is passed by Update Manager to SPU module '''spu_token_processor.self''' when Update Manager loads and executes it with syscall '''0x10043'''.
*E.g. EID4 data is passed by Storage Manager to SPU module '''sb_iso_spu_module.self'''.
 
=== 0x17004 - Read System Data ===


=== Member variables  ===
*Reads data from '''cISD''' or '''cCSD''' files stored on '''/dev/rflash1'''.
*E.g. Gelic MAC address is stored in file '''cISD'''.


offset 0x30 - type (8 bytes)
=== 0x17007 - Read System Data From EEPROM  ===


offset 0x38 - pointer to LPAR that owns this Outlet object
*Reads data from SC EEPROM
*An index is passed to the service. The index is mapped to a specific SC EEPROM offset.


offset 0x48 - outlet id (8 bytes)
Here is the list of possible EEPROM offsets from HV 3.15:


offset 0x90 - VIRQ assigned to this Outlet object (4 bytes)
{| class="wikitable FCK__ShowTableBorders"
|-
! Index
! SC EEPROM Offset
! Size Of Data
|-
| 0
| 0x48D20
| 6
|-
| 1
| 0x48D28
| 6
|-
| 2
| 0x48D30
| 6
|-
| 3
| 0x48D38
| 6
|-
| 4
| 0x48D00
| 4
|-
| 5
| 0x48D04
| 4
|-
| 6
| 0x48D08
| 4
|}


== Event Receive Port class ==
=== 0x17014 - Write eEID/Write metldr ===


*This type of Outlet is created e.g. in '''lv1_construct_event_receive_port''' and in '''syscall 0x1001A'''.
*'''Holy crap, it writes passed data to the region of FLASH memory where eEID or metldr data is stored&nbsp;!!!'''  
*HV calls '''lv1_connect_irq_plug''' and '''lv1_connect_irq_plug_ext''' assigns a VIRQ to Event Receive Port object.
*'''And GameOS is allowed to use this service&nbsp;!!!'''  
*'''Do not experiment with this service if you don't know what it does or else your PS3 will not work anymore&nbsp;!!!'''


=== vtable ===
=== 0x17015 - Read cISD Size ===


0x00357E88
*Returns size of data '''cISD''' that is stored on '''FLASH storage device region 0'''


== VUART Outlet ==
=== 0x17016 - Read cISD ===


*HV supports only one VUART Outlet per LPAR
*Returns data '''cISD''' that is stored on '''FLASH storage device region 0'''
*'''lv1_configure_virtual_uart_irq''' constructs a VUART Outlet object and passes the address of LPAR's VUART IRQ Bitmap to HV


=== vtable ===
=== 0x17017 - Write cISD ===


0x00357DC0
*'''Writes passed data to the region of FLASH memory where cISD data is stored&nbsp;!!!'''


=== VUART IRQ Bitmap ===
== 0x18000 - DM (Dispatcher Manager) ==


*At address 0x38(LPAR ptr) + 0x158 is the VUART IRQ Bitmap owned by HV for LPAR (4 * 8 bytes = 256 bits)  
*Dispatcher Manager runs in Process 3.
*At address 0x38(LPAR ptr) + 0x150 is stored the physical address of LPAR's VUART IRQ Bitmap that was passed to '''lv1_configure_virtual_uart_irq'''  
*When SLL (Secure LPAR Loader) creates GamesOS LPAR and loads it, it also creates a VUART with port number '''10''' owned by GameOS using a service provided by Dispatcher Manager (0x18001 - Construct Service Port).
*When a VUART interrupt is generated by HV then first the VUART IRQ Bitmap owned by HV is updated and then this bitmap is copied to LPAR's VUART IRQ Bitmap, so VUART IRQ Bitmap is stored twice, once in HV and once in LPAR, just like IRQ State Bitmap.  
*Dispatcher Manager communicates with GameOS through this VUART. It opens the file '''/proc/partitions/&lt;LPAR id&gt;/vuart/10'''. When the file '''/proc/partitions/&lt;LPAR id&gt;/vuart/10''' is opened by Dispatcher Manager, the Hypervisor creates a peer VUART which is connected to the GameOS's VUART 10.  
*VUART IRQ Bitmap is not allowed to cross page boundary of LPAR memory region where it is stored. HV checks it and makes sure that it doesn't happen.
*After that Dispatcher Manager reads requests from this VUART sent by GameOS and dispatches these requests to services (functions) provided by Hypervisor Processes through sockets. '''Through VUART and Dispatcher Manager, the GameOS LPAR has access to all services provided by Hypervisor Processes.'''  
*'''GameOS 3.41''' VUART IRQ bitmap is at address '''0x80000000003556E8''' and of size '''32 bytes (256 bits, each bit corresponds to a VUART port)'''.
*However, the services provided by Hypervisor Processes are protected by Security Policy Manager (SPM). Before Dispatcher Manager routes the requests from GameOS to these services, it consults SPM (by using 0x11001 service of SPM) and checks if the GameOS has access rights to the requested service. If not then the request is not routed.  
*'''GameOS 3.15''' VUART IRQ bitmap is at address '''0x8000000000354768'''.
*DM overwrites the LAID sent in SS packet header with the LAID of the LPAR that sent the request. So, no matter what LAID you send in SS packet header, it will be always overwritten with the correct one by DM. That is the reason why e.g. USB Dongle Master Key cannot be decrypted by GameOS without patching DM. But with HV access rights, DM can be easily patched and access to SYSCON can be gained.  
 
*Linux LPAR doesn't have a VUART communication link to Dispatcher Manager.
= Logical PPE  =
*I tested VUART 10 on GameOS with PSGroove and it's there.
 
*On GamesOS, '''_ss_multiplexer''' accesses DM (VUART 10)
*Logical PPE is used for interrupt management of LPAR.  
*A Logical PPE object is created in '''syscall 0x10005'''. It' used e.g. in Process 9 during LPAR construction.  
*'''syscall 0x10007''' activates a Logical PPE object
*0x67F0(HSPRG0) - pointer to currently active Logical PPE object (in HV dump it points to Linux PPE object naturally because the dump was made on Linux, so Linux LPAR was active at that time)
*E.g. '''lv1_get_logical_ppe_id''', '''lv1_start_ppe_periodic_tracer''' and '''lv1_set_ppe_periodic_tracer_frequency''' grab the currently active Logical PPE object
 
== vtable  ==
 
0x00357DF0 (3.15)  
 
== Member variables  ==
 
offset 0x90 - pointer to an object that contains VIRQ-Outlet mapping table for thread 0
 
offset 0x98 - pointer to an object that contains VIRQ-Outlet mapping table for thread 1
 
== Objects  ==
 
Here is the list of Logical PPE objects i found in HV 3.15.


{| class="wikitable FCK__ShowTableBorders"
{| class="wikitable FCK__ShowTableBorders"
|-
|-
! Address in HV dump
! Packet ID
! LPAR id
! Description
! PPE id
|-
|-
| 0x0069C7F0
| 0x18001
| 1
| Construct Service Port
| 1
|-
|-
| 0x007A8900
| 0x18002
| 2
| Destruct Service Port
| 1
|}
|}


== Virtual IRQ - Outlet Mapping ==
=== Dispatcher Manager Messages ===
 
==== Dispatcher Manager Header  ====


*HV maintains 2 tables per PPE that map a VIRQ to an Outlet object.
*Payload follows after header
*The table has 256 entries and is indexed by VIRQ.
*Payload is a SS packet
*Each entry is a pointer to Outlet object.
<pre>struct dispmgr_header
*Each Logical PPE object has 2 tables, one for each thread of Cell CPU.
{
    uint32_t request_id;
    uint32_t function_id;
    uint32_t request_size;        /* payload size of request */
    uint32_t response_size;        /* payload size of response */
}
</pre>
=== Packet ID - SS ID Mapping  ===


=== LPAR 1 PPE 1 Thread 0  ===
*Before DM routes a received request to a service provider (HV Process) it consults SPM
*DM sends a request to SPM
*Request contains SS ID and Subject ID (laid and paid)
*DM obtains SS ID by mapping Packet ID


0x0069C990 (3.15) - address of VIRQ-Outlet table for '''LPAR 1 PPE 1 Thread 0''' (not empty)
Here is the mapping table i extracted from HV Process 3 where SPM and DM run:


{| class="wikitable FCK__ShowTableBorders"
{| class="wikitable FCK__ShowTableBorders"
|-
|-
! VIRQ
! Packet ID
! Address of Outlet object in HV dump
! SS ID
! Description
|-
| 0x2001
| 0x34
|-
|-
| 58
| 0x2002
| 0x00090D10
| 0x35
| -
|-
|-
| 59
| 0x2003
| 0x006BAC50
| 0x36
| -
|-
|-
| 60
| 0x2004
| 0x006B3ED0
| 0x37
| FLASH storage device / Storage device notification for LPAR 1
|-
|-
| 61
| 0x2005
| 0x00697E70
| 0x38
| VUART interrupts
|-
|-
| 62
| 0x2006
| 0x001C8F20
| 0x39
| -
|}
 
=== LPAR 1 PPE 1 Thread 1  ===
 
0x0069D9B0 (3.15) - address of VIRQ-Outlet table for '''LPAR 1 PPE 1 Thread 1''' (empty)
 
=== LPAR 2 PPE 1 Thread 0  ===
 
0x000A06B0 (3.15) - address of VIRQ-Outlet table for '''LPAR 2 PPE 1 Thread 0''' (not empty)
 
{| class="wikitable FCK__ShowTableBorders"
|-
|-
! VIRQ
| 0x200A
! Address of Outlet object in HV dump
| 0x3D
! Description
|-
|-
| 20
| 0x200B
| 0x003AA210
| 0x3E
| -
|-
|-
| 21
| 0x200C
| 0x003AFEC0
| 0x3F
| -
|-
|-
| 22
| 0x200D
| 0x001FC010
| 0x40
| -
|-
|-
| 23
| 0x200E
| 0x003A8E50
| 0x41
| -
|-
|-
| 24
| 0x2012
| 0x001FFED0
| 0x7B
| SPE 0 Class 0 Interrupt
|-
|-
| 25
| 0x2013
| 0x003AE160
| 0x7C
| SPE 0 Class 1 Interrupt
|-
|-
| 26
| 0x2014
| 0x003AE350
| 0x7E
| SPE 0 Class 2 Interrupt
|-
|-
| 27
| 0x2015
| 0x003AB100
| 0x7F
| SPE 1 Class 0 Interrupt
|-
|-
| 28
| 0x2016
| 0x003AB2F0
| 0x7D
| SPE 1 Class 1 Interrupt
|-
|-
| 29
| 0x2017
| 0x003AB4E0
| 0x80
| SPE 1 Class 2 Interrupt
|}
 
== 0x25000 - User Token Manager  ==
 
{| class="wikitable FCK__ShowTableBorders"
|-
|-
| 30
! Packet ID
| 0x003AA6A0
! Description
| SPE 2 Class 0 Interrupt
|-
|-
| 31
| 0x25001
| 0x003AA890
| Encrypt User Token
| SPE 2 Class 1 Interrupt
|-
|-
| 32
| 0x25002
| 0x003AAA80
| Decrypt User Token
| SPE 2 Class 2 Interrupt
|}
|-
 
| 33
=== User Token  ===
| 0x003B44A0
 
| SPE 3 Class 0 Interrupt
*Before User Token Manager encrypts a received user token it checks it's format.
|-
*User Tokens are processed by '''spu_utoken_processor.self'''
| 34
*Before User Token is processed, User Token Manager reads IDPS by sending SS requests to Indi Info Manager (packet ids 0x17001 and 0x17002). Indi Info Manager runs in HV Process 5.
| 0x003B4690
 
| SPE 3 Class 1 Interrupt
==== User Token Format  ====
|-
<pre>stuct user_token_attr
| 35
{
| 0x003B4AD0
    uint32_t type;                                /* 0x00000001, value&nbsp;!= 0x00000001 means attribute list ends here */
| SPE 3 Class 2 Interrupt
    uint32_t size;                                /* 8 + sizeof(data) */
|-
    /* data follows here, size of data may be 0 */
| 36
}
| 0x003B5300
 
| SPE 4 Class 0 Interrupt
struct user_token
|-
{
| 37
    uint32_t magic;                                /* 0x73757400 = "sut\0" */
| 0x003B54F0
    uint32_t format_version;                      /* 0x00000001 */
| SPE 4 Class 1 Interrupt
    uint64_t size;
|-
    uint8_t idps[16];
| 38
    uint64_t expire_date;
| 0x003B56E0
    uint64_t capability;
| SPE 4 Class 2 Interrupt
    union
|-
    {
| 39
        stuct user_token_attr attrs[0];
| 0x003AE7C0
        uint8_t dummy[3072];
| SPE 5 Class 0 Interrupt
    } attrs;
|-
    /* 0xC30 */
| 40
    uint8_t digest[20];
| 0x003AE9B0
}
| SPE 5 Class 1 Interrupt
</pre>
|-
= LPAR Memory Management  =
| 41
 
| 0x003AEBA0
== Memory Region class  ==
| SPE 5 Class 2 Interrupt
 
|-
This class is the base class for different memory region types.
| 42
 
| 0x003B2040
=== vtable  ===
| Storage device notification for LPAR 2
 
|-
0x003578B0 (3.15)
| 43
 
| 0x003AEE30
=== Member variables  ===
| VUART interrupts
 
|-
offset 0x40 - pointer to LPAR object that owns this memory region
| 44
 
| 0x001FEAA0
offset 0x48 - type of memory region (8 bytes)
| -
 
|-
offset 0x50 - LPAR start address of memory region
| 45
 
| 0x001FEED0
offset 0x58 - size of memory region (8 bytes)
| HDD storage device
 
|-
offset 0x60 - flags (8 bytes)
| 46
 
| 0x003B5E20
offset 0xA0 - log2 of page size
| -
 
|-
=== Generating New LPAR Memory Region Addresses ===
| 47
 
| 0x003B7040
generate_new_lpar_mem_region_address(?, memory region size, log2(page size), ?, ?) - 002C82E8 (3.15)
| -
 
|-
generate_new_lpar_mem_region_address - 002C6570 (3.41)
| 48
| 0x003B9B40
| -
|-
| 49
| 0x003B3A40
| -
|-
| 50
| 0x003BACA0
| Gelic device
|-
| 51
| 0x003BAE10
| UNKNOWN storage device
|-
| 52
| 0x003B8350
| -
|}


=== LPAR 2 PPE 1 Thread 1  ===
*The function returns a new LPAR memory region address.
*This method is used e.g. in all HV calls which create any kind of memory regions, e.g. '''lv1_allocate_memory''', '''lv1_map_htab''', '''lv1_undocumented_function_114''', '''lv1_construct_logical_spe''', '''lv1_map_device_mmio_region''' or '''syscall 0x10040'''.


0x007A89E0 (3.15) - address of VIRQ-Outlet table for '''LPAR 2 PPE 1 Thread 1''' (not empty)
==== Encoding LPAR Memory Region Start Addresses and Sizes ====


{| class="wikitable FCK__ShowTableBorders"
*Size of LPAR memory region is encoded in the LPAR memory region start address.
|-
*That is why e.g. the LPAR Memory Region Start Addresses of LPAR Memory Region of size 4096 byte begin with '''0x300000000000''', '''0x300000000000 >> 42 = 0xC = log2(4096)'''.
! VIRQ
*Each LPAR has a counter (8 bytes) which is incremented by 1 every time a new LPAR Memory Region is created.
! Address of Outlet object in HV dump
*Before incrementing, the counter is shifted left by '''log2(LPAR Memory Region Size)''' and ored with '''log2(LPAR Memory Region Size) << 42'''.
! Description
 
|-
LPAR Memory Region Start Address >> 42 = log2(LPAR Memory Region Size)
| 16
 
| 0x003B2480
LPAR Memory Region Start Address = (log2(LPAR Memory Region Size) << 42) |
| -
    (counter << log2(LPAR Memory Region Size))
|-
 
| 17
===== LPAR Memory Region Address Counter =====
| 0x003B2590
 
| -
*LPAR Memory Region Address Counter is stored at address: '''0x38(LPAR ptr) + 0x9E8'''
|-
*LPAR1's Memory Region Address Counter is at address '''0x00677A48''' in HV dump 3.15
| 18
*LPAR2's Memory Region Address Counter is at address '''0x007632D8''' in HV dump 3.15
| 0x003B26A0
*LPAR1's Memory Region Address Counter is at address '''0x00677A48''' in HV dump 3.41
| -
*LPAR2's Memory Region Address Counter is at address '''0x00161E68''' in HV dump 3.41
|-
 
| 19
== Physical Memory Region class  ==
| 0x003B27B0
| -
|}


== IRQ State Bitmap  ==
This type of memory region is created e.g. in '''lv1_allocate_memory''' HV call or in '''syscall 0x10000'''.


*There is one IRQ State Bitmap (256 bits = 32 bytes) per thread of Logical PPE
=== vtable  ===
*'''HSPRG0 value is per thread''', so there are 2 HSPRG0 values in HV dump&nbsp;!!!
*The IRQ State Bitmap of a thread is stored at -0x68E0(HSPRG0)
*When an Event or Interrupt happens then the bitmap at 0x68E0(HSPRG0) is updated
*The physical address of '''LPAR's IRQ State Bitmap''' of thread is stored at offset -0x68C0(HSPRG0)
*The address of LPAR's IRQ State Bitmap is passed to Hypervisor through HV call '''lv1_configure_irq_state_bitmap'''
*'''lv1_detect_pending_interrupts''' returns value of current IRQ State Bitmap.
*The IRQ State Bitmap is updated if an Outlet object is assigned to VIRQ and when Outlet generates an event
*After IRQ State Bitmap update, it's copied to LPAR's IRQ State Bitmap and a hardware interrupt is generated so that LPAR can read it's IRQ State Bitmap and handle interrupts.
*So, IRQ State Bitmap is stored twice, once in HV and once in LPAR, just like VUART IRQ Bitmap.
*'''GameOS''' IRQ state bitmap is stored at address '''SPRG0 + 0x1C0 and of size 64 bytes (256 bits state + 256 bits mask) per thread of Cell CPU'''. So there are 2 IRQ state bitmaps.


0x8941FC0 - physical address of LPAR's IRQ State Bitmap for Thread 0 of LINUX LPAR
0x00357D08 (3.15)


0x8948FC0 - physical address of LPAR's IRQ State Bitmap for Thread 1 of LINUX LPAR
=== Member variables  ===


= System Controller (SC or SYSCON)  =
offset 0xB0 - pointer to object that stores a list of addresses of physical pages owned by this memory region


*Data received from SC is sent to a VUART
offset 0xB8 - pointer to LPAR object that owns this memory region
*'''lv1_get_rtc''' and '''syscall 0x10036''' communicate with '''SC VUART 4'''.


=== VUART Table  ===
offset 0xC0 - reference counter (8 bytes)


*Address of SC VUART Table - 0x00610410 (3.15).
=== Objects  ===
*There are 5 VUARTs for SC in HV 3.15


Here is the SC VUART table from HV 3.15:
Here is the list of physical memory region objects i found in HV 3.15.


{| class="wikitable FCK__ShowTableBorders"
{| class="wikitable FCK__ShowTableBorders"
|-
|-
! Index
! Address in HV dump  
! Address of VUART object in HV dump  
! LPAR id
! Description
! LPAR Start Address
! Size
! Flags
! log2(Page Size)
! Physical Page Addresses
|-
| 0x006B5510
| 1
| 0x300000001000
| 0x1000
| 0x0
| 0xC
| 0x672000
|-
| 0x006B5E50
| 1
| 0x440000040000
| 0x20000
| 0x0
| 0x11
| 0x6C0000
|-
|-
| 0
| 0x006B6980
| 0x0060FD20
| 1
| This VUART is connected with the '''VUART 0 (/dev/sc0)''' of LPAR 1
| 0x440000060000
| 0x20000
| 0x0
| 0x11
| 0x6E0000
|-
|-
| 0x006B7F00
| 1  
| 1  
| 0x0060FE20
| 0x400000040000
| This VUART is connected with the '''VUART 1 (/dev/sc1)''' of LPAR 1
| 0x10000
| 0x0
| 0x10
| 0x100000
|-
|-
| 0x003A80F0
| 2  
| 2  
| 0x0060FF20
| 0x6C0058000000
| This VUART is not connected to some peer VUART but i guess that it should be connected to '''VUART 2 (/dev/sc2)''' of LPAR1
| 0x7000000
| 0x4
| 0x18
| 0x1000000 - 0x7000000
|-
|-
| 3
| 0x003BE800
| 0x006124E0
| 2
| This VUART is connected with the '''VUART 3 (/dev/sc3)''' of LPAR 1
| 0x300000047000
| 0x1000
| 0x0
| 0xC
| 0x1FA000
|-
|-
| 4
| 0x006BDAA0
| 0x00612DF0
| 2
| '''lv1_get_rtc''' and '''syscall 0x10036''' communicate with this VUART.
| 0x0
| 0x8000000
| 0x8
| 0x1B (single huge page)
| 0x8000000
|}
|}


== Interrupt Handling  ==
So, Linux kernel should be located at physical address 0x8000000 and Linux syscall handler at 0x8000C00. Too bad that the HV dump is not large enough.


spider_sc_interrupt_handler - 0x0020A68C (3.15)
=== GameOS Physical Memory Regions  ===


== Methods  ==
*GameOS allocates nearly all physical memory of PS3 for itself&nbsp;!!! That is why new HV calls '''lv1_allocate_memory''' with large memory region sizes will fail.
*So when someone wants a large piece of physical memory, he can borrow it from GameOS's LPAR memory region that starts at '''0x700020000000'''. It can be used for example to send update packages to Update Manager which are very large.


sc_vuart_4_get_peer_vuart - 0x002ED384 (3.15)
Here is the list of physical memory regions of GameOS i found in HV 3.41:


sc_send - 0x0020A908 (3.15)
{| class="wikitable FCK__ShowTableBorders"
|-
! Start Address
! Size
! Access Right
! Max Page Size
! Flags
! Real Addresses
|-
| 0x0
| 0x1000000
| 0x3
| 0x18
| 0x8
| 0x1000000 - 0x1FFF000
|-
| 0x500000300000
| 0xA0000
| 0x3
| 0x10
| 0x8
| 0x380000 - 0x38F000, 0x3B0000 - 0x3BF000, 0x1E0000 - 0x1FF000, 0x3C0000 - 0x3FF000, 0xFF00000 - 0xFF1F000
|-
| 0x700020000000
| 0xE900000 (huge memory region)  
| 0x3
| 0x14
| 0x0
| 0x400000 - 0x5FF000, 0x800000 - 0xFFF000, 0x2000000 - 0xFEFF000
|}


sc_receive - 0x0020A354 (3.15)
== HTAB Memory Region class  ==


sc_vuart_rx_trigger_callback - 0x002ED470 (3.15)
This memory region is created when a HTAB is mapped into LPAR's address space. It's created in '''lv1_map_htab''' HV call.  


== lv1_get_rtc ==
=== vtable ===


*'''lv1_get_rtc''' communicates with SC VUART 4.
0x00357C98 (3.15)
*20 bytes are written to the peer VUART of SC VUART 4.
*After a request is sent to SC VUART 4, '''lv1_get_rtc''' busy waits until SC VUART 4 receive data buffer is not empty.
*When SC VUART 4 receive data buffer is not empty, '''lv1_get_rtc''' reads 24 bytes from the VUART.


== SYSCON Protocol ==
=== Member variables  ===


* I was able to enable SYSCON Manager debug messages in HV Process 5
offset 0xB0 - pointer to VAS object that owns the HTAB
* Messages sent to SYSCON are at least '''0x10''' bytes of size. SC VUARTs check it before sending the messages to SYSCON.
* The header size of the SYSCON messages is '''0x10''' bytes.


=== Packet Header ===
=== Objects  ===


* Packet header is of size '''0x10''' bytes.
Here is the list of HTAB memory region objects i found in HV 3.15.  
* At offset '''0x6''' of SYSCON packet is the header checksum which is of size '''2''' bytes.
 
* '''The header checkum is just a sum of first 6 header bytes and 0x8000 constant'''
{| class="wikitable FCK__ShowTableBorders"
* The '''2nd byte''' in every SYSCON message has to be '''1''' or else the function '''sc_send''' fails.
|-
* The '''word''' at offset '''0x8''' is the '''SC VUART index'''.
! Address in HV dump
* The '''half-words''' at offset '''0xC''' and '''0xE''' have to be equal or the function '''sc_send''' fails.
! LPAR id
! VAS id
! LPAR Start Address
! Size
! Flags
! log2(Page Size)
|-
| 0x001FE0F0
| 2
| 3
| 0x500000C00000
| 0x100000
| 0xC000000000000000
| 0x14
|-
| 0x003BD850
| 2  
| 3
| 0x500004300000
| 0x100000
| 0xC000000000000000
| 0x14
|-
| 0x003BDEA0
| 2
| 3
| 0x500004500000
| 0x100000
| 0xC000000000000000
| 0x14
|}


<pre>
=== GameOS HTAB  ===
struct sc_hdr
{
    uint8_t field0;
    uint8_t field1;          /* always 1 */
    uint8_t field2[4];
    uint16_t cksum;          /* header checksum */
    uint32_t index;          /* syscon index (0 - /dev/sc0, 1 - /dev/sc1, 2 - /dev/sc2, 3 - /dev/sc3) */
    uint16_t size1;          /* body size */
    uint16_t size2;          /* body size */
};
</pre>


==== Calculating Packet Header Checksum ====
*HTAB of GameOS is already mapped into address space of GameOS so that is why HV call '''lv1_map_htab''' will fail until you unmap it with '''lv1_unmap_htab'''
*Effective address of GameOS HTAB is '''0x800000000F000000'''
*Virtual address of GameOS HTAB is '''0xF000000'''
*Size of GameOS HTAB is '''0x40000'''
*GameOS HTAB supports large pages of size '''64K''' and '''1M'''
*GameOS HTAB can be easily dumped by reading 0x40000 bytes at EA 0x800000000F000000


<pre>
=== GameOS SLB  ===
/* calculating SC packet header checksum */


/*
Here is the dump of SLB entries from GameOS 3.41:
  * sc_hdr_cksum
<pre>0x8000000008000000  0x0000000000000500
  */
0x8000000208000000  0x0000000000020500
uint16_t sc_hdr_cksum(struct sc_hdr *sc_hdr)
0x8000000300000000  0x0000000000030510
{
0x0000000000000000  0x0000000000000000
    uint8_t *ptr;
0x0000000080000000  0x0000000000038C00
    uint32_t sum;
0x00000000A0000000  0x000000000003AC00
 
0x00000000C0000000  0x000000000003CC00
    ptr = (uint8_t *) sc_hdr;
0x0000000000000000  0x0000000000000000
    sum = 0;
0x0000000000000000  0x0000000000000000
 
0x0000000000000000  0x0000000000000000
    for (i = 0; i < 6; i++)
0x0000000000000000  0x0000000000000000
        sum += *ptr++;
0x0000000000000000  0x0000000000000000
 
0x0000000000000000  0x0000000000000000
    sum += 0x8000;
0x0000000000000000  0x0000000000000000
 
0x0000000000000000  0x0000000000000000
    return sum & 0xffff;
0x0000000000000000  0x0000000000000000
}
0x0000000000000000  0x0000000000000000
 
0x0000000000000000  0x0000000000000000
struct sc_hdr sc_hdr;
0x0000000000000000  0x0000000000000000
 
0x0000000000000000  0x0000000000000000
memset(&sc_hdr, 0, sizeof(sc_hdr));
0x0000000000000000  0x0000000000000000
 
0x0000000000000000  0x0000000000000000
sc_hdr.cksum = sc_hdr_cksum(sc_hdr);
0x0000000000000000  0x0000000000000000
 
0x0000000000000000  0x0000000000000000
/* fill sc header here */
0x0000000000000000  0x0000000000000000
 
0x0000000000000000  0x0000000000000000
sc_hdr.cksum = sc_hdr_cksum(sc_hdr);
0x0000000000000000  0x0000000000000000
</pre>
0x0000000000000000  0x0000000000000000
 
0x0000000000000000  0x0000000000000000
=== Packet Body ===
0x0000000000000000  0x0000000000000000
 
0x0000000000000000  0x0000000000000000
* Packet body follows packet header
0x0000000000000000  0x0000000000000000
* Packet body size is stored at offset '''0xC''' and '''0xE''' in packet header and is of size 2 bytes
0x8000000010057960  0x8000000000313E78
0x8000000010057940  0x0000000000000000
0x800000000001B698  0x0000000000000000
0x8000000010057930  0x8000000000490708
0x80000000002B6C68  0x80000000003DE928
0x8000000010057EC0 0x80000000003DE920
0x0000000000000000 0x8000000000309810
0x80000000004B3000  0x0000000000000000
0x8000000010057CC0  0x0000000000000000
0x80000000004AF000  0x80000000004E1F00
0x80000000100579C8  0x80000000100579C0
0x80000000100579E0  0x2400002200000000
0x80000000004CF5B0  0x8000000200012000
0x80000000100579F8  0x80000000100579F0
0x8000000010057A10  0x80000000004A3A00
0x80000000004CF5B0  0x80000000004C8D00
0x800000000001BF6C  0x80000000004CD400
0x800000000001B698  0x80000000004C8100
0x80000000100579D0  0x80000000004B48C0
0x0000000000001C08  0x0000000000000000
0x8000000010057A78  0x8000000010057A70
0x8000000010057A90  0x0000000000000000
0x80000000004CF90C  0x0000000000000000
0x0000000000000000  0x8000000010057A80
0x8000000010057A90  0x8000000000309810
0x80000000004CF62C  0x0000000000000000
0x8000000010057CC0  0x0000000000000000
0x80000000004AF000  0x80000000004B48C0
0x00004000001C0000  0x0000000000000001
0x00000000D0000000  0x0000A8E3EE7D10DA
0x0000000000000000  0x0000000000000000
0x80000000004D8088  0x80000000004D9000
</pre>
== SPE MMIO Memory Region class  ==


=== Reading SYSCON EPROM (NVS Service) ===
This type of memory region represents MMIO memory region of a SPE. It's created e.g. in '''lv1_construct_logical_spe''' or in '''syscall 0x10040'''.


Here is a command which is sent to SYSCON to read 1 byte of EPROM at offset 0x48C07 (Product Mode):
=== vtable  ===
0x14 <span style="background:#00FF00">0x01</span> 0x00 0x00 0x00 0x00 <span style="background:#FF0000">0x80 0x15</span> <span style="background:#FFFF00">0x00 0x00 0x00 0x00</span> <span style="background:#00FFFF">0x00 0x04</span> <span style="background:#00FFFF">0x00 0x04</span> 0x20 0x02 0x07 0x01


And here is the response to the above request:
0x003583F8 (3.15)
0x14 <span style="background:#00FF00">0x01</span> 0x00 0x00 0x00 0x00 <span style="background:#FF0000">0x80 0x15</span> <span style="background:#FFFF00">0x00 0x00 0x00 0x03</span> <span style="background:#00FFFF">0x00 0x05</span> <span style="background:#00FFFF">0x00 0x05</span> 0x00 0x02 0x07 0x01 0xff


=== PCI Bus Power ===
=== Member variables  ===


* '''Used by PS2EMU System Manager in HV process 9 when PS2 EMU is booted'''
=== Objects  ===


==== PCI Bus Power On ====
Here is the list of SPE memory region objects i found in HV 3.15.


'''Request to SC1:'''
{| class="wikitable FCK__ShowTableBorders"
0x10 0x01 0x00 0x00 0x00 0x00 0x80 0x11 0x00 0x00 0x00 0x00 0x00 0x02 0x00 0x02 0x31 0x01
|-
 
! Address in HV dump
==== PCI Bus Power Off ====
! LPAR id
 
! SPE
'''Request to SC1:'''
! LPAR Start Address
0x10 0x01 0x00 0x00 0x00 0x00 0x80 0x11 0x00 0x00 0x00 0x00 0x00 0x02 0x00 0x02 0x31 0x00
! Size
 
! Physical Address
=== Ring Buzzer ===
! Flags
! log2(Page Size)
|-
| 0x003ABC20
| 2
| 1
| 0x4C0000880000
| 0x80000
| 0x20000080000
| 0xA000000000000000
| 0xC
|-
| 0x003AAD70
| 2
| 2
| 0x4C0000980000
| 0x80000
| 0x20000100000
| 0xA000000000000000
| 0xC
|-
| 0x003A8880
| 2
| 3
| 0x4C0000780000
| 0x80000
| 0x20000180000
| 0xA000000000000000
| 0xC
|-
| 0x003B4F70
| 2
| 4
| 0x4C0000A80000
| 0x80000
| 0x20000200000
| 0xA000000000000000
| 0xC
|-
| 0x003AB700
| 2
| 5
| 0x4C0000680000
| 0x80000
| 0x20000280000
| 0xA000000000000000
| 0xC
|-
| 0x003B5BE0
| 2
| 6
| 0x4C0000B80000
| 0x80000
| 0x20000300000
| 0xA000000000000000
| 0xC
|}


'''Request:'''
== SPE Shadow Registers Memory Region class ==
  0x16 0x01 0x00 0x00 0x00 0x00 0x80 0x17 0x00 0x00 0x00 0x00 0x00 0x08 0x00 0x08 0x20 0x00 0x00 0x00 0x00 0x00 0x00 0x00


=SYSCON=
This type of memory region represents shadow registers memory region of a SPE. It's created e.g. in '''lv1_construct_logical_spe''' or in '''syscall 0x10040'''.  
Crossreference: [http://wiki.gitbrew.org/index.php/PS3:HvReverseEngineering#SYSCON gitbrew.org::SYSCON] <br />


SYSCON MMIO registers can be accessed on Linux with a driver using lv1_undocumented_function_114, e.g. '''ps3sbmmio'''.
=== vtable  ===
Use ps3sbmmio device driver carefully, an access at some addresses could shutdown your PS3.


==Packet Header==
0x00358448 (3.15)


* Size is '''0x10'''.
=== Objects  ===


<pre>
Here is the list of SPE Shadow Registers memory region objects i found in HV 3.15.
struct sc_hdr {
    uint8_t service_id;
    uint8_t version;              /* must be 1 !!! */
    uint16_t transaction_id;      /* returned in response */
    uint8_t res[2];
    uint16_t cksum;              /* checksum of first 6 header bytes */
    uint32_t communication_tag;  /* SYSCON tag: 0-4 */
    uint16_t payload_size[2];    /* body size */
};
</pre>


==Sending Packets==
{| class="wikitable FCK__ShowTableBorders"
 
|-
* Before sending new packet to SYSCON, the Hypervisor checks 2 words at offsets 0x2400008DFF0 and 0x2400008CFF4.
! Address in HV dump
* The Hypervisor busy waits until (value + 1) at offset 0x2400008CFF4 is NOT equal to value at offset 0x2400008DFF0.
! LPAR id
* The packet is sent with 4 byte transfers.
! SPE
* First, the Hypervisor sends the header of the packet, 4 word transfers.
! LPAR Start Address
* The header is written beginning at the address 0x2400008D000.
! Size
* After that the Hypervisor sends the body of the packet, with 4 byte transfers too.
! Physical Address
* The body is written beginning at the address 0x2400008D010.
! Flags
* If the packet size is NOT divisible by 4 then the Hypervisor sends the remaining bytes (at most 3) as a word padded with 0s.
! log2(Page Size)
* After the packet body was written, the Hypervisor calculates checksum of the whole packet and writes it at the address where the last word of packet body was written + 4.
|-
<pre>
| 0x003ABDA0
uint32_t cksum = 0;
| 2  
 
| 1  
for (i = 0; i < packet_size; i++)
| 0x300000012000
    cksum -= packet[i];
| 0x1000
 
| -
cksum = cksum & 0xffff;
| 0xA000000000000000
</pre>
| 0xC
* After the packet checksum was written, the Hypervisor reads the value at offset 0x2400008DFF0, modifies it and stores back:
|-
<pre>
| 0x003B4290
value = value + 1;
| 2
value &= 0xffff;
| 2
value = (value << 16) | value;
| 0x300000014000
</pre>
| 0x1000
* To notify the SYSCON about the new packet, the Hypervisor writes 0x1 to address 0x2400008E100.
| -
| 0xA000000000000000
| 0xC
|-
| 0x003A8A00
| 2
| 3  
| 0x300000010000
| 0x1000
| -
| 0xA000000000000000
| 0xC
|-
| 0x003B50F0
| 2
| 4  
| 0x300000016000
| 0x1000
| -
| 0xA000000000000000
| 0xC
|-
| 0x001FFC90
| 2
| 5
| 0x30000000E000
| 0x1000
| -  
| 0xA000000000000000
| 0xC
|-
| 0x003AE5B0
| 2
| 6
| 0x300000018000
| 0x1000
| -
| 0xA000000000000000
| 0xC
|}


==Receiving Packets==
== Device MMIO Memory Region class  ==


* The Hypervisor installs an interrupt handler for the SYSCON.
This type of memory region is created when a device MMIO region is mapped into LPAR address space, e.g. in '''lv1_map_device_mmio_region'''.  
* First, the Hypervisor reads a word from address 0x2400008E000, ors it with 0xFFFFFFFD and writes the value back.
* Then, the Hypervisor reads a word from address 0x2400008E004 and tests if bit 0x2 is set or not. The bit 0x2 should be not 0 or else the Hypervisor panics.
* After that, the Hypervisor reads a word at address 0x2400008CFF0 and 0x2400008DFF4. If there is a new packet pending from SYSCON, then the (value + 1) at 0x2400008CFF0 should be equal the value at 0x2400008DFF4.
* The Hypervisor reads the header of the packet beginning at the address 0x2400008C000.
* The header is read with 4 word transfers by the Hypervisor.
* The byte at offset 1 in the packet header must be 1 or else the Hypervisor discards the packet as invalid.
* The Hypervisor calculates the checksum of the packet header and checks it with the checksum stored in the header. If they don't match then the Hypervisor discards the packet.
* The Hypervisor reads the body of the packet beginning at the address 0x2400008C010.
* The header and the body of the received packet can be read as many times as you want !!! They remain until next SYSCON packet is received
which gives us the possibility to communicate with SYSCON on Linux easily :)


==Test==
=== vtable  ===


'''1. Before sending SYSCON packet''':
0x00352468 (3.15)  
<pre>
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8cff4)) status=noxfer | hexdump -C


00000000 01 18 01 18                                      |....|
=== Member variables ===
00000004


root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff0)) status=noxfer | hexdump -C
offset 0xA8 - physical address where the device MMIO region is mapped to


00000000 01 18 01 18                                      |....|
=== Objects ===
00000004


root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8cff0)) status=noxfer | hexdump -C
Here is the list of Device MMIO memory region objects i found in HV 3.15.


00000000  01 24 01 24                                      |.$.$|
{| class="wikitable FCK__ShowTableBorders"
00000004
|-
! Address in HV dump
! LPAR id
! LPAR Start Address
! Size
! Flags
! log2(Page Size)
! Physical Address
! Device
|-
| 0x001FDF00
| 2
| 0x4000001D0000
| 0x10000
| 0x8000000000000000
| 0xC
| 0x24003010000
| USB controller
|-
| 0x003B3850
| 2
| 0x400000200000
| 0x10000
| 0x8000000000000000
| 0xC
| 0x24003020000
| USB controller
|-
| 0x003B6E50
| 2
| 0x4000001E0000
| 0x10000
| 0x8000000000000000
| 0xC
| 0x24003810000
| USB controller
|-
| 0x003B9950
| 2
| 0x4000001F0000
| 0x10000
| 0x8000000000000000
| 0xC
| 0x24003820000
| USB controller
|}


root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff4)) status=noxfer | hexdump -C
== GPU Device Memory Region class  ==


00000000  01 24 01 24                                      |.$.$|
This type of memory region is created e.g. in '''lv1_gpu_open''', '''lv1_gpu_device_map''' and '''lv1_undocumented_function_114'''.  
00000004
</pre>


'''2. SYSCON packet was sent by using ps3dm_scm read_eprom.'''
=== vtable  ===


'''3. After sending SYSCON packet''':
0x00357C48 (3.15)  
<pre>
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8cff4)) status=noxfer | hexdump -C


00000000 01 19 01 19                                      |....|
=== Member variables ===
00000004


root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff0)) status=noxfer | hexdump -C
offset 0xA8 - physical address


00000000 01 19 01 19                                      |....|
=== Objects ===
00000004


root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8cff0)) status=noxfer | hexdump -C
Here is the list of Device GPU memory region objects i found in HV 3.15.


00000000  01 25 01 25                                      |.%.%|
{| class="wikitable FCK__ShowTableBorders"
00000004
|-
 
! Address in HV dump
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff4)) status=noxfer | hexdump -C
! LPAR id
 
! LPAR Start Address
00000000  01 25 01 25                                      |.%.%|
! Size
00000004
! Flags
</pre>
! log2(Page Size)  
 
! Physical Address
'''4. Received Header'''
|-
 
| 0x003AF380
<pre>
| 2
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=16 skip=$((0x8c000)) status=noxfer | hexdump -C
| 0x700190000000
 
| 0xFE00000
00000000  14 01 00 00 00 00 80 15  00 00 00 03 00 05 00 05  |................|
| 0x8000000000000000
00000010
| 0x14
 
| 0x28080000000
</pre>
|-
 
| 0x003AF500
'''5. Received Body'''
| 2
 
| 0x4000001A0000
<pre>
| 0xC000
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=8 skip=$((0x8c010)) status=noxfer | hexdump -C
| 0x8000000000000000
 
| 0xC
00000000  00 00 c7 01 ff 00 00 00                          |..Ç.ÿ...|
| 0x3C0000
00000008
|-
</pre>
| 0x003AF680
| 2
| 0x4800006C0000
| 0x40000
| 0x8000000000000000
| 0xC
| 0x2808FE00000
|-
| 0x003AFC30
| 2
| 0x440000380000
| 0x20000
| 0x8000000000000000
| 0xC
| 0x28000C00000
|-
| 0x003BB420
| 2
| 0x3C0000108000
| 0x8000
| 0x8000000000000000
| 0xC
| 0x28000080100
|}


==Examples==
== Direct Map Memory Region class ==


===Get RTC===
This type of memory region is created in HV call '''lv1_undocumented_function_114'''.
'''lv1_undocumented_function_114''' allows you to map any memory address into LPAR's memory address.


* Used by LV1 call '''lv1_get_rtc'''
* The HV call '''lv1_undocumented_function_115''' destroys a memory region of this type.
* Communication with SYSCON 4
* HV allows GameOS to create objects of this type of size 0 only !!! But it can be exploited with a dangling HTAB entry.


Request:
=== vtable  ===
<pre>
# write packet


# echo "0: 13 01 0000 0000 8014 00000004 0001 0001 33 00 00 00 0000ff1f" | xxd -c256 -r | \
0x00357C48 (3.15)  
      dd of=/dev/ps3sbmmio bs=1 seek=$((0x8d000)) status=noxfer


# dump packet counter
=== Member variables  ===


# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff0)) status=noxfer | hexdump -C
offset 0xA8 - physical address


00000000  00 c0 00 c0                                      |.À.À|
=== Exploiting HV with memory glitching and HV call lv1_undocumented_function_114 ===
00000004


# increment packet counter
Here is a short description of the method i used to exploit HV from GameOS 3.15 and 3.41.


echo "0: 00c1 00c1" | xxd -c256 -r | dd of=/dev/ps3sbmmio bs=1 seek=$((0x8dff0)) status=noxfer
* First i used the Geohot's method to create a dangling HTAB entry.
* Making memory glitch work on GameOS was the largest of my obstacles but i solved it and i'm able to create a dangling HTAB entry from GameOS within 1-3 minutes.
* Then i created many '''Direct Map Memory Region''' objects of size 0 with HV call '''lv1_undocumented_function_114''' and checked if they are within the page to which the dangling HTAB entry points to.
* When i found one such '''Direct Map Memory Region''' object i patched the size of this object to 0x1000. Then i pointed this memory region object to the code of HV call '''lv1_undocumented_function_114''' and patched 4 bytes in this HV call which allows me to create any '''Direct Map Memory Region''' objects without any restrictions.
* Function '''LPAR_construct_direct_mapping_mem_region''' which is used by HV call '''lv1_undocumented_function_114''' has a parameter (register %r9) and when this parameter is not 0 then HV will allow you to create any '''Direct Map Memory Region''' objects without restrictions, but unfortunately the HV call '''lv1_undocumented_function_114''' passes 0 in this parameter, so i just patched it.
* Then i mapped whole HV memory range with the patched HV call '''lv1_undocumented_function_114''' into the address space of GameOS.
* And now you have read/write access to the whole HV.
* $ONY could fix this exploit by disallowing creating of '''Direct Map Memory Region''' objects of size 0, but i know tons of other HV C++ classes which will allow me to exploit the HV in a similar way, so it wouldn't bring $ONY anything :-) And they have to change member variable offsets in those objects to make sure that i cannot patch them easily :-)


# kick packet
== Methods  ==


# echo "0: 00000001" | xxd -c256 -r | dd of=/dev/ps3sbmmio bs=1 seek=$((0x8e100)) status=noxfer
LPAR_get_memory_region_by_start_address - 0x002C7C40 (3.15)  


</pre>
LPAR_get_memory_region_by_address - 0x002C7DA8 (3.15)


Response:
LPAR_mem_addr_to_phys_addr(LPAR id, LPAR address, phys_addr) - 0x002FB8F0 (3.15)


<pre>
LPAR_construct_direct_mapping_mem_region - 0x002D4D04 (3.15)
# dump packet counter


# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff0)) status=noxfer | hexdump -C
= Network Devices  =


00000000 00 c1 00 c1                                      |.Á.Á|
== Ethernet Gelic Device ==
00000004


# dump response packet
device id = 0


# dd if=/dev/ps3sbmmio bs=1 count=24 skip=$((0x8c000)) status=noxfer | hexdump -C
MAC Address: 00:1F:A7:C6:2A:C5


00000000  13 01 00 00 00 00 80 14  00 00 00 04 00 08 00 08  |................|
device memory base address = 0x24003004000 (size = 0x1000)
00000010  00 00 00 00 15 af 47 6b                          |.....¯Gk|
00000018
</pre>


===Ring Buzzer===
== WLAN Gelic Device  ==


* Used by System Manager
device id = 0
* Communication with SYSCON 1


Request:
MAC Address: 02:1F:A7:C6:2A:C5 (locally administered)


<pre>
=== Net Manager  ===
# write packet


# echo "0: 16 01 1620 0000 804d 00000001 0008 0008 20 29 0a 00 000001b6 0000fdcb" | xxd -c256 -r | \
*Net Manager runs in Process 9
      dd of=/dev/ps3sbmmio bs=1 seek=$((0x8d000)) status=noxfer
*It sends commands to '''/dev/sc1''' to reset WLAN Gelic device
*It opens '''/dev/net0''', sets MAC address and writes device firmware '''eurus_fw.bin''' to WLAN device by using '''ioctl''' syscall


# dump packet counter
=== /dev/net0  ===


# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff0)) status=noxfer | hexdump -C
The device supports 3 ioctl commands:


00000000  00 c0 00 c0                                      |.À.À|
*0 - 0x002AC10C (3.15)
00000004
*1 - 0x002AC250 (3.15)
*2 - EURUS_STAT 0x002AC320 (3.15)


# increment packet counter
=== Methods  ===


echo "0: 00c1 00c1" | xxd -c256 -r | dd of=/dev/ps3sbmmio bs=1 seek=$((0x8dff0)) status=noxfer
net_control_cmd_GELIC_LV1_POST_WLAN_CMD - 0x0024A55C (3.15)  


# kick packet
net_control_wlan_cmd_GELIC_EURUS_CMD_ASSOC - 0x00246C78 (3.15)


# echo "0: 00000001" | xxd -c256 -r | dd of=/dev/ps3sbmmio bs=1 seek=$((0x8e100)) status=noxfer
net_control_wlan_cmd_GELIC_EURUS_CMD_START_SCAN - 0x00248A14 (3.15)  


# you should hear a beep
net_control_wlan_cmd_GELIC_EURUS_CMD_SET_WEP_CFG - 0x00249F24 (3.15)


</pre>
net_control_wlan_cmd_GELIC_EURUS_CMD_SET_WPA_CFG - 0x002497B8 (3.15)


Response:
= Event Notification  =


<pre>
*Event Notfication is used e.g. to notify a LPAR about some event, e.g. device interrupt or notify a LPAR about destruction of another LPAR.
# dump packet counter
*For example Process 9 is notified through Event Notification when LPAR 2 is destructed.
*During LPAR construction, Process 9 creates an Outlet object with '''syscall 0x1001A''' and then passes the outlet ID to the '''syscall 0x10009''' that constructs the LINUX LPAR. In this way Process 9 is notified when LINUX LPAR is destructed.


# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff0)) status=noxfer | hexdump -C
== Outlet class  ==


00000000  00 c1 00 c1                                      |.Á.Á|
This is the base Outlet class. There are different types of Outlet and they derive from this base class.  
00000004


# dump response packet
=== vtable  ===


# dd if=/dev/ps3sbmmio bs=1 count=24 skip=$((0x8c000)) status=noxfer | hexdump -C
0x00357DC0 (3.15)  
00000000  16 01 16 20 00 00 80 4d  00 00 00 01 00 01 00 01  |... ...M........|
00000010  00 00 00 00 00 00 fe e3                          |......þã|
00000018


</pre>
=== Member variables  ===


=Isolation=
offset 0x30 - type (8 bytes)
Crossreference: [http://wiki.gitbrew.org/wikibrew/PS3:HvReverseEngineering#Isolation gitbrew.org::Isolation] <br />


==Running Isolated SPE Modules On OtherOS++ Linux==
offset 0x38 - pointer to LPAR that owns this Outlet object


* spp_verifier is a kernel module which shows you how to run isolated SPE modules on OtherOS++ Linux.
offset 0x48 - outlet id (8 bytes)
* It decrypts default.spp profile
* Tested on 3.41 and 3.55.
* You can modify it easily to run other SPE modules.


<pre>
offset 0x90 - VIRQ assigned to this Outlet object (4 bytes)
root@debian-hdd:/home/glevand/spp_verifier# cat spp_verifier_355.self > /proc/spp_verifier/spu
root@debian-hdd:/home/glevand/spp_verifier# cat default_355.spp > /proc/spp_verifier/profile
root@debian-hdd:/home/glevand/spp_verifier# echo 1 > /proc/spp_verifier/run
root@debian-hdd:/home/glevand/spp_verifier# cat /proc/spp_verifier/debug


PPE id (0x0000000000000001) VAS id (0x0000000000000002)
== Event Receive Port class  ==
lv1_construct_logical_spe (0x00000000)
SPE id (0x000000000000002b)
lv1_undocumented_function_209 (0x00000000)
shadow execution status (0x0000000000000002)
lv1_get_spe_interrupt_status(1) (0x00000000)
interrupt status 1 (0x0000000000000000)
sleep
shadow execution status (0x0000000000000002)
lv1_get_spe_interrupt_status(1) (0x00000000)
interrupt status 1 (0x0000000000000001)
ea (0xc000000002920000) esid (0xc000000008000000) vsid (0x0000408f92c94500)
lv1_undocumented_function_62 (0x00000000)
lv1_clear_spe_interrupt_status(1) (0x00000000)
lv1_undocumented_function_168 (0x00000000)
sleep
shadow execution status (0x0000000000000007)
lv1_get_spe_interrupt_status(1) (0x00000000)
interrupt status 1 (0x0000000000000000)
lv1_get_spe_interrupt_status(2) (0x00000000)
interrupt status 2 (0x0000000000000000)
out interrupt mbox (0x0000000000000002)
out interrupt mbox (0x0000000000000002)
lv1_undocumented_function_167 (0x00000000)
lv1_clear_spe_interrupt_status (0x00000000)
lv1_undocumented_function_200 (0x00000000)
sleep
shadow execution status (0x000000000000000b)
lv1_get_spe_interrupt_status(1) (0x00000000)
interrupt status 1 (0x0000000000000000)
shadow execution status (0x000000000000000b)
problem status (0x01000082)
lv1_destruct_logical_spe (0x00000000)


root@debian-hdd:/home/glevand/spp_verifier# hexdump -C /proc/spp_verifier/profile | less
*This type of Outlet is created e.g. in '''lv1_construct_event_receive_port''' and in '''syscall 0x1001A'''.  
...
*HV calls '''lv1_connect_irq_plug''' and '''lv1_connect_irq_plug_ext''' assigns a VIRQ to Event Receive Port object.
...
 
00000200 00 02 00 05 00 00 20 a0  00 00 00 01 00 03 00 00  |......  ........|
=== vtable ===
00000210  00 00 00 00 00 00 00 01  00 00 00 0e 00 00 00 00  |................|
 
00000220  00 00 02 88 00 00 00 01  10 70 00 00 01 00 00 01 |.........p......|
0x00357E88
00000230  00 00 00 00 00 00 00 00  53 43 45 5f 43 45 4c 4c  |........SCE_CELL|
 
00000240  4f 53 5f 50 4d 45 00 00  00 00 00 00 00 00 00 00  |OS_PME..........|
== VUART Outlet ==
00000250  00 00 00 00 00 00 00 00  00 00 00 06 00 00 02 50  |...............P|
 
00000260  10 70 00 00 01 00 00 01  2f 66 6c 68 2f 6f 73 2f  |.p....../flh/os/|
*HV supports only one VUART Outlet per LPAR
00000270 74 68 69 73 5f 69 73 5f  64 75 6d 6d 79 00 00 00  |this_is_dummy...|
*'''lv1_configure_virtual_uart_irq''' constructs a VUART Outlet object and passes the address of LPAR's VUART IRQ Bitmap to HV
00000280  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
 
...
=== vtable ===
...
 
</pre>
0x00357DC0
 
=== VUART IRQ Bitmap  ===


==Using metldr On OtherOS++ Linux==
*At address 0x38(LPAR ptr) + 0x158 is the VUART IRQ Bitmap owned by HV for LPAR (4 * 8 bytes = 256 bits)
*At address 0x38(LPAR ptr) + 0x150 is stored the physical address of LPAR's VUART IRQ Bitmap that was passed to '''lv1_configure_virtual_uart_irq'''
*When a VUART interrupt is generated by HV then first the VUART IRQ Bitmap owned by HV is updated and then this bitmap is copied to LPAR's VUART IRQ Bitmap, so VUART IRQ Bitmap is stored twice, once in HV and once in LPAR, just like IRQ State Bitmap.
*VUART IRQ Bitmap is not allowed to cross page boundary of LPAR memory region where it is stored. HV checks it and makes sure that it doesn't happen.
*'''GameOS 3.41''' VUART IRQ bitmap is at address '''0x80000000003556E8''' and of size '''32 bytes (256 bits, each bit corresponds to a VUART port)'''.
*'''GameOS 3.15''' VUART IRQ bitmap is at address '''0x8000000000354768'''.


* spp_verifier_direct is a kernel module which shows you how to run isolated SPE modules on OtherOS++ Linux by using metldr directly.
= Logical PPE  =
* It decrypts default.spp profile.
* Tested on 3.41 and 3.55.
* You can modify it easily to run other SPE modules.


<pre>
*Logical PPE is used for interrupt management of LPAR.
root@debian-hdd:/home/glevand/spp_verifier_direct# insmod ./spp_verifier_direct.ko
*A Logical PPE object is created in '''syscall 0x10005'''. It' used e.g. in Process 9 during LPAR construction.  
root@debian-hdd:/home/glevand/spp_verifier_direct# cat metldr > /proc/spp_verifier_direct/metldr
*'''syscall 0x10007''' activates a Logical PPE object
root@debian-hdd:/home/glevand/spp_verifier_direct# cat isoldr_355 > /proc/spp_verifier_direct/isoldr
*0x67F0(HSPRG0) - pointer to currently active Logical PPE object (in HV dump it points to Linux PPE object naturally because the dump was made on Linux, so Linux LPAR was active at that time)  
root@debian-hdd:/home/glevand/spp_verifier_direct# cat RL_FOR_PROGRAM_355.img > /proc/spp_verifier_direct/rvkprg
*E.g. '''lv1_get_logical_ppe_id''', '''lv1_start_ppe_periodic_tracer''' and '''lv1_set_ppe_periodic_tracer_frequency''' grab the currently active Logical PPE object
root@debian-hdd:/home/glevand/spp_verifier_direct# cat EID0 > /proc/spp_verifier_direct/eid0
root@debian-hdd:/home/glevand/spp_verifier_direct# cat spp_verifier_355.self > /proc/spp_verifier_direct/spu
root@debian-hdd:/home/glevand/spp_verifier_direct# cat default_355.spp > /proc/spp_verifier_direct/profile
root@debian-hdd:/home/glevand/spp_verifier_direct# echo 1 > /proc/spp_verifier_direct/run
root@debian-hdd:/home/glevand/spp_verifier_direct# cat /proc/spp_verifier_direct/debug
PPE id (0x0000000000000001) VAS id (0x0000000000000002)
lv1_construct_logical_spe (0x00000000)
SPE id (0x0000000000000033)
lv1_enable_logical_spe (0x00000000)
lv1_set_spe_interrupt_mask(0) (0x00000000)
lv1_set_spe_interrupt_mask(1) (0x00000000)
lv1_set_spe_interrupt_mask(2) (0x00000000)
lv1_set_spe_privilege_state_area_1_register (0x00000000)
ea (0xc000000002680000) esid (0xc000000008000000) vsid (0x0000408f92c94500)
lv1_get_spe_interrupt_status(0) (0x00000000)
lv1_get_spe_interrupt_status(1) (0x00000000)
lv1_get_spe_interrupt_status(2) (0x00000000)
sleep
lv1_get_spe_interrupt_status(0) (0x00000000)
lv1_get_spe_interrupt_status(1) (0x00000000)
lv1_get_spe_interrupt_status(2) (0x00000000)
out interrupt mbox (0x0000000000000001)
lv1_clear_spe_interrupt_status(2) (0x00000000)
transferring EID0, ldr args and revoke list to LS
waiting until MFC transfers are finished
MFC transfers done
out mbox (0x00000001)
sleep
lv1_get_spe_interrupt_status(0) (0x00000000)
lv1_get_spe_interrupt_status(1) (0x00000000)
lv1_get_spe_interrupt_status(2) (0x00000000)
out interrupt mbox (0x0000000000000002)
lv1_clear_spe_interrupt_status(2) (0x00000000)
out mbox (0x00000002)
lv1_clear_spe_interrupt_status(2) (0x00000000)
sleep
lv1_get_spe_interrupt_status(0) (0x00000000)
lv1_get_spe_interrupt_status(1) (0x00000000)
lv1_get_spe_interrupt_status(2) (0x00000000)
problem status (0x01000082)
lv1_destruct_logical_spe (0x00000000)


root@debian-hdd:/home/glevand/spp_verifier_direct# hexdump -C /proc/spp_verifier_direct/profile | less
== vtable ==
...
...
00000200 00 02 00 05 00 00 20 a0  00 00 00 01 00 03 00 00  |......  ........|
00000210  00 00 00 00 00 00 00 01  00 00 00 0e 00 00 00 00  |................|
00000220  00 00 02 88 00 00 00 01  10 70 00 00 01 00 00 01  |.........p......|
00000230  00 00 00 00 00 00 00 00  53 43 45 5f 43 45 4c 4c  |........SCE_CELL|
00000240  4f 53 5f 50 4d 45 00 00  00 00 00 00 00 00 00 00  |OS_PME..........|
00000250  00 00 00 00 00 00 00 00  00 00 00 06 00 00 02 50  |...............P|
00000260  10 70 00 00 01 00 00 01  2f 66 6c 68 2f 6f 73 2f  |.p....../flh/os/|
00000270  74 68 69 73 5f 69 73 5f  64 75 6d 6d 79 00 00 00  |this_is_dummy...|
00000280  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
...
...
</pre>


= Gelic Device =
0x00357DF0 (3.15)
Crossreference: [http://wiki.gitbrew.org/index.php/PS3:HvReverseEngineering#Gelic_Device gitbrew.org::Gelic Device] <br />


==sys.hw.config==
== Member variables  ==


* Value of the loader parameter "sys.hw.config" controls if Gelic WLAN is enabled or not.
offset 0x90 - pointer to an object that contains VIRQ-Outlet mapping table for thread 0
* Value of the loader parameter "sys.hw.config" is stored in the repository node "sys.hw.config" too.
* If bit '''0x40000''' is set then LV1 allows using Gelic WLAN interface from LV2.
* Value on my PS3 slim '''0x4e00ffff0a03bc3c''' with Gelic WLAN interface disabled. As you can see, the Gelic WLAN interface is disabled and LV1 doesn't allow using of LV1 calls 196 and 195. It returns LV1_CONDITION_NOT_SATISFIED.
* GameOS checks bit '''0x40000''' of the repository node "sys.hw.config" during network initialization and if it's set then LV2 initializes Gelic WLAN interface.
* Check your "sys.hw.config" repository node and if bit '''0x40000''' is set then you are a lucky owner of a PS3 model with the old WLAN interface.
* '''On newer PS3 models, GameOS uses USB interface to communicate with WLAN.'''
* On PS3 models, where bit '''0x40000''' is NOT set in "sys.hw.config" repository node, the new USB interface is used.


''Note:[http://www.ps3devwiki.com/index.php?title=Wifi old vs. new]: Old == CECHA up to CECHK, New == CECHL and later''
offset 0x98 - pointer to an object that contains VIRQ-Outlet mapping table for thread 1


== Control Interface ==
== Objects  ==


HV calls 195 and 196 are used by GameOS to send commands to Gelic device directly.
Here is the list of Logical PPE objects i found in HV 3.15.  


=== lv1_undocumented_function_196 ===
{| class="wikitable FCK__ShowTableBorders"
|-
! Address in HV dump
! LPAR id
! PPE id
|-
| 0x0069C7F0
| 1
| 1
|-
| 0x007A8900
| 2
| 1
|}


==== Parameters ====
== Virtual IRQ - Outlet Mapping  ==


r3 - LPAR address of data buffer
*HV maintains 2 tables per PPE that map a VIRQ to an Outlet object.
*The table has 256 entries and is indexed by VIRQ.
*Each entry is a pointer to Outlet object.
*Each Logical PPE object has 2 tables, one for each thread of Cell CPU.


r4 - size of data buffer
=== LPAR 1 PPE 1 Thread 0  ===


r5 - must be 0
0x0069C990 (3.15) - address of VIRQ-Outlet table for '''LPAR 1 PPE 1 Thread 0''' (not empty)


=== lv1_undocumented_function_195 ===
{| class="wikitable FCK__ShowTableBorders"
|-
! VIRQ
! Address of Outlet object in HV dump
! Description
|-
| 58
| 0x00090D10
| -
|-
| 59
| 0x006BAC50
| -
|-
| 60
| 0x006B3ED0
| FLASH storage device / Storage device notification for LPAR 1
|-
| 61
| 0x00697E70
| VUART interrupts
|-
| 62
| 0x001C8F20
| -
|}


==== Parameters ====
=== LPAR 1 PPE 1 Thread 1  ===


r3 - command (16 bit value)
0x0069D9B0 (3.15) - address of VIRQ-Outlet table for '''LPAR 1 PPE 1 Thread 1''' (empty)  


r4 - command data size
=== LPAR 2 PPE 1 Thread 0  ===


r5 - must be 0
0x000A06B0 (3.15) - address of VIRQ-Outlet table for '''LPAR 2 PPE 1 Thread 0''' (not empty)


=== Data Buffer ===
{| class="wikitable FCK__ShowTableBorders"
 
|-
* Data Buffer passed to HV call 196 is divided into 2 parts.
! VIRQ
* The first 0x800 bytes are for sending and receiving command data
! Address of Outlet object in HV dump
* The remaining 0x800 bytes are for event notification.
! Description
 
|-
=== Command Data Buffer ===
| 20
 
| 0x003AA210
* Every command data sent to Gelic device contains header of size '''0xC'''
| -
* After the header follows the command data
|-
* After the Gelic device processed the command, it notifies LV2 kernel about command completion by sending an interrupt
| 21
 
| 0x003AFEC0
==== Header ====
| -
 
|-
* Size is '''0xc'''.
| 22
* Byte order is little-endian.
| 0x001FC010
* Header data in a request command buffer is always all 0s.
| -
 
|-
0x0 - command = request command + 1 (2 bytes)
| 23
 
| 0x003A8E50
0x4 - result, 0x1 - success ??? 0x2 - buffer too small ??? (2 bytes)
| -
 
|-
0x6 - body size (2 bytes)
| 24
 
| 0x001FFED0
=== Event Data Buffer ===
| SPE 0 Class 0 Interrupt
 
|-
* The Gelic device notifies LV2 kernel by sending an interrupt when new events are available
| 25
* Event Data Buffer has 8 bytes header
| 0x003AE160
* The remaining bytes are divided into event slots
| SPE 0 Class 1 Interrupt
* Each event slot is of size 64 bytes
|-
* Events are in little-endian format
| 26
 
| 0x003AE350
==== Header ====
| SPE 0 Class 2 Interrupt
 
|-
offset 0x0 - GET index (4 bytes)
| 27
 
| 0x003AB100
offset 0x4 - PUT index (4 bytes)
| SPE 1 Class 0 Interrupt
 
|-
* GET index is updated by Gelic driver. The Gelic driver reads events beginning with the event slot at index GET.
| 28
* PUT index is the index of event entry where next Gelic event will be stored by the Gelic device.
| 0x003AB2F0
* If GET index is equal to PUT index then there are no Gelic events.
| SPE 1 Class 1 Interrupt
 
|-
=== GameOS ===
| 29
 
| 0x003AB4E0
* LV2 syscall 726 sends Gelic device command and blocks until a response from the Gelic device arrives
| SPE 1 Class 2 Interrupt
* LV2 kernel uses this LV1 interface to send commands to Gelic device internally too, probably for wireless controllers and Wake On WLAN.
|-
* The system call 726 is used heavily by VSH.
| 30
 
| 0x003AA6A0
==== Parameters ====
| SPE 2 Class 0 Interrupt
 
|-
r3 - command (16 bits)
| 31
 
| 0x003AA890
r4 - effective address of command data buffer
| SPE 2 Class 1 Interrupt
 
|-
r5 - size of command data buffer
| 32
 
| 0x003AAA80
=== Commands ===
| SPE 2 Class 2 Interrupt
 
|-
====Unknown (0x1)====
| 33
 
| 0x003B44A0
* Used by VSH.
| SPE 3 Class 0 Interrupt
* Command buffer size is '''0x10'''.
|-
* Used in AP mode.
| 34
* Enables AP mode ???
| 0x003B4690
 
| SPE 3 Class 1 Interrupt
====Get AP SSID (0x3)====
|-
 
| 35
* Command buffer is of size '''0x30'''.
| 0x003B4AD0
* Returns SSID in AP mode.
| SPE 3 Class 2 Interrupt
 
|-
offset 0xC - SSID (32 bytes)
| 36
 
| 0x003B5300
====Set AP SSID (0x5)====
| SPE 4 Class 0 Interrupt
 
|-
* Used by VSH.
| 37
* Command buffer is of size '''0x30'''.
| 0x003B54F0
* Sets SSID in AP mode.
| SPE 4 Class 1 Interrupt
 
|-
offset 0xC - SSID (32 bytes)
| 38
 
| 0x003B56E0
====Get Channel (0xf)====
| SPE 4 Class 2 Interrupt
 
|-
* Used by VSH.
| 39
* Command buffer is of size '''0x31'''.
| 0x003AE7C0
* Data is returned from the device.
| SPE 5 Class 0 Interrupt
* Returns list of channels and active channel.
|-
 
| 40
offset 0x2F - active channel (2 bytes)
| 0x003AE9B0
 
| SPE 5 Class 1 Interrupt
====Set Channel (0x11)====
|-
 
| 41
* Used by VSH.
| 0x003AEBA0
* Command buffer size is '''0xd'''
| SPE 5 Class 2 Interrupt
* Valid channels: '''0 - 13'''. '''0''' means that the channel is selected '''automatically'''.
|-
 
| 42
offset 0xC - channel (1 byte)
| 0x003B2040
 
| Storage device notification for LPAR 2
====Unknown (0x27)====
|-
| 43
| 0x003AEE30
| VUART interrupts
|-
| 44
| 0x001FEAA0
| -
|-
| 45
| 0x001FEED0
| HDD storage device
|-
| 46
| 0x003B5E20
| -
|-
| 47
| 0x003B7040
| -
|-
| 48
| 0x003B9B40
| -
|-
| 49
| 0x003B3A40
| -
|-
| 50
| 0x003BACA0
| Gelic device
|-
| 51
| 0x003BAE10
| UNKNOWN storage device
|-
| 52
| 0x003B8350
| -
|}


* Command buffer size is '''0xF'''.
=== LPAR 2 PPE 1 Thread 1  ===


====Set Antenna (0x29)====
0x007A89E0 (3.15) - address of VIRQ-Outlet table for '''LPAR 2 PPE 1 Thread 1''' (not empty)  


* Command buffer size is '''0xe'''
{| class="wikitable FCK__ShowTableBorders"
|-
! VIRQ
! Address of Outlet object in HV dump
! Description
|-
| 16
| 0x003B2480
| -
|-
| 17
| 0x003B2590
| -
|-
| 18
| 0x003B26A0
| -
|-
| 19
| 0x003B27B0
| -
|}


offset 0xC - 0,1 or 2 (1 byte)
== IRQ State Bitmap  ==


offset 0xD - 2 (1 byte)
*There is one IRQ State Bitmap (256 bits = 32 bytes) per thread of Logical PPE
*'''HSPRG0 value is per thread''', so there are 2 HSPRG0 values in HV dump&nbsp;!!!
*The IRQ State Bitmap of a thread is stored at -0x68E0(HSPRG0)
*When an Event or Interrupt happens then the bitmap at 0x68E0(HSPRG0) is updated
*The physical address of '''LPAR's IRQ State Bitmap''' of thread is stored at offset -0x68C0(HSPRG0)
*The address of LPAR's IRQ State Bitmap is passed to Hypervisor through HV call '''lv1_configure_irq_state_bitmap'''
*'''lv1_detect_pending_interrupts''' returns value of current IRQ State Bitmap.
*The IRQ State Bitmap is updated if an Outlet object is assigned to VIRQ and when Outlet generates an event
*After IRQ State Bitmap update, it's copied to LPAR's IRQ State Bitmap and a hardware interrupt is generated so that LPAR can read it's IRQ State Bitmap and handle interrupts.
*So, IRQ State Bitmap is stored twice, once in HV and once in LPAR, just like VUART IRQ Bitmap.
*'''GameOS''' IRQ state bitmap is stored at address '''SPRG0 + 0x1C0 and of size 64 bytes (256 bits state + 256 bits mask) per thread of Cell CPU'''. So there are 2 IRQ state bitmaps.


====Set AP WEP Configuration (0x5b)====
0x8941FC0 - physical address of LPAR's IRQ State Bitmap for Thread 0 of LINUX LPAR


* Used by VSH.
0x8948FC0 - physical address of LPAR's IRQ State Bitmap for Thread 1 of LINUX LPAR
* Command buffer is of size '''0x56'''.
* Sets WEP security type and WEP key.
* Security types: 0 - none, 1 - wep64, 2 - wep128


offset 0xE - security mode: 0 - none, 1 - wep64, 2 - wep128 (1 byte)
= System Controller (SC or SYSCON) =


offset 0x10 - WEP key (64 bytes)
*Data received from SC is sent to a VUART
*'''lv1_get_rtc''' and '''syscall 0x10036''' communicate with '''SC VUART 4'''.


====Unknown (0x61)====
=== VUART Table  ===


* Used by VSH.
*Address of SC VUART Table - 0x00610410 (3.15).  
* Command buffer size is '''0xd'''
*There are 5 VUARTs for SC in HV 3.15


====Unknown (0x65)====
Here is the SC VUART table from HV 3.15:


* Used by VSH.
{| class="wikitable FCK__ShowTableBorders"
* Command  uffer size is '''0xd'''.
|-
* Used in AP mode.
! Index
! Address of VUART object in HV dump
! Description
|-
| 0
| 0x0060FD20
| This VUART is connected with the '''VUART 0 (/dev/sc0)''' of LPAR 1
|-
| 1
| 0x0060FE20
| This VUART is connected with the '''VUART 1 (/dev/sc1)''' of LPAR 1
|-
| 2
| 0x0060FF20
| This VUART is not connected to some peer VUART but i guess that it should be connected to '''VUART 2 (/dev/sc2)''' of LPAR1
|-
| 3
| 0x006124E0
| This VUART is connected with the '''VUART 3 (/dev/sc3)''' of LPAR 1
|-
| 4
| 0x00612DF0
| '''lv1_get_rtc''' and '''syscall 0x10036''' communicate with this VUART.
|}


====Get Eurus Firmware Version (0x99)====
== Interrupt Handling  ==


* Used by VSH.
spider_sc_interrupt_handler - 0x0020A68C (3.15)


Here is the response on my PS3 Slim:
== Methods ==
<pre>
00000000: 4a 55 50 49 54 45 52 2d 54 57 4f 2d 46 57 2d 32 |JUPITER-TWO-FW-2|
00000010: 30 2e 30 2e 31 32 2e 70 30 28 4a 61 6e 20 31 39 |0.0.12.p0(Jan 19|
00000020: 20 32 30 31 30 20 32 31 3a 32 30 3a 35 33 29 00 | 2010 21:20:53).|
00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00      |.............. |
</pre>


====Get AP Operating Mode (0xb7)====
sc_vuart_4_get_peer_vuart - 0x002ED384 (3.15)  


* Used by VSH.
sc_send - 0x0020A908 (3.15)
* Command buffer size is '''0x10'''
* Returns AP operating mode (mixed, 11b or 11g).


offset 0xC - opmode: 0 - 11b, 1 - 11g, 2 - 11bg (4 bytes)
sc_receive - 0x0020A354 (3.15)


====Set AP Operating Mode (0xb9)====
sc_vuart_rx_trigger_callback - 0x002ED470 (3.15)


* Used by VSH.
== lv1_get_rtc  ==
* Command buffer size is '''0x10'''
* Sets AP operating mode (mixed, 11b or 11g).


offset 0xC - opmode: 0 - 11b, 1 - 11g, 2 - 11bg (4 bytes)
*'''lv1_get_rtc''' communicates with SC VUART 4.
*20 bytes are written to the peer VUART of SC VUART 4.
*After a request is sent to SC VUART 4, '''lv1_get_rtc''' busy waits until SC VUART 4 receive data buffer is not empty.
*When SC VUART 4 receive data buffer is not empty, '''lv1_get_rtc''' reads 24 bytes from the VUART.


====Unknown (0xc5)====
== SYSCON Protocol ==


* Used by VSH.
* I was able to enable SYSCON Manager debug messages in HV Process 5
* Command buffer size is '''0x10'''.
* Messages sent to SYSCON are at least '''0x10''' bytes of size. SC VUARTs check it before sending the messages to SYSCON.
* Used in AP mode.
* The header size of the SYSCON messages is '''0x10''' bytes.


offset 0xC - ??? (4 bytes)
=== Packet Header ===


====Set AP WPA AKM Suite (0xc9)====
* Packet header is of size '''0x10''' bytes.
* At offset '''0x6''' of SYSCON packet is the header checksum which is of size '''2''' bytes.
* '''The header checkum is just a sum of first 6 header bytes and 0x8000 constant'''
* The '''2nd byte''' in every SYSCON message has to be '''1''' or else the function '''sc_send''' fails.
* The '''word''' at offset '''0x8''' is the '''SC VUART index'''.
* The '''half-words''' at offset '''0xC''' and '''0xE''' have to be equal or the function '''sc_send''' fails.


* Used by VSH.
<pre>
* Command buffer size is '''0x11'''.
struct sc_hdr
* Sets WPA AKM suite in AP mode.
{
    uint8_t field0;
    uint8_t field1;          /* always 1 */
    uint8_t field2[4];
    uint16_t cksum;          /* header checksum */
    uint32_t index;          /* syscon index (0 - /dev/sc0, 1 - /dev/sc1, 2 - /dev/sc2, 3 - /dev/sc3) */
    uint16_t size1;          /* body size */
    uint16_t size2;          /* body size */
};
</pre>


offset 0xC - AKM suite (4 bytes)
==== Calculating Packet Header Checksum ====


====Set AP WPA Group Cipher Suite (0xcf)====
<pre>
/* calculating SC packet header checksum */


* Used by VSH.
/*
* Command buffer size is '''0x10'''
* sc_hdr_cksum
* Used in AP + WPA mode.
*/
uint16_t sc_hdr_cksum(struct sc_hdr *sc_hdr)
{
    uint8_t *ptr;
    uint32_t sum;


offset 0xC - group cipher suite: group (4 bytes)
    ptr = (uint8_t *) sc_hdr;
    sum = 0;


====Set AP WPA PSK Binary (0xd3)====
    for (i = 0; i < 6; i++)
        sum += *ptr++;


* Used by VSH.
    sum += 0x8000;
* Command buffer size is '''0x4c'''
* Sets WPA PSK binary


offset 0xC - PSK (64 bytes)
    return sum & 0xffff;
}


====Set AP WPA Reauthentication Timeout (0xd5)====
struct sc_hdr sc_hdr;


* Used by VSH.
memset(&sc_hdr, 0, sizeof(sc_hdr));
* Command buffer size is '''0x10'''
* Sets WPA Reauth timeout value in AP WPA mode.
* VSH uses 36000 as timeout.


offset 0xC - timeout value in seconds (2 bytes)
sc_hdr.cksum = sc_hdr_cksum(sc_hdr);


====Unknown (0x127)====
/* fill sc header here */


* Used by VSH.
sc_hdr.cksum = sc_hdr_cksum(sc_hdr);
* Command buffer size is '''0x10'''.
</pre>
* Used in AP + WPA mode.


====Unknown (0x12b)====
=== Packet Body ===


* Used by VSH.
* Packet body follows packet header
* Command buffer size is '''0x10'''.
* Packet body size is stored at offset '''0xC''' and '''0xE''' in packet header and is of size 2 bytes
* Used in AP + WPA mode.


====Set AP WPA PSK Passphrase (0x17d)====
=== Reading SYSCON EPROM (NVS Service) ===


* Used by VSH.
Here is a command which is sent to SYSCON to read 1 byte of EPROM at offset 0x48C07 (Product Mode):
* Command buffer size is '''0x2D'''
0x14 <span style="background:#00FF00">0x01</span> 0x00 0x00 0x00 0x00 <span style="background:#FF0000">0x80 0x15</span> <span style="background:#FFFF00">0x00 0x00 0x00 0x00</span> <span style="background:#00FFFF">0x00 0x04</span> <span style="background:#00FFFF">0x00 0x04</span> 0x20 0x02 0x07 0x01


offset 0xD - passphrase (32 bytes)
And here is the response to the above request:
0x14 <span style="background:#00FF00">0x01</span> 0x00 0x00 0x00 0x00 <span style="background:#FF0000">0x80 0x15</span> <span style="background:#FFFF00">0x00 0x00 0x00 0x03</span> <span style="background:#00FFFF">0x00 0x05</span> <span style="background:#00FFFF">0x00 0x05</span> 0x00 0x02 0x07 0x01 0xff


====Set AP WPA Pairwise Cipher Suite (0x1bf)====
=== PCI Bus Power ===


* Used by VSH.
* '''Used by PS2EMU System Manager in HV process 9 when PS2 EMU is booted'''
* Command buffer size is '''0x11'''
* Used in AP + WPA mode.


offset 0xC - pairwise cipher suite (4 bytes)
==== PCI Bus Power On ====


offset 0x10 - ??? (1 byte)
'''Request to SC1:'''
0x10 0x01 0x00 0x00 0x00 0x00 0x80 0x11 0x00 0x00 0x00 0x00 0x00 0x02 0x00 0x02 0x31 0x01


====Unknown (0x1d9)====
==== PCI Bus Power Off ====


* Used by VSH.
'''Request to SC1:'''
* Command buffer size is '''0x10'''
0x10 0x01 0x00 0x00 0x00 0x00 0x80 0x11 0x00 0x00 0x00 0x00 0x00 0x02 0x00 0x02 0x31 0x00


====Unknown (0x1dd)====
=== Ring Buzzer ===


* Used by VSH.
'''Request:'''
* Command buffer size is '''0xd'''
0x16 0x01 0x00 0x00 0x00 0x00 0x80 0x17 0x00 0x00 0x00 0x00 0x00 0x08 0x00 0x08 0x20 0x00 0x00 0x00 0x00 0x00 0x00 0x00


====Unknown (0x1ed)====
=SYSCON=
Crossreference: [http://wiki.gitbrew.org/index.php/PS3:HvReverseEngineering#SYSCON gitbrew.org::SYSCON] <br />


* Used by VSH.
SYSCON MMIO registers can be accessed on Linux with a driver using lv1_undocumented_function_114, e.g. '''ps3sbmmio'''.
* Command buffer is of size '''0x17'''.
Use ps3sbmmio device driver carefully, an access at some addresses could shutdown your PS3.
* Rate control ???


====Get Eurus HW Revision (0x1fb)====
==Packet Header==


* Command buffer size is '''0x10'''.
* Size is '''0x10'''.


====Associate (0x1001)====
<pre>
struct sc_hdr {
    uint8_t service_id;
    uint8_t version;              /* must be 1 !!! */
    uint16_t transaction_id;      /* returned in response */
    uint8_t res[2];
    uint16_t cksum;              /* checksum of first 6 header bytes */
    uint32_t index;              /* SYSCON index: 0-4 */
    uint16_t payload_size[2];    /* body size */
};
</pre>


* Used by VSH.
==Sending Packets==
* Used by LV1 on FAT models.
* Command buffer size is '''0xd'''
* Data passed to Gelic device is all 0s


====Get Common Configuration (0x1003)====
* Before sending new packet to SYSCON, the Hypervisor checks 2 words at offsets 0x2400008DFF0 and 0x2400008CFF4.
* The Hypervisor busy waits until (value + 1) at offset 0x2400008CFF4 is NOT equal to value at offset 0x2400008DFF0.
* The packet is sent with 4 byte transfers.
* First, the Hypervisor sends the header of the packet, 4 word transfers.
* The header is written beginning at the address 0x2400008D000.
* After that the Hypervisor sends the body of the packet, with 4 byte transfers too.
* The body is written beginning at the address 0x2400008D010.
* If the packet size is NOT divisible by 4 then the Hypervisor sends the remaining bytes (at most 3) as a word padded with 0s.
* After the packet body was written, the Hypervisor calculates checksum of the whole packet and writes it at the address where the last word of packet body was written + 4.
<pre>
uint32_t cksum = 0;


* Used by VSH.
for (i = 0; i < packet_size; i++)
* Used by LV1 on FAT models.
    cksum -= packet[i];
* Command buffer size is '''0x18'''
* Data passed to Gelic device is all 0s


====Set Common Configuration (0x1005)====
cksum = cksum & 0xffff;
 
</pre>
* Used by VSH.
* After the packet checksum was written, the Hypervisor reads the value at offset 0x2400008DFF0, modifies it and stores back:
* Used by LV1 on FAT models.
<pre>
* Command buffer size is '''0x18'''
value = value + 1;
* Hmm, VSH always removes QOS bit from capability, that means Jupiter doesn't support QOS ???
value &= 0xffff;
value = (value << 16) | value;
</pre>
* To notify the SYSCON about the new packet, the Hypervisor writes 0x1 to address 0x2400008E100.


offset 0xC - BSS type: 0 - infrastructure, 1 - ???, 2 - adhoc (1 byte)
==Receiving Packets==


offset 0xD - authentication mode: 0 - open, 1 - shared key
* The Hypervisor installs an interrupt handler for the SYSCON.
* First, the Hypervisor reads a word from address 0x2400008E000, ors it with 0xFFFFFFFD and writes the value back.
* Then, the Hypervisor reads a word from address 0x2400008E004 and tests if bit 0x2 is set or not. The bit 0x2 should be not 0 or else the Hypervisor panics.
* After that, the Hypervisor reads a word at address 0x2400008CFF0 and 0x2400008DFF4. If there is a new packet pending from SYSCON, then the (value + 1) at 0x2400008CFF0 should be equal the value at 0x2400008DFF4.
* The Hypervisor reads the header of the packet beginning at the address 0x2400008C000.
* The header is read with 4 word transfers by the Hypervisor.
* The byte at offset 1 in the packet header must be 1 or else the Hypervisor discards the packet as invalid.
* The Hypervisor calculates the checksum of the packet header and checks it with the checksum stored in the header. If they don't match then the Hypervisor discards the packet.
* The Hypervisor reads the body of the packet beginning at the address 0x2400008C010.
* The header and the body of the received packet can be read as many times as you want !!! They remain until next SYSCON packet is received
which gives us the possibility to communicate with SYSCON on Linux easily :)


offset 0xE - opmode: 0 - 11bg, 1 - 11b, 2 - 11g (1 byte)
==Test==


offset 0xF - ??? (1 byte)
'''1. Before sending SYSCON packet''':
<pre>
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8cff4)) status=noxfer | hexdump -C


offset 0x10 - BSSID (6 bytes)
00000000  01 18 01 18                                      |....|
00000004


offset 0x16 - capability (2 bytes)
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff0)) status=noxfer | hexdump -C


====Get WEP Configuration (0x1013)====
00000000  01 18 01 18                                      |....|
00000004


* Used by VSH.
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8cff0)) status=noxfer | hexdump -C
* Used by LV1 on FAT models.
* Command buffer size is '''0x50'''
* Data passed to Gelic device is all 0s


====Set WEP Configuration (0x1015)====
00000000  01 24 01 24                                      |.$.$|
00000004


* Used by VSH.
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff4)) status=noxfer | hexdump -C
* Used by LV1 on FAT models.
* Command buffer size is '''0x50'''


====Get WPA Configuration (0x1017)====
00000000  01 24 01 24                                      |.$.$|
00000004
</pre>


* Used by VSH.
'''2. SYSCON packet was sent by using ps3dm_scm read_eprom.'''
* Used by LV1 on FAT models.
* Command buffer size is '''0x5b'''
* Data passed to Gelic device is all 0s


====Set WPA Configuration (0x1019)====
'''3. After sending SYSCON packet''':
<pre>
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8cff4)) status=noxfer | hexdump -C


* Used by VSH.
00000000  01 19 01 19                                      |....|
* Used by LV1 on FAT models.
00000004
* Command buffer size is '''0x5b'''


offset 0xE - security type: 0 - WPA, 1 - RSNA (1 byte)
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff0)) status=noxfer | hexdump -C


offset 0xF - psk type: 0 - hex, 1 - bin (1 byte)
00000000  01 19 01 19                                      |....|
00000004


offset 0x10 - psk key: hex or bin (64 bytes)
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8cff0)) status=noxfer | hexdump -C


offset 0x50 - group cipher suite: 0x0050f202 - WPA TKIP, 0x0050f204 - WPA AES, 0x000fac02 - RSNA TKIP, 0x000fac04 - RSNA CCMP (4 bytes)
00000000  01 25 01 25                                      |.%.%|
00000004


offset 0x54 - pairwise cipher suite: 0x0050f202 - WPA TKIP, 0x0050f204 - WPA AES, 0x000fac02 - RSNA TKIP, 0x000fac04 - RSNA CCMP (4 bytes)
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff4)) status=noxfer | hexdump -C


offset 0x58 - AKM suite: 0x0050f202 - WPA PSK, 0x000fac02 - RSNA PSK (4 bytes)
00000000  01 25 01 25                                      |.%.%|
00000004
</pre>


'''See IEEE 802.11 specification for more details about cipher/AKM suites
'''4. Received Header'''
'''


802.11 spec: [http://standards.ieee.org/getieee802/download/802.11-2007.pdf]
<pre>
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=16 skip=$((0x8c000)) status=noxfer | hexdump -C


====Unknown (0x1025)====
00000000  14 01 00 00 00 00 80 15  00 00 00 03 00 05 00 05  |................|
00000010


* Used by VSH.
</pre>
* Command buffer size is '''0x10'''.
* Sets preamble type, something else ???


offset 0xC - preamble mode: 0 - short, 1 - long (1 byte)
'''5. Received Body'''


====Unknown (0x1031)====
<pre>
root@debian-hdd:~# dd if=/dev/ps3sbmmio bs=1 count=8 skip=$((0x8c010)) status=noxfer | hexdump -C


* Used by VSH.
00000000  00 00 c7 01 ff 00 00 00                          |..Ç.ÿ...|
* Command buffer size is '''0xe'''
00000008
</pre>


====Get Scan Results (0x1033)====
==Examples==


* Used by VSH.
===Get RTC===
* Used by LV1 on FAT models.
* Command buffer size is '''0x5b0'''
* Data passed to Gelic device is all 0s


=====Scan Results=====
* Used by LV1 call '''lv1_get_rtc'''
* Communication with SYSCON 4


offset 0x0 - number of scan entries (1 byte)
Request:
<pre>
# write packet


offset 0x1 - array of scan entries
# echo "0: 13 01 0000 0000 8014 00000004 0001 0001 33 00 00 00 0000ff1f" | xxd -c256 -r | \
      dd of=/dev/ps3sbmmio bs=1 seek=$((0x8d000)) status=noxfer


======Scan Entry======
# dump packet counter


offset 0x0 - size of this entry in bytes, this field is NOT included (2 bytes)
# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff0)) status=noxfer | hexdump -C


offset 0x2 - BSSID (6 bytes)
00000000  00 c0 00 c0                                      |.À.À|
00000004


offset 0x8 - RSSI (1 byte)
# increment packet counter


offset 0x9 - timestamp (8 bytes)
echo "0: 00c1 00c1" | xxd -c256 -r | dd of=/dev/ps3sbmmio bs=1 seek=$((0x8dff0)) status=noxfer


offset 0x11 - beacon period (2 bytes)
# kick packet


offset 0x13 - capability (2 bytes)
# echo "0: 00000001" | xxd -c256 -r | dd of=/dev/ps3sbmmio bs=1 seek=$((0x8e100)) status=noxfer


offset 0x15 - information elements (see 802.11 specification)
</pre>


====Start Scan (0x1035)====
Response:


* Used by VSH.
<pre>
* Used by LV1 on FAT models.
# dump packet counter
* Command buffer size depends on size of channel list and ESSID string length
* Data passed to Gelic device contains channel list and ESSID string
* First '''0x16''' bytes in command data buffer are all 0s, then follows the channel list and after that ESSID


====Diassociate (0x1037)====
# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff0)) status=noxfer | hexdump -C


* Used by VSH.
00000000  00 c1 00 c1                                      |.Á.Á|
* Used by LV1 on FAT models.
00000004
* Command buffer size is '''0xd'''
* Data passed to Gelic device is all 0s


====Get RSSI (0x103d)====
# dump response packet


* Used by VSH.
# dd if=/dev/ps3sbmmio bs=1 count=24 skip=$((0x8c000)) status=noxfer | hexdump -C
* Used by LV1 on FAT models.
* Command buffer size is '''0x17'''


offset 0x10 - MAC address of node (6 bytes)
00000000  13 01 00 00 00 00 80 14  00 00 00 04 00 08 00 08  |................|
00000010  00 00 00 00 15 af 47 6b                          |.....¯Gk|
00000018
</pre>


offset 0x16 - RSSI (1 byte)
===Ring Buzzer===


====Get MAC Address (0x103f)====
* Used by System Manager
* Communication with SYSCON 1


* Command buffer size is '''0x13'''
Request:


offset 0xD - MAC address (6 bytes)
<pre>
# write packet


====Set MAC Address (0x1041)====
# echo "0: 16 01 1620 0000 804d 00000001 0008 0008 20 29 0a 00 000001b6 0000fdcb" | xxd -c256 -r | \
      dd of=/dev/ps3sbmmio bs=1 seek=$((0x8d000)) status=noxfer


* Used by VSH.
# dump packet counter
* Used by LV1 too.
* Command buffer size is '''0x12'''


====Unknown (0x104d)====
# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff0)) status=noxfer | hexdump -C


* Used by VSH.
00000000  00 c0 00 c0                                      |.À.À|
* Command buffer size is '''0xd'''.
00000004


offset 0xC - 0 - ???, 1 - ??? (1 byte)
# increment packet counter


====Unknown (0x104f)====
echo "0: 00c1 00c1" | xxd -c256 -r | dd of=/dev/ps3sbmmio bs=1 seek=$((0x8dff0)) status=noxfer


* Command buffer size is '''0xd'''.
# kick packet
* Returns 1 byte.


offset 0xC - 0 - ???, 1 - ??? (1 byte)
# echo "0: 00000001" | xxd -c256 -r | dd of=/dev/ps3sbmmio bs=1 seek=$((0x8e100)) status=noxfer


====Unknown (0x1051)====
# you should hear a beep


* Used by VSH.
</pre>
* Command buffer size is '''0x5b3'''.
* Returns '''0x5a7''' bytes.


offset 0xC - number of entries
Response:


offset 0x10 - entries (each entry is 0xd bytes)
<pre>
# dump packet counter


====Unknown (0x1053)====
# dd if=/dev/ps3sbmmio bs=1 count=4 skip=$((0x8dff0)) status=noxfer | hexdump -C


* Used by VSH.
00000000  00 c1 00 c1                                      |.Á.Á|
* Command buffer size is '''0x70'''.
00000004


offset 0xC - ??? (4 bytes)
# dump response packet


offset 0x10 - MAC address (6 bytes)
# dd if=/dev/ps3sbmmio bs=1 count=24 skip=$((0x8c000)) status=noxfer | hexdump -C
00000000  16 01 16 20 00 00 80 4d  00 00 00 01 00 01 00 01  |... ...M........|
00000010  00 00 00 00 00 00 fe e3                          |......þã|
00000018


====Unknown (0x1059)====
</pre>


* Used by VSH.
=Isolation=
* Command buffer size is '''0x2a8'''.
Crossreference: [http://wiki.gitbrew.org/wikibrew/PS3:HvReverseEngineering#Isolation gitbrew.org::Isolation] <br />


====Unknown (0x105f)====
==Running Isolated SPE Modules On OtherOS++ Linux==


* Used by LV2.
* spp_verifier is a kernel module which shows you how to run isolated SPE modules on OtherOS++ Linux.
* It decrypts default.spp profile
* Tested on 3.41 and 3.55.
* You can modify it easily to run other SPE modules.


====Get Zephyr HW Revision (0x1101)====
<pre>
root@debian-hdd:/home/glevand/spp_verifier# cat spp_verifier_355.self > /proc/spp_verifier/spu
root@debian-hdd:/home/glevand/spp_verifier# cat default_355.spp > /proc/spp_verifier/profile
root@debian-hdd:/home/glevand/spp_verifier# echo 1 > /proc/spp_verifier/run
root@debian-hdd:/home/glevand/spp_verifier# cat /proc/spp_verifier/debug


* Used by VSH.
PPE id (0x0000000000000001) VAS id (0x0000000000000002)
* Not a Gelic device command, handled by LV2 kernel.
lv1_construct_logical_spe (0x00000000)
* LV2 uses LV1 call '''lv1_net_control(0x8000000000000002)'''
SPE id (0x000000000000002b)
* Command buffer size is '''0x18'''.
lv1_undocumented_function_209 (0x00000000)
 
shadow execution status (0x0000000000000002)
====Get MAC Address List (0x1117)====
lv1_get_spe_interrupt_status(1) (0x00000000)
 
interrupt status 1 (0x0000000000000000)
* Command buffer size is '''0xce'''.
sleep
* Returns several MAC addresses.
shadow execution status (0x0000000000000002)
 
lv1_get_spe_interrupt_status(1) (0x00000000)
offset 0xC - number of MAC addresses (2 bytes)
interrupt status 1 (0x0000000000000001)
ea (0xc000000002920000) esid (0xc000000008000000) vsid (0x0000408f92c94500)
lv1_undocumented_function_62 (0x00000000)
lv1_clear_spe_interrupt_status(1) (0x00000000)
lv1_undocumented_function_168 (0x00000000)
sleep
shadow execution status (0x0000000000000007)
lv1_get_spe_interrupt_status(1) (0x00000000)
interrupt status 1 (0x0000000000000000)
lv1_get_spe_interrupt_status(2) (0x00000000)
interrupt status 2 (0x0000000000000000)
out interrupt mbox (0x0000000000000002)
out interrupt mbox (0x0000000000000002)
lv1_undocumented_function_167 (0x00000000)
lv1_clear_spe_interrupt_status (0x00000000)
lv1_undocumented_function_200 (0x00000000)
sleep
shadow execution status (0x000000000000000b)
lv1_get_spe_interrupt_status(1) (0x00000000)
interrupt status 1 (0x0000000000000000)
shadow execution status (0x000000000000000b)
problem status (0x01000082)
lv1_destruct_logical_spe (0x00000000)


offset 0xE - MAC addresses (6 * number of MAC addresses)
root@debian-hdd:/home/glevand/spp_verifier# hexdump -C /proc/spp_verifier/profile | less
...
...
00000200  00 02 00 05 00 00 20 a0  00 00 00 01 00 03 00 00  |......  ........|
00000210  00 00 00 00 00 00 00 01  00 00 00 0e 00 00 00 00  |................|
00000220  00 00 02 88 00 00 00 01  10 70 00 00 01 00 00 01  |.........p......|
00000230  00 00 00 00 00 00 00 00  53 43 45 5f 43 45 4c 4c  |........SCE_CELL|
00000240  4f 53 5f 50 4d 45 00 00  00 00 00 00 00 00 00 00  |OS_PME..........|
00000250  00 00 00 00 00 00 00 00  00 00 00 06 00 00 02 50  |...............P|
00000260  10 70 00 00 01 00 00 01  2f 66 6c 68 2f 6f 73 2f  |.p....../flh/os/|
00000270  74 68 69 73 5f 69 73 5f  64 75 6d 6d 79 00 00 00  |this_is_dummy...|
00000280  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
...
...
</pre>


====Unknown (0x1133)====
==Using metldr On OtherOS++ Linux==


* Used by VSH.
* spp_verifier_direct is a kernel module which shows you how to run isolated SPE modules on OtherOS++ Linux by using metldr directly.
* Command buffer size is '''0x1A'''.
* It decrypts default.spp profile.
* Tested on 3.41 and 3.55.
* You can modify it easily to run other SPE modules.


====Set WOL MAC Address Filter (0x1139)====
<pre>
 
root@debian-hdd:/home/glevand/spp_verifier_direct# insmod ./spp_verifier_direct.ko
* Used by LV2 internally.
root@debian-hdd:/home/glevand/spp_verifier_direct# cat metldr > /proc/spp_verifier_direct/metldr
* Command buffer is of size '''0x28'''.
root@debian-hdd:/home/glevand/spp_verifier_direct# cat isoldr_355 > /proc/spp_verifier_direct/isoldr
 
root@debian-hdd:/home/glevand/spp_verifier_direct# cat RL_FOR_PROGRAM_355.img > /proc/spp_verifier_direct/rvkprg
====Unknown (0x113b)====
root@debian-hdd:/home/glevand/spp_verifier_direct# cat EID0 > /proc/spp_verifier_direct/eid0
 
root@debian-hdd:/home/glevand/spp_verifier_direct# cat spp_verifier_355.self > /proc/spp_verifier_direct/spu
* Used by LV2 internally.
root@debian-hdd:/home/glevand/spp_verifier_direct# cat default_355.spp > /proc/spp_verifier_direct/profile
* Command buffer size is '''0x20'''.
root@debian-hdd:/home/glevand/spp_verifier_direct# echo 1 > /proc/spp_verifier_direct/run
root@debian-hdd:/home/glevand/spp_verifier_direct# cat /proc/spp_verifier_direct/debug
PPE id (0x0000000000000001) VAS id (0x0000000000000002)
lv1_construct_logical_spe (0x00000000)
SPE id (0x0000000000000033)
lv1_enable_logical_spe (0x00000000)
lv1_set_spe_interrupt_mask(0) (0x00000000)
lv1_set_spe_interrupt_mask(1) (0x00000000)
lv1_set_spe_interrupt_mask(2) (0x00000000)
lv1_set_spe_privilege_state_area_1_register (0x00000000)
ea (0xc000000002680000) esid (0xc000000008000000) vsid (0x0000408f92c94500)
lv1_get_spe_interrupt_status(0) (0x00000000)
lv1_get_spe_interrupt_status(1) (0x00000000)
lv1_get_spe_interrupt_status(2) (0x00000000)
sleep
lv1_get_spe_interrupt_status(0) (0x00000000)
lv1_get_spe_interrupt_status(1) (0x00000000)
lv1_get_spe_interrupt_status(2) (0x00000000)
out interrupt mbox (0x0000000000000001)
lv1_clear_spe_interrupt_status(2) (0x00000000)
transferring EID0, ldr args and revoke list to LS
waiting until MFC transfers are finished
MFC transfers done
out mbox (0x00000001)
sleep
lv1_get_spe_interrupt_status(0) (0x00000000)
lv1_get_spe_interrupt_status(1) (0x00000000)
lv1_get_spe_interrupt_status(2) (0x00000000)
out interrupt mbox (0x0000000000000002)
lv1_clear_spe_interrupt_status(2) (0x00000000)
out mbox (0x00000002)
lv1_clear_spe_interrupt_status(2) (0x00000000)
sleep
lv1_get_spe_interrupt_status(0) (0x00000000)
lv1_get_spe_interrupt_status(1) (0x00000000)
lv1_get_spe_interrupt_status(2) (0x00000000)
problem status (0x01000082)
lv1_destruct_logical_spe (0x00000000)


====Set WOL Multicast Address Filter (0x113d)====
root@debian-hdd:/home/glevand/spp_verifier_direct# hexdump -C /proc/spp_verifier_direct/profile | less
...
...
00000200  00 02 00 05 00 00 20 a0  00 00 00 01 00 03 00 00  |......  ........|
00000210  00 00 00 00 00 00 00 01  00 00 00 0e 00 00 00 00  |................|
00000220  00 00 02 88 00 00 00 01  10 70 00 00 01 00 00 01  |.........p......|
00000230  00 00 00 00 00 00 00 00  53 43 45 5f 43 45 4c 4c  |........SCE_CELL|
00000240  4f 53 5f 50 4d 45 00 00  00 00 00 00 00 00 00 00  |OS_PME..........|
00000250  00 00 00 00 00 00 00 00  00 00 00 06 00 00 02 50  |...............P|
00000260  10 70 00 00 01 00 00 01  2f 66 6c 68 2f 6f 73 2f  |.p....../flh/os/|
00000270  74 68 69 73 5f 69 73 5f  64 75 6d 6d 79 00 00 00  |this_is_dummy...|
00000280  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
...
...
</pre>


* Used by LV2 internally.
= Gelic Device =
* Command buffer is of size '''0x2c'''.
Crossreference: [http://wiki.gitbrew.org/index.php/PS3:HvReverseEngineering#Gelic_Device gitbrew.org::Gelic Device] <br />


====Clear WOL Multicast Address Filter (0x113f)====
==sys.hw.config==


* Used by LV2 internally.
* Value of the loader parameter "sys.hw.config" controls if Gelic WLAN is enabled or not.
* Command buffer is of size '''0x28'''.
* Value of the loader parameter "sys.hw.config" is stored in the repository node "sys.hw.config" too.
* If bit '''0x40000''' is set then LV1 allows using Gelic WLAN interface from LV2.
* Value on my PS3 slim '''0x4e00ffff0a03bc3c''' with Gelic WLAN interface disabled. As you can see, the Gelic WLAN interface is disabled and LV1 doesn't allow using of LV1 calls 196 and 195. It returns LV1_CONDITION_NOT_SATISFIED.
* GameOS checks bit '''0x40000''' of the repository node "sys.hw.config" during network initialization and if it's set then LV2 initializes Gelic WLAN interface.
* Check your "sys.hw.config" repository node and if bit '''0x40000''' is set then you are a lucky owner of a PS3 model with the old WLAN interface.
* '''On newer PS3 models, GameOS uses USB interface to communicate with WLAN.'''
* On PS3 models, where bit '''0x40000''' is NOT set in "sys.hw.config" repository node, the new USB interface is used.


====Unknown (0x1141)====
''Note:[http://www.ps3devwiki.com/index.php?title=Wifi old vs. new]: Old == CECHA up to CECHK, New == CECHL and later''


* Used by LV2 internally.
== Control Interface ==
* Command buffer is of size 0x12.


====Clear WOL Address Filter (0x1143)====
HV calls 195 and 196 are used by GameOS to send commands to Gelic device directly.


* Used by LV2 internally.
=== lv1_undocumented_function_196 ===
* Command buffer size is '''0x2c'''.


====Unknown (0x114b)====
==== Parameters ====


* Used by LV2 internally.
r3 - LPAR address of data buffer


====Set WOL Magic Packet Mode (0x1155)====
r4 - size of data buffer


* Used by LV2 internally.
r5 - must be 0
* Command buffer is of size '''0x10'''.
* Enables/Disables WOL magic packet.


offset 0xC - mode: 0 - disable, 1 - enable (4 bytes)
=== lv1_undocumented_function_195 ===


====Unknown (0x1157)====
==== Parameters ====


* Used by LV2 internally.
r3 - command (16 bit value)
* Command buffer size is '''0x10'''.


====Set WOL Multicast Address Filter Mode (0x1159)====
r4 - command data size


* Used by LV2 internally.
r5 - must be 0
* Command buffer size is '''0x10'''.
* WOL function


offset 0xC - mode: 0 - disable, 1 - enable (4 bytes)
=== Data Buffer ===


====Set Unicast Address Filter (0x115b)====
* Data Buffer passed to HV call 196 is divided into 2 parts.
* The first 0x800 bytes are for sending and receiving command data
* The remaining 0x800 bytes are for event notification.


* Used by LV2 internally.
=== Command Data Buffer ===
* Command buffer is of size '''0x6a'''.
* This command should be used to set proper MAC address or else device won't be able to receive packets destined to its own MAC address


offset 0xC - ??? (2 bytes)
* Every command data sent to Gelic device contains header of size '''0xC'''
* After the header follows the command data
* After the Gelic device processed the command, it notifies LV2 kernel about command completion by sending an interrupt


offset 0xE - ??? (2 bytes)
==== Header ====


offset 0x10 - MAC address (6 bytes)
* Size is '''0xc'''.
* Byte order is little-endian.
* Header data in a request command buffer is always all 0s.


====Clear Unicast Address Filter (0x115d)====
0x0 - command = request command + 1 (2 bytes)


* Used by LV2 internally.
0x4 - result, 0x1 - success ??? 0x2 - buffer too small ??? (2 bytes)
* Command buffer size is '''0x6a'''.


====Get Unicast Address Filter (0x115f)====
0x6 - body size (2 bytes)


* Used by LV2 internally.
=== Event Data Buffer ===
* Command buffer is of size '''0x6a'''.


====Set Multicast Address Filter (0x1161)====
* The Gelic device notifies LV2 kernel by sending an interrupt when new events are available
* Event Data Buffer has 8 bytes header
* The remaining bytes are divided into event slots
* Each event slot is of size 64 bytes
* Events are in little-endian format


* Used by LV2 internally.
==== Header ====
* Command buffer size is '''0x2c'''.


====Clear Multicast Address Filter (0x1163)====
offset 0x0 - GET index (4 bytes)


* Used by LV2 internally.
offset 0x4 - PUT index (4 bytes)
* Command buffer size is '''0x2c'''
* To clear all multicast addresses send command with all 0s.


offset 0xC - multicast address filter (4 * 8 bytes)
* GET index is updated by Gelic driver. The Gelic driver reads events beginning with the event slot at index GET.
* PUT index is the index of event entry where next Gelic event will be stored by the Gelic device.
* If GET index is equal to PUT index then there are no Gelic events.


====Get Multicast Address Filter (0x1165)====
=== GameOS ===


* Used by LV2 internally.
* LV2 syscall 726 sends Gelic device command and blocks until a response from the Gelic device arrives
* Command buffer is of size '''0x2c'''.
* LV2 kernel uses this LV1 interface to send commands to Gelic device internally too, probably for wireless controllers and Wake On WLAN.  
* The system call 726 is used heavily by VSH.


====Set WOL Address Filter (0x1167)====
==== Parameters ====


* Used by LV2 internally.
r3 - command (16 bits)
* Command buffer size is '''0x70'''.


====Set WOL Address Filter Mode (0x116d)====
r4 - effective address of command data buffer


* Used by LV2 internally.
r5 - size of command data buffer
* Command buffer size is '''0x10'''.
* Enables/Disables WOL address matching


offset 0xC - mode: 0 - disable, 1 - enable (4 bytes)
=== Commands ===


====Set Unicast Address Filter Mode (0x116f)====
====Unknown (0x1)====


* Used by LV2 internally.
* Used by VSH.
* Command buffer size is '''0x10'''.
* Command buffer size is '''0x10'''.
* Used in AP mode.
* Enables AP mode ???


offset 0xC - mode: 0 - disable, 1 - enable (4 bytes)
====Get AP SSID (0x3)====


====Get Device Status (0xfffb)====
* Command buffer is of size '''0x30'''.
* Returns SSID in AP mode.


* Used by VSH.
offset 0xC - SSID (32 bytes)
* Not a Gelic device command, handled by LV2 kernel.
* Returned data size in command buffer is '''0x10'''.


====Unknown (0xfffc)====
====Set AP SSID (0x5)====


* Used by VSH.
* Used by VSH.
* Not a Gelic device command, handled by LV2 kernel.
* Command buffer is of size '''0x30'''.
* LV2 uses LV1 call '''lv1_net_control(0x1 /* bus id */, 0x0 /* dev id */, 0x6 /* get channel info command */, 0x4, 0x0, 0x0)'''
* Sets SSID in AP mode.


====Get Channel Information (0xfffd)====
offset 0xC - SSID (32 bytes)
 
====Get Channel (0xf)====


* Used by VSH.
* Used by VSH.
* Not a Gelic device command, handled by LV2 kernel.
* Command buffer is of size '''0x31'''.
* LV2 uses LV1 call '''lv1_net_control(0x1 /* bus id */, 0x0 /* dev id */, 0x6 /* get channel info command */, 0x0, 0x0, 0x0)'''
* Data is returned from the device.
* Returns supported WLAN channels
* Returns list of channels and active channel.
 
offset 0x2F - active channel (2 bytes)


====Set Response Timeout (0xfffe)====
====Set Channel (0x11)====


* Used by VSH.
* Used by VSH.
* Not a Gelic device command, handled by LV2 kernel.
* Command buffer size is '''0xd'''
* Sets timeout value which is used to wait for a response from Gelic device.
* Valid channels: '''0 - 13'''. '''0''' means that the channel is selected '''automatically'''.
* Typical value used by VSH is '''0x989680'''.
 
* Command buffer size is '''0x14'''.
offset 0xC - channel (1 byte)


====Unknown (0xffff)====
====Unknown (0x27)====


* Used by VSH.
* Command buffer size is '''0xF'''.
* Not a Gelic device command, handled by LV2 kernel.
* Returns 0x10 bytes in command buffer.
* Returns gelic device state ???


=== Events ===
====Set Antenna (0x29)====


<pre>
* Command buffer size is '''0xe'''
struct ps3_eurus_event_hdr {
__le32 type;
__le32 id;
__le32 timestamp;
__le32 payload_length;
__le32 unknown;
} __packed;


struct ps3_eurus_event {
offset 0xC - ??? (1 byte)
struct ps3_eurus_event_hdr hdr;
u8 payload[44];
} __packed;
</pre>


====Event Type 0x00000040====
offset 0xD - ??? (1 byte)


{| class="wikitable"
====Set AP WEP Configuration (0x5b)====
|-
! Id !! Description
|-
| 0x00000001 || Deauthenticated
|}


====Event Type 0x00000080====
* Used by VSH.
* Command buffer is of size '''0x56'''.
* Sets WEP security type and WEP key.
* Security types: 0 - none, 1 - wep64, 2 - wep128


{| class="wikitable"
offset 0xE - security mode: 0 - none, 1 - wep64, 2 - wep128 (1 byte)
|-
! Id !! Description
|-
| 0x00000001 || Beacon Lost
|-
| 0x00000002 || Connected
|-
| 0x00000004 || Scan Completed
|-
| 0x00000020 || WPA Connected
|-
| 0x00000040 || WPA Error (MIC Error)
|}


====Event Type 0x80000000====
offset 0x10 - WEP key (64 bytes)


{| class="wikitable"
====Unknown (0x61)====
|-
! Id !! Description
|-
| 0x00000001 || Device Ready
|}


== Enabling WLAN Gelic On FAT ==
* Used by VSH.
* Command buffer size is '''0xd'''


Linux kernel doesn't use Gelic Device Control Interface like GameOS does it.
====Unknown (0x65)====
To get WLAN working on Linux booted with GameOS rights, we have to disable
Gelic Device Control Interface first because it's enabled for GameOS by default.


The value of repository node "ios.net.eurus.lpar" controls access to Gelic Device Control Interface.
* Used by VSH.
It's a bitmap. The position of a bit corresponds to LPAR id. During GameOS booting, HV process 9 (System Manager) sets bit at postion 2 to 1 which means enable Gelic Device Control Interface for LPAR 2.
* Command  uffer size is '''0xd'''.
* Used in AP mode.


To disable Gelic Device Control Interface on Linux, first unload Gelic device driver, then set
====Get Eurus Firmware Version (0x99)====
value of repository node "ios.net.eurus.lpar" to 0 and load Gelic device driver again. After that WLAN should work again but only on FATs.


For PS3 Slim we need a new Linux Gelic device driver which uses Gelic Device Control Interface directly.
* Used by VSH.


Here is the response on my PS3 Slim:
<pre>
00000000: 4a 55 50 49 54 45 52 2d 54 57 4f 2d 46 57 2d 32 |JUPITER-TWO-FW-2|
00000010: 30 2e 30 2e 31 32 2e 70 30 28 4a 61 6e 20 31 39 |0.0.12.p0(Jan 19|
00000020: 20 32 30 31 30 20 32 31 3a 32 30 3a 35 33 29 00 | 2010 21:20:53).|
00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00      |..............  |
</pre>


==USB WLAN Interface (Codename Jupiter 2)==
====Get AP Operating Mode (0xb7)====


* On new PS3 models, WLAN interface is USB.
* Used by VSH.
* '''Good news is that  the same commands are used as with LV1 calls 196 and 195'''.
* Command buffer size is '''0x10'''
* There are 2 wireless devices: Station and AP.
* Returns AP operating mode (mixed, 11b or 11g).
* I got WLAN scan working.


===Endpoints===
offset 0xC - opmode: 0 - 11b, 1 - 11g, 2 - 11bg (4 bytes)


* LV2 uses 3 USB endpoints of interface 3,4 and 5 to communicate with WLAN.
====Set AP Operating Mode (0xb9)====
* Endpoints EP5 IN/OUT, EP6 IN/OUT and EP7 IN/OUT.
* '''WLAN commands''' are sent to endpoint '''EP5 OUT''' with '''interrupt transfers'''.
* '''WLAN events''' and '''WLAN command responses''' are received on endpoint '''EP5 IN''' with '''interrupt transfers'''.
* LV2 opens a USB communication pipe to endpoint EP5 IN and EP5 OUT.
* In my LV2 3.55 dump, pipe to EP5 IN has id '''0x2''' and pipe to EP5 OUT has id '''0x3'''. Array of all opened USB pipes is at address '''0x80000000004bd000''' in my LV2 3.55 dump.
* EP5 is used to send commands to Jupiter and receive events from it.
* EP6 is used to send/receive data packets to/from the 1st WLAN device.
* EP7 is used to send/receive data packets to/from the 2nd WLAN device.
* '''lsusb is buggy on big-endian arch and shows some fields with bytes swapped !!!'''


<pre>
* Used by VSH.
Bus 002 Device 002: ID 054c:036f Sony Corp.  
* Command buffer size is '''0x10'''
Device Descriptor:
* Sets AP operating mode (mixed, 11b or 11g).
  bLength                18
 
  bDescriptorType        1
offset 0xC - opmode: 0 - 11b, 1 - 11g, 2 - 11bg (4 bytes)
  bcdUSB              2.00
 
  bDeviceClass          224 Wireless
====Unknown (0xc5)====
  bDeviceSubClass        1 Radio Frequency
 
  bDeviceProtocol        1 Bluetooth
* Used by VSH.
  bMaxPacketSize0        64
* Command buffer size is '''0x10'''.
  idVendor          0x054c Sony Corp.
* Used in AP mode.
  idProduct          0x036f
 
  bcdDevice          20.12
offset 0xC - ??? (4 bytes)
  iManufacturer          1
 
  iProduct                2
====Set AP WPA AKM Suite (0xc9)====
  iSerial                0
 
  bNumConfigurations      1
* Used by VSH.
    Interface Descriptor:
* Command buffer size is '''0x11'''.
      bLength                9
* Sets WPA AKM suite in AP mode.
      bDescriptorType        4
 
      bInterfaceNumber        3
offset 0xC - AKM suite (4 bytes)
      bAlternateSetting      0
 
      bNumEndpoints          2
====Set AP WPA Group Cipher Suite (0xcf)====
      bInterfaceClass      255 Vendor Specific Class
 
      bInterfaceSubClass      2
* Used by VSH.
      bInterfaceProtocol      1
* Command buffer size is '''0x10'''
      iInterface              0
* Used in AP + WPA mode.
      Endpoint Descriptor:
 
        bLength                7
offset 0xC - group cipher suite: group (4 bytes)
        bDescriptorType        5
 
        bEndpointAddress    0x85  EP 5 IN
====Set AP WPA PSK Binary (0xd3)====
        bmAttributes            3
 
          Transfer Type            Interrupt
* Used by VSH.
          Synch Type              None
* Command buffer size is '''0x4c'''
          Usage Type              Data
* Sets WPA PSK binary
        wMaxPacketSize    0x4000  1x 0 bytes
 
        bInterval              1
offset 0xC - PSK (64 bytes)
      Endpoint Descriptor:
 
        bLength                7
====Set AP WPA Reauthentication Timeout (0xd5)====
        bDescriptorType        5
 
        bEndpointAddress    0x05  EP 5 OUT
* Used by VSH.
        bmAttributes            3
* Command buffer size is '''0x10'''
          Transfer Type            Interrupt
* Sets WPA Reauth timeout value in AP WPA mode.
          Synch Type              None
* VSH uses 36000 as timeout.
          Usage Type              Data
 
        wMaxPacketSize    0x4000  1x 0 bytes
offset 0xC - timeout value in seconds (2 bytes)
        bInterval              1
 
    Interface Descriptor:
====Unknown (0x127)====
      bLength                9
 
      bDescriptorType        4
* Used by VSH.
      bInterfaceNumber        4
* Command buffer size is '''0x10'''.
      bAlternateSetting      0
* Used in AP + WPA mode.
      bNumEndpoints          2
 
      bInterfaceClass      255 Vendor Specific Class
====Unknown (0x12b)====
      bInterfaceSubClass      2
 
      bInterfaceProtocol      2
* Used by VSH.
      iInterface              0
* Command buffer size is '''0x10'''.
      Endpoint Descriptor:
* Used in AP + WPA mode.
        bLength                7
 
        bDescriptorType        5
====Set AP WPA PSK Passphrase (0x17d)====
        bEndpointAddress    0x86  EP 6 IN
 
        bmAttributes            2
* Used by VSH.
          Transfer Type            Bulk
* Command buffer size is '''0x2D'''
          Synch Type              None
 
          Usage Type              Data
offset 0xD - passphrase (32 bytes)
        wMaxPacketSize    0x0002  1x 2 bytes
 
        bInterval              0
====Set AP WPA Pairwise Cipher Suite (0x1bf)====
      Endpoint Descriptor:
 
        bLength                7
* Used by VSH.
        bDescriptorType        5
* Command buffer size is '''0x11'''
        bEndpointAddress    0x06  EP 6 OUT
* Used in AP + WPA mode.
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type              None
          Usage Type              Data
        wMaxPacketSize    0x0002  1x 2 bytes
        bInterval            255
    Interface Descriptor:
      bLength                9
      bDescriptorType        4
      bInterfaceNumber        5
      bAlternateSetting      0
      bNumEndpoints          2
      bInterfaceClass      255 Vendor Specific Class
      bInterfaceSubClass      2
      bInterfaceProtocol      3
      iInterface              0
      Endpoint Descriptor:
        bLength                7
        bDescriptorType        5
        bEndpointAddress    0x87  EP 7 IN
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type              None
          Usage Type              Data
        wMaxPacketSize    0x0002  1x 2 bytes
        bInterval              0
      Endpoint Descriptor:
        bLength                7
        bDescriptorType        5
        bEndpointAddress    0x07  EP 7 OUT
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type              None
          Usage Type              Data
        wMaxPacketSize    0x0002  1x 2 bytes
        bInterval            255
</pre>


===Device Initialization===
offset 0xC - pairwise cipher suite (4 bytes)


* LV2 does 2 control transfers to EP0 during WLAN initialization
offset 0x10 - ??? (1 byte)
* First control transfer sends magic '''0x20''' data to device as '''CLEAR_FEATURE''' request.
* Second control transfer reads '''0x2''' bytes device status. On my PS3 slim, the status data is always '''0x2031''' if you send the right magic.
* Magic data sent in first control transfer is stored in LV2.
* '''If you send wrong magic, the first control transfer will fail !!!'''
* LV2 uses a state machine to initialize the Jupiter device. The state machine has 17 states.


==== Magic Data in Control Transfer ====
====Unknown (0x1d9)====


<pre>
* Used by VSH.
unsigned char ps3_usb_wlan_magic_data[] = {
* Command buffer size is '''0x10'''
0x76, 0x4e, 0x4b, 0x07, 0x24, 0x42, 0x53, 0xfb, 0x5a, 0xc7, 0xcc, 0x1d, 0xae, 0x00, 0xc6, 0xd8,
0x14, 0x40, 0x61, 0x8b, 0x13, 0x17, 0x4d, 0x7c, 0x3b, 0xb6, 0x90, 0xb8, 0x6e, 0x8b, 0xbb, 0x1d,
};
</pre>


==== Initialization State Machine ====
====Unknown (0x1dd)====


* Implemented in LV2.
* Used by VSH.
* Command buffer size is '''0xd'''


=====State 1=====
====Unknown (0x1ed)====


* Command '''0x114f''' is sent to WLAN device.
* Used by VSH.
* Command buffer is of size '''0x17'''.
* Rate control ???


=====State 2=====
====Get Eurus HW Revision (0x1fb)====


* Command '''0x1171''' is sent to WLAN device.
* Command buffer size is '''0x10'''.


=====State 3=====
====Associate (0x1001)====


* LV2 waits for an event from WLAN device.
* Used by VSH.
* Used by LV1 on FAT models.
* Command buffer size is '''0xd'''
* Data passed to Gelic device is all 0s


=====State 4=====
====Get Common Configuration (0x1003)====


* Command '''0x116f''' is sent to WLAN device.
* Used by VSH.
* Used by LV1 on FAT models.
* Command buffer size is '''0x18'''
* Data passed to Gelic device is all 0s


=====State 5=====
====Set Common Configuration (0x1005)====


* Command '''0x115b''' is sent to WLAN device.
* Used by VSH.
* Command data sent to WLAN device contains MAC address.
* Used by LV1 on FAT models.
* Command buffer size is '''0x18'''
* Hmm, VSH always removes QOS bit from capability, that means Jupiter doesn't support QOS ???


=====State 6=====
offset 0xC - BSS type: 0 - infrastructure, 1 - ???, 2 - adhoc (1 byte)


* Command '''0x1161''' is sent to WLAN device.
offset 0xD - authentication mode: 0 - open, 1 - shared key
* Sets multicast address filter.


=====State 7=====
offset 0xE - opmode: 0 - 11bg, 1 - 11b, 2 - 11g (1 byte)


* Command '''0x110d''' is sent to WLAN device.
offset 0xF - ??? (1 byte)


=====State 8=====
offset 0x10 - BSSID (6 bytes)


* Command '''0x1031''' is sent to WLAN device.
offset 0x16 - capability (2 bytes)


=====State 9=====
====Get WEP Configuration (0x1013)====


* Command '''0x1041''' is sent to WLAN device.
* Used by VSH.
* Command data sent to WLAN device contains MAC address.
* Used by LV1 on FAT models.
* Command buffer size is '''0x50'''
* Data passed to Gelic device is all 0s


=====State 10=====
====Set WEP Configuration (0x1015)====


* Command '''0x29''' is sent to WLAN device.
* Used by VSH.
* Sets antenna.
* Used by LV1 on FAT models.
* Command buffer size is '''0x50'''


=====State 11=====
====Get WPA Configuration (0x1017)====
 
* Used by VSH.
* Used by LV1 on FAT models.
* Command buffer size is '''0x5b'''
* Data passed to Gelic device is all 0s
 
====Set WPA Configuration (0x1019)====
 
* Used by VSH.
* Used by LV1 on FAT models.
* Command buffer size is '''0x5b'''


* Command '''0x110b''' is sent to WLAN device.
offset 0xE - security type: 0 - WPA, 1 - RSNA (1 byte)


=====State 12=====
offset 0xF - psk type: 0 - hex, 1 - bin (1 byte)


* Command '''0x1109''' is sent to WLAN device.
offset 0x10 - psk key: hex or bin (64 bytes)


=====State 13=====
offset 0x50 - group cipher suite: 0x0050f202 - WPA TKIP, 0x0050f204 - WPA AES, 0x000fac02 - RSNA TKIP, 0x000fac04 - RSNA CCMP (4 bytes)


* Command '''0x207''' is sent to WLAN device.
offset 0x54 - pairwise cipher suite: 0x0050f202 - WPA TKIP, 0x0050f204 - WPA AES, 0x000fac02 - RSNA TKIP, 0x000fac04 - RSNA CCMP (4 bytes)


=====State 14=====
offset 0x58 - AKM suite: 0x0050f202 - WPA PSK, 0x000fac02 - RSNA PSK (4 bytes)


* Command '''0x203''' is sent to WLAN device.
'''See IEEE 802.11 specification for more details about cipher/AKM suites
'''


=====State 15=====
802.11 spec: [http://standards.ieee.org/getieee802/download/802.11-2007.pdf]


* Command '''0x105f''' is sent to WLAN device.
====Unknown (0x1025)====
* Command data sent to WLAN device contains MAC address, channel info and region code.


=====State 16=====
* Used by VSH.
* Command buffer size is '''0x10'''.
* Sets preamble type, something else ???


* LV2 waits for an event from WLAN device.
offset 0xC - preamble mode: 0 - short, 1 - long (1 byte)


=====State 17=====
====Unknown (0x1031)====


* LV2 accepts commands sent by LV2 syscall 726.
* Used by VSH.
* Command buffer size is '''0xe'''


===Test Program===
====Get Scan Results (0x1033)====


* Here is a small program which executes a WLAN scan.
* Used by VSH.
* I used libusb.
* Used by LV1 on FAT models.
* Command buffer size is '''0x5b0'''
* Data passed to Gelic device is all 0s


====Source Code====
=====Scan Results=====
<pre>


/*
offset 0x0 - number of scan entries (1 byte)
* PS3 USB WLAN
*
* Copyright (C) 2011 glevand ([email protected])
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published
* by the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/


#include <stdio.h>
offset 0x1 - array of scan entries
#include <stdlib.h>
#include <string.h>
#include <ctype.h>
#include <stdint.h>
#include <unistd.h>
#include <pthread.h>


#include <libusb-1.0/libusb.h>
======Scan Entry======


#define USB_VENDOR_ID 0x054c /* $ONY */
offset 0x0 - size of this entry in bytes, this field is NOT included (2 bytes)
#define USB_PRODUCT_ID 0x036f
#define USB_IFACE_NUMBER 3


#define USB_INTR_TRANSFER_EP5_IN_BUF_SIZE 0x800
offset 0x2 - BSSID (6 bytes)
#define USB_INTR_TRANSFER_EP5_OUT_BUF_SIZE 0x800


struct wlan_cmd_pkt_hdr {
offset 0x8 - RSSI (1 byte)
uint8_t unknown1;
uint8_t unknown2;
uint8_t unknown3;
uint8_t unknown4;
uint16_t unknown5;
uint8_t res1[2];
uint16_t tag;
uint8_t res2[14];
} __attribute__ ((packed));


struct wlan_cmd_hdr {
offset 0x9 - timestamp (8 bytes)
uint16_t command;
uint16_t tag;
uint16_t status;
uint16_t payload_size;
uint8_t res[4];
} __attribute__ ((packed));


struct wlan_event_pkt_hdr {
offset 0x11 - beacon period (2 bytes)
uint8_t unknown1;
uint8_t unknown2;
uint8_t unknown3;
uint8_t event_count;
} __attribute__ ((packed));


static libusb_context *usb_ctx;
offset 0x13 - capability (2 bytes)
static libusb_device_handle *usb_dev_handle;


static struct libusb_transfer *usb_intr_transfer_ep5_in;
offset 0x15 - information elements (see 802.11 specification)
static unsigned char usb_intr_transfer_ep5_in_buf[USB_INTR_TRANSFER_EP5_IN_BUF_SIZE];


static unsigned char usb_intr_transfer_ep5_out_buf[USB_INTR_TRANSFER_EP5_OUT_BUF_SIZE];
====Start Scan (0x1035)====


static pthread_mutex_t usb_wlan_cmd_mutex;
* Used by VSH.
static pthread_cond_t usb_wlan_cmd_cond;
* Used by LV1 on FAT models.
static int volatile usb_wlan_cmd_busy;
* Command buffer size depends on size of channel list and ESSID string length
static uint16_t usb_wlan_cmd;
* Data passed to Gelic device contains channel list and ESSID string
static void *usb_wlan_cmd_data;
* First '''0x16''' bytes in command data buffer are all 0s, then follows the channel list and after that ESSID
 
====Diassociate (0x1037)====


static int volatile usb_wlan_cmd_thread_done;
* Used by VSH.
* Used by LV1 on FAT models.
* Command buffer size is '''0xd'''
* Data passed to Gelic device is all 0s


/*
====Get RSSI (0x103d)====
* WLAN won't work without this magic !!!
*/
static unsigned char usb_magic_data[] = {
0x76, 0x4e, 0x4b, 0x07, 0x24, 0x42, 0x53, 0xfb, 0x5a, 0xc7, 0xcc, 0x1d, 0xae, 0x00, 0xc6, 0xd8,
0x14, 0x40, 0x61, 0x8b, 0x13, 0x17, 0x4d, 0x7c, 0x3b, 0xb6, 0x90, 0xb8, 0x6e, 0x8b, 0xbb, 0x1d,
};


static unsigned char my_mac_addr[] = {
* Used by VSH.
0x00, 0x11, 0x22, 0x33, 0x44, 0x55,
* Used by LV1 on FAT models.
};
* Command buffer size is '''0x17'''


/*
offset 0x10 - MAC address of node (6 bytes)
* hexdump
*/
static void hexdump(const unsigned char *data, unsigned int data_size)
{
int i, j;


for (i = 0; i < data_size; i += 16) {
offset 0x16 - RSSI (1 byte)
fprintf(stdout, "%08x:", i);


for (j = 0; j < 16; j++) {
====Get MAC Address (0x103f)====
if (i + j < data_size) {
fprintf(stdout, " %02x", data[i + j]);
} else {
fprintf(stdout, "  ");
}
}


fprintf(stdout, " |");
* Command buffer size is '''0x13'''


for (j = 0; j < 16; j++) {
offset 0xD - MAC address (6 bytes)
if (i + j < data_size) {
if (isprint(data[i + j]))
fprintf(stdout, "%c", data[i + j]);
else
fprintf(stdout, ".");
} else {
fprintf(stdout, " ");
}
}


fprintf(stdout, "|\n");
====Set MAC Address (0x1041)====
}
}


/*
* Used by VSH.
* usb_handle_wlan_event
* Used by LV1 too.
*/
* Command buffer size is '''0x12'''
static void usb_handle_wlan_event(struct wlan_event_pkt_hdr *wlan_event_pkt_hdr)
 
{
====Unknown (0x104d)====
fprintf(stdout, "%s:%d: === got WLAN event ===\n", __func__, __LINE__);
 
* Used by VSH.
* Command buffer size is '''0xd'''.
 
offset 0xC - 0 - ???, 1 - ??? (1 byte)


/*
====Unknown (0x104f)====
fprintf(stdout, "%s:%d: event packet header:\n", __func__, __LINE__);
fprintf(stdout, "%s:%d: unknown1 (0x%02x)\n", __func__, __LINE__,
wlan_event_pkt_hdr->unknown1);
fprintf(stdout, "%s:%d: unknown2 (0x%02x)\n", __func__, __LINE__,
wlan_event_pkt_hdr->unknown2);
fprintf(stdout, "%s:%d: unknown3 (0x%02x)\n", __func__, __LINE__,
wlan_event_pkt_hdr->unknown3);
*/
fprintf(stdout, "%s:%d: event_count (0x%02x)\n", __func__, __LINE__,
wlan_event_pkt_hdr->event_count);


hexdump((unsigned char *) (wlan_event_pkt_hdr + 1), wlan_event_pkt_hdr->event_count * 64);
* Command buffer size is '''0xd'''.
}
* Returns 1 byte.


/*
offset 0xC - 0 - ???, 1 - ??? (1 byte)
* usb_handle_wlan_cmd_response
*/
static void usb_handle_wlan_cmd_response(struct wlan_cmd_pkt_hdr *wlan_cmd_pkt_hdr)
{
struct wlan_cmd_hdr *wlan_cmd_hdr;
uint8_t *wlan_cmd_payload;


fprintf(stdout, "%s:%d: === got WLAN command response ===\n", __func__, __LINE__);
====Unknown (0x1051)====


wlan_cmd_hdr = (struct wlan_cmd_hdr *) (wlan_cmd_pkt_hdr + 1);
* Used by VSH.
wlan_cmd_payload = (uint8_t *) (wlan_cmd_hdr + 1);
* Command buffer size is '''0x5b3'''.
* Returns '''0x5a7''' bytes.


/* convert all header fields to big-endian byte order !!! */
offset 0xC - number of entries


wlan_cmd_pkt_hdr->unknown5 = le16toh(wlan_cmd_pkt_hdr->unknown5);
offset 0x10 - entries (each entry is 0xd bytes)
wlan_cmd_pkt_hdr->tag = le16toh(wlan_cmd_pkt_hdr->tag); /* returned from request */


wlan_cmd_hdr->command = le16toh(wlan_cmd_hdr->command); /* request command + 1 */
====Unknown (0x1053)====
wlan_cmd_hdr->tag = le16toh(wlan_cmd_hdr->tag); /* returned from request */
wlan_cmd_hdr->status = le16toh(wlan_cmd_hdr->status); /* 1 - success
  2 - invalid parameters ???
  3 - invalid command ??? */
wlan_cmd_hdr->payload_size = le16toh(wlan_cmd_hdr->payload_size); /* length of data that follows the header */


/*
* Used by VSH.
fprintf(stdout, "%s:%d: command packet header:\n", __func__, __LINE__);
* Command buffer size is '''0x70'''.
fprintf(stdout, "%s:%d: unknown1 (0x%02x)\n", __func__, __LINE__,
wlan_cmd_pkt_hdr->unknown1);
fprintf(stdout, "%s:%d: unknown2 (0x%02x)\n", __func__, __LINE__,
wlan_cmd_pkt_hdr->unknown2);
fprintf(stdout, "%s:%d: unknown3 (0x%02x)\n", __func__, __LINE__,
wlan_cmd_pkt_hdr->unknown3);
fprintf(stdout, "%s:%d: unknown4 (0x%02x)\n", __func__, __LINE__,
wlan_cmd_pkt_hdr->unknown4);
fprintf(stdout, "%s:%d: unknown5 (0x%04x)\n", __func__, __LINE__,
wlan_cmd_pkt_hdr->unknown5);
fprintf(stdout, "%s:%d: tag (0x%04x)\n", __func__, __LINE__,
wlan_cmd_pkt_hdr->tag);
*/


fprintf(stdout, "%s:%d: command header:\n", __func__, __LINE__);
offset 0xC - ??? (4 bytes)
fprintf(stdout, "%s:%d: command (0x%04x)\n", __func__, __LINE__,
wlan_cmd_hdr->command);


if ((usb_wlan_cmd + 1) != wlan_cmd_hdr->command)
offset 0x10 - MAC address (6 bytes)
fprintf(stdout, "%s:%d: ==> command does not match, got (0x%04x) expected (0x%04x)\n",
__func__, __LINE__, wlan_cmd_hdr->command, usb_wlan_cmd + 1);


fprintf(stdout, "%s:%d: tag (0x%04x)\n", __func__, __LINE__,
====Unknown (0x1059)====
wlan_cmd_hdr->tag);
fprintf(stdout, "%s:%d: status (0x%04x)\n", __func__, __LINE__,
wlan_cmd_hdr->status);


if (wlan_cmd_hdr->status != 0x1)
* Used by VSH.
fprintf(stdout, "%s:%d: ==> command status != 0x1\n", __func__, __LINE__);
* Command buffer size is '''0x2a8'''.


fprintf(stdout, "%s:%d: payload_size (0x%04x)\n", __func__, __LINE__,
====Unknown (0x105f)====
wlan_cmd_hdr->payload_size);


fprintf(stdout, "%s:%d: command payload:\n", __func__, __LINE__);
* Used by LV2.


hexdump(wlan_cmd_payload, wlan_cmd_hdr->payload_size);
====Get Zephyr HW Revision (0x1101)====


memcpy(usb_wlan_cmd_data, wlan_cmd_payload, wlan_cmd_hdr->payload_size);
* Used by VSH.
* Not a Gelic device command, handled by LV2 kernel.
* LV2 uses LV1 call '''lv1_net_control(0x8000000000000002)'''
* Command buffer size is '''0x18'''.


pthread_mutex_lock(&usb_wlan_cmd_mutex);
====Get MAC Address List (0x1117)====


usb_wlan_cmd_busy = 0;
* Command buffer size is '''0xce'''.
* Returns several MAC addresses.


pthread_cond_signal(&usb_wlan_cmd_cond);
offset 0xC - number of MAC addresses (2 bytes)


pthread_mutex_unlock(&usb_wlan_cmd_mutex);
offset 0xE - MAC addresses (6 * number of MAC addresses)
}


/*
====Unknown (0x1133)====
* usb_intr_transfer_ep5_in_cb
*/
static void usb_intr_transfer_ep5_in_cb(struct libusb_transfer *transfer)
{
struct wlan_cmd_pkt_hdr *wlan_cmd_pkt_hdr;
int error;


fprintf(stdout, "%s:%d: === got interrupt transfer ===\n", __func__, __LINE__);
* Used by VSH.
* Command buffer size is '''0x1A'''.


fprintf(stdout, "%s:%d: transfer status (%d) length (%d)\n",
====Set WOL MAC Address Filter (0x1139)====
__func__, __LINE__, transfer->status, transfer->actual_length);


wlan_cmd_pkt_hdr = (struct wlan_cmd_pkt_hdr *) transfer->buffer;
* Used by LV2 internally.
* Command buffer is of size '''0x28'''.


if (wlan_cmd_pkt_hdr->unknown3 == 0x6)
====Unknown (0x113b)====
usb_handle_wlan_cmd_response(wlan_cmd_pkt_hdr);
else if (wlan_cmd_pkt_hdr->unknown3 == 0x8)
usb_handle_wlan_event((struct wlan_event_pkt_hdr *) transfer->buffer);
else
fprintf(stdout, "%s:%d: got unknown packet (0x%02x)\n",
__func__, __LINE__, wlan_cmd_pkt_hdr->unknown3);


memset(usb_intr_transfer_ep5_in_buf, 0, sizeof(usb_intr_transfer_ep5_in_buf));
* Used by LV2 internally.
* Command buffer size is '''0x20'''.


libusb_fill_interrupt_transfer(usb_intr_transfer_ep5_in, usb_dev_handle, LIBUSB_ENDPOINT_IN | 0x5,
====Set WOL Multicast Address Filter (0x113d)====
usb_intr_transfer_ep5_in_buf, sizeof(usb_intr_transfer_ep5_in_buf),
usb_intr_transfer_ep5_in_cb, NULL, 0);


error = libusb_submit_transfer(usb_intr_transfer_ep5_in);
* Used by LV2 internally.
if (error) {
* Command buffer is of size '''0x2c'''.
fprintf(stderr, "%s:%d: could not submit transfer (%d)\n",
__func__, __LINE__, error);
exit(1);
}
}


/*
====Clear WOL Multicast Address Filter (0x113f)====
* usb_intr_transfer_ep5_out_cb
*/
static void usb_intr_transfer_ep5_out_cb(struct libusb_transfer *transfer)
{
/*
fprintf(stdout, "%s:%d: sent interrupt transfer\n", __func__, __LINE__);


fprintf(stdout, "%s:%d: transfer status (%d)\n", __func__, __LINE__, transfer->status);
* Used by LV2 internally.
*/
* Command buffer is of size '''0x28'''.


libusb_free_transfer(transfer);
====Unknown (0x1141)====
}


/*
* Used by LV2 internally.
* usb_wlan_cmd_send
* Command buffer is of size 0x12.
*/
static int usb_wlan_cmd_send(uint16_t command, const uint8_t *data, unsigned int data_size)
{
struct wlan_cmd_pkt_hdr *wlan_cmd_pkt_hdr;
struct wlan_cmd_hdr *wlan_cmd_hdr;
uint8_t *wlan_cmd_payload;
struct libusb_transfer *transfer;
int error;


fprintf(stdout, "%s:%d: sending command (0x%04x) data size (0x%04x) command size (0x%04x)\n",
====Clear WOL Address Filter (0x1143)====
__func__, __LINE__, command, data_size, data_size + sizeof(struct wlan_cmd_hdr));


transfer = libusb_alloc_transfer(0);
* Used by LV2 internally.
if (!transfer) {
* Command buffer size is '''0x2c'''.
fprintf(stderr, "%s:%d: could not allocate transfer\n", __func__, __LINE__);
error = -1;
goto fail;
}


wlan_cmd_pkt_hdr = (struct wlan_cmd_pkt_hdr *) usb_intr_transfer_ep5_out_buf;
====Unknown (0x114b)====
wlan_cmd_hdr = (struct wlan_cmd_hdr *) (wlan_cmd_pkt_hdr + 1);
wlan_cmd_payload = (uint8_t *) (wlan_cmd_hdr + 1);


wlan_cmd_pkt_hdr->unknown1 = 0x1;
* Used by LV2 internally.
wlan_cmd_pkt_hdr->unknown2 = 0x1;
wlan_cmd_pkt_hdr->unknown3 = 0x6;
wlan_cmd_pkt_hdr->unknown4 = 0x0;
wlan_cmd_pkt_hdr->unknown5 = 0x1;
wlan_cmd_pkt_hdr->tag = 0xf00d; /* returned in response */


wlan_cmd_hdr->command = command;
====Set WOL Magic Packet Mode (0x1155)====
wlan_cmd_hdr->tag = 0xcafe; /* returned in response */
wlan_cmd_hdr->status = 0xa;
wlan_cmd_hdr->payload_size = data_size;


memcpy(wlan_cmd_payload, data, data_size);
* Used by LV2 internally.
* Command buffer is of size '''0x10'''.
* Enables/Disables WOL magic packet.


usb_wlan_cmd = command;
offset 0xC - mode: 0 - disable, 1 - enable (4 bytes)
usb_wlan_cmd_data = (void *) data;


libusb_fill_interrupt_transfer(transfer, usb_dev_handle, LIBUSB_ENDPOINT_OUT | 0x5,
====Unknown (0x1157)====
usb_intr_transfer_ep5_out_buf,
sizeof(struct wlan_cmd_pkt_hdr) + sizeof(struct wlan_cmd_hdr) + wlan_cmd_hdr->payload_size,
usb_intr_transfer_ep5_out_cb, NULL, 0);


/* convert all header fields to little-endian byte order !!! */
* Used by LV2 internally.
* Command buffer size is '''0x10'''.


wlan_cmd_pkt_hdr->unknown5 = htole16(wlan_cmd_pkt_hdr->unknown5);
====Set WOL Multicast Address Filter Mode (0x1159)====
wlan_cmd_pkt_hdr->tag = htole16(wlan_cmd_pkt_hdr->tag);


wlan_cmd_hdr->command = htole16(wlan_cmd_hdr->command);
* Used by LV2 internally.
wlan_cmd_hdr->tag = htole16(wlan_cmd_hdr->tag);
* Command buffer size is '''0x10'''.
wlan_cmd_hdr->status = htole16(wlan_cmd_hdr->status);
* WOL function
wlan_cmd_hdr->payload_size = htole16(wlan_cmd_hdr->payload_size);


error = libusb_submit_transfer(transfer);
offset 0xC - mode: 0 - disable, 1 - enable (4 bytes)
if (error) {
fprintf(stderr, "%s:%d: could not submit transfer (%d)\n",
__func__, __LINE__, error);
goto fail_free_transfer;
}


pthread_mutex_lock(&usb_wlan_cmd_mutex);
====Set Unicast Address Filter (0x115b)====


usb_wlan_cmd_busy = 1;
* Used by LV2 internally.
* Command buffer is of size '''0x6a'''.
* This command should be used to set proper MAC address or else device won't be able to receive packets destined to its own MAC address


while (usb_wlan_cmd_busy)
offset 0xC - ??? (2 bytes)
pthread_cond_wait(&usb_wlan_cmd_cond, &usb_wlan_cmd_mutex);


pthread_mutex_unlock(&usb_wlan_cmd_mutex);
offset 0xE - ??? (2 bytes)


return 0;
offset 0x10 - MAC address (6 bytes)


fail_free_transfer:
====Clear Unicast Address Filter (0x115d)====


libusb_free_transfer(transfer);
* Used by LV2 internally.
* Command buffer size is '''0x6a'''.


fail:
====Get Unicast Address Filter (0x115f)====


return error;
* Used by LV2 internally.
}
* Command buffer is of size '''0x6a'''.


/*
====Set Multicast Address Filter (0x1161)====
* usb_wlan_cmd_start_scan
*/
static int usb_wlan_cmd_start_scan(void)
{
unsigned char data[256], *ptr;
unsigned int data_size;


memset(data, 0, sizeof(data));
* Used by LV2 internally.
* Command buffer size is '''0x2c'''.


ptr = data;
====Clear Multicast Address Filter (0x1163)====
*ptr++ = 0x0;
*ptr++ = 0x1;
*ptr++ = 0x64;
*ptr++ = 0x0;


ptr = data + 0xa;
* Used by LV2 internally.
*ptr++ = 0x3;
* Command buffer size is '''0x2c'''
* To clear all multicast addresses send command with all 0s.


*ptr++ = 13; /* number of channels */
offset 0xC - multicast address filter (4 * 8 bytes)
*ptr++ = 1; /* channels */
*ptr++ = 2;
*ptr++ = 3;
*ptr++ = 4;
*ptr++ = 5;
*ptr++ = 6;
*ptr++ = 7;
*ptr++ = 8;
*ptr++ = 9;
*ptr++ = 10;
*ptr++ = 11;
*ptr++ = 12;
*ptr++ = 13;


data_size = ptr - data;
====Get Multicast Address Filter (0x1165)====


return usb_wlan_cmd_send(0x1035, data, data_size);
* Used by LV2 internally.
}
* Command buffer is of size '''0x2c'''.


/*
====Set WOL Address Filter (0x1167)====
* usb_wlan_cmd_get_scan_results
*/
static int usb_wlan_cmd_get_scan_results(void)
{
unsigned char data[1456];
unsigned int data_size;


memset(data, 0, sizeof(data));
* Used by LV2 internally.
* Command buffer size is '''0x70'''.


data_size = sizeof(data);
====Set WOL Address Filter Mode (0x116d)====


return usb_wlan_cmd_send(0x1033, data, data_size);
* Used by LV2 internally.
}
* Command buffer size is '''0x10'''.
* Enables/Disables WOL address matching


/*
offset 0xC - mode: 0 - disable, 1 - enable (4 bytes)
* usb_wlan_cmd_0x99
 
*/
====Set Unicast Address Filter Mode (0x116f)====
static int usb_wlan_cmd_0x99(void)
{
unsigned char data[0x3e];
unsigned int data_size;


memset(data, 0, sizeof(data));
* Used by LV2 internally.
* Command buffer size is '''0x10'''.


data_size = sizeof(data);
offset 0xC - mode: 0 - disable, 1 - enable (4 bytes)


return usb_wlan_cmd_send(0x99, data, data_size);
====Get Device Status (0xfffb)====
}


/*
* Used by VSH.
* usb_wlan_init
* Not a Gelic device command, handled by LV2 kernel.
*/
* Returned data size in command buffer is '''0x10'''.
static int usb_wlan_init(void)
{
unsigned char data[1456], *ptr;
unsigned int data_size;
int error;


/* state 0x1 */
====Unknown (0xfffc)====


memset(data, 0, sizeof(data));
* Used by VSH.
* Not a Gelic device command, handled by LV2 kernel.
* LV2 uses LV1 call '''lv1_net_control(0x1 /* bus id */, 0x0 /* dev id */, 0x6 /* get channel info command */, 0x4, 0x0, 0x0)'''


data_size = 0x518;
====Get Channel Information (0xfffd)====


error = usb_wlan_cmd_send(0x114f, data, data_size);
* Used by VSH.
if (error) {
* Not a Gelic device command, handled by LV2 kernel.
fprintf(stderr, "%s:%d: could not send command 0x114f (%d)\n",
* LV2 uses LV1 call '''lv1_net_control(0x1 /* bus id */, 0x0 /* dev id */, 0x6 /* get channel info command */, 0x0, 0x0, 0x0)'''
__func__, __LINE__, error);
* Returns supported WLAN channels
return error;
}


sleep(2);
====Set Response Timeout (0xfffe)====


/* state 0x2 */
* Used by VSH.
* Not a Gelic device command, handled by LV2 kernel.
* Sets timeout value which is used to wait for a response from Gelic device.
* Typical value used by VSH is '''0x989680'''.
* Command buffer size is '''0x14'''.


memset(data, 0, sizeof(data));
====Unknown (0xffff)====


data_size = 0;
* Used by VSH.
* Not a Gelic device command, handled by LV2 kernel.
* Returns 0x10 bytes in command buffer.
* Returns gelic device state ???


error = usb_wlan_cmd_send(0x1171, data, data_size);
=== Events ===
if (error) {
fprintf(stderr, "%s:%d: could not send command 0x1171 (%d)\n",
__func__, __LINE__, error);
return error;
}


sleep(2);
<pre>
struct ps3_eurus_event_hdr {
__le32 type;
__le32 id;
__le32 timestamp;
__le32 payload_length;
__le32 unknown;
} __packed;


/* wait for a WLAN event */
struct ps3_eurus_event {
struct ps3_eurus_event_hdr hdr;
u8 payload[44];
} __packed;
</pre>


/* state 0x4 */
====Event Type 0x00000040====


memset(data, 0, sizeof(data));
{| class="wikitable"
|-
! Id !! Description
|-
| 0x00000001 || Deauthenticated
|}


ptr = data;
====Event Type 0x00000080====


*ptr++ = 0x1;
{| class="wikitable"
|-
! Id !! Description
|-
| 0x00000001 || Beacon Lost
|-
| 0x00000002 || Connected
|-
| 0x00000004 || Scan Completed
|-
| 0x00000020 || WPA Connected
|-
| 0x00000040 || WPA Error (MIC Error)
|}


data_size = 0x4;
====Event Type 0x80000000====


error = usb_wlan_cmd_send(0x116f, data, data_size);
{| class="wikitable"
if (error) {
|-
fprintf(stderr, "%s:%d: could not send command 0x116f (%d)\n",
! Id !! Description
__func__, __LINE__, error);
|-
return error;
| 0x00000001 || Device Ready
}
|}


sleep(2);
== Enabling WLAN Gelic On FAT ==


/* state 0x5 */
Linux kernel doesn't use Gelic Device Control Interface like GameOS does it.
To get WLAN working on Linux booted with GameOS rights, we have to disable
Gelic Device Control Interface first because it's enabled for GameOS by default.


memset(data, 0, sizeof(data));
The value of repository node "ios.net.eurus.lpar" controls access to Gelic Device Control Interface.
It's a bitmap. The position of a bit corresponds to LPAR id. During GameOS booting, HV process 9 (System Manager) sets bit at postion 2 to 1 which means enable Gelic Device Control Interface for LPAR 2.


ptr = data;
To disable Gelic Device Control Interface on Linux, first unload Gelic device driver, then set
value of repository node "ios.net.eurus.lpar" to 0 and load Gelic device driver again. After that WLAN should work again but only on FATs.


*ptr++ = 0x1;
For PS3 Slim we need a new Linux Gelic device driver which uses Gelic Device Control Interface directly.


ptr = data + 0x4;
memcpy(ptr, my_mac_addr, sizeof(my_mac_addr));


data_size = 0x5e;
==USB WLAN Interface (Codename Jupiter 2)==


error = usb_wlan_cmd_send(0x115b, data, data_size);
* On new PS3 models, WLAN interface is USB.
if (error) {
* '''Good news is that  the same commands are used as with LV1 calls 196 and 195'''.
fprintf(stderr, "%s:%d: could not send command 0x115b (%d)\n",
* There are 2 wireless devices: Station and AP.
__func__, __LINE__, error);
* I got WLAN scan working.
return error;
}


sleep(2);
===Endpoints===


/* state 0x6 */
* LV2 uses 3 USB endpoints of interface 3,4 and 5 to communicate with WLAN.
* Endpoints EP5 IN/OUT, EP6 IN/OUT and EP7 IN/OUT.
* '''WLAN commands''' are sent to endpoint '''EP5 OUT''' with '''interrupt transfers'''.
* '''WLAN events''' and '''WLAN command responses''' are received on endpoint '''EP5 IN''' with '''interrupt transfers'''.
* LV2 opens a USB communication pipe to endpoint EP5 IN and EP5 OUT.
* In my LV2 3.55 dump, pipe to EP5 IN has id '''0x2''' and pipe to EP5 OUT has id '''0x3'''. Array of all opened USB pipes is at address '''0x80000000004bd000''' in my LV2 3.55 dump.
* EP5 is used to send commands to Jupiter and receive events from it.
* EP6 is used to send/receive data packets to/from the 1st WLAN device.
* EP7 is used to send/receive data packets to/from the 2nd WLAN device.
* '''lsusb is buggy on big-endian arch and shows some fields with bytes swapped !!!'''


memset(data, 0, sizeof(data));
<pre>
 
Bus 002 Device 002: ID 054c:036f Sony Corp.
ptr = data + 0x1c;
Device Descriptor:
 
  bLength                18
*ptr++ = 0x20;
  bDescriptorType        1
 
  bcdUSB              2.00
data_size = 0x20;
  bDeviceClass          224 Wireless
 
  bDeviceSubClass        1 Radio Frequency
error = usb_wlan_cmd_send(0x1161, data, data_size);
  bDeviceProtocol        1 Bluetooth
if (error) {
  bMaxPacketSize0        64
fprintf(stderr, "%s:%d: could not send command 0x1161 (%d)\n",
  idVendor          0x054c Sony Corp.
__func__, __LINE__, error);
  idProduct          0x036f
return error;
  bcdDevice          20.12
}
  iManufacturer          1
 
  iProduct                2
sleep(2);
  iSerial                0  
 
  bNumConfigurations      1
memset(data, 0, sizeof(data));
    Interface Descriptor:
 
      bLength                9
ptr = data + 0xc;
      bDescriptorType        4
memset(ptr, 0xff, 7 * 4);
      bInterfaceNumber        3
 
      bAlternateSetting      0
data_size = 0x80;
      bNumEndpoints          2
 
      bInterfaceClass      255 Vendor Specific Class
error = usb_wlan_cmd_send(0x110d, data, data_size);
      bInterfaceSubClass      2
if (error) {
      bInterfaceProtocol      1
fprintf(stderr, "%s:%d: could not send command 0x110d (%d)\n",
      iInterface              0
__func__, __LINE__, error);
      Endpoint Descriptor:
return error;
        bLength                7
}
        bDescriptorType        5
 
        bEndpointAddress    0x85  EP 5 IN
sleep(2);
        bmAttributes            3
 
          Transfer Type            Interrupt
memset(data, 0, sizeof(data));
          Synch Type              None
 
          Usage Type              Data
data_size = 0x2;
        wMaxPacketSize    0x4000  1x 0 bytes
 
        bInterval              1
error = usb_wlan_cmd_send(0x1031, data, data_size);
      Endpoint Descriptor:
if (error) {
        bLength                7
fprintf(stderr, "%s:%d: could not send command 0x1031 (%d)\n",
        bDescriptorType        5
__func__, __LINE__, error);
        bEndpointAddress    0x05  EP 5 OUT
return error;
        bmAttributes            3
}
          Transfer Type            Interrupt
 
          Synch Type              None
sleep(2);
          Usage Type              Data
 
        wMaxPacketSize    0x4000  1x 0 bytes
memset(data, 0, sizeof(data));
        bInterval              1
    Interface Descriptor:
      bLength                9
      bDescriptorType        4
      bInterfaceNumber        4
      bAlternateSetting      0
      bNumEndpoints          2
      bInterfaceClass      255 Vendor Specific Class
      bInterfaceSubClass      2
      bInterfaceProtocol      2
      iInterface              0
      Endpoint Descriptor:
        bLength                7
        bDescriptorType        5
        bEndpointAddress    0x86  EP 6 IN
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type              None
          Usage Type              Data
        wMaxPacketSize    0x0002  1x 2 bytes
        bInterval              0
      Endpoint Descriptor:
        bLength                7
        bDescriptorType        5
        bEndpointAddress    0x06  EP 6 OUT
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type              None
          Usage Type              Data
        wMaxPacketSize    0x0002  1x 2 bytes
        bInterval            255
    Interface Descriptor:
      bLength                9
      bDescriptorType        4
      bInterfaceNumber        5
      bAlternateSetting      0
      bNumEndpoints          2
      bInterfaceClass      255 Vendor Specific Class
      bInterfaceSubClass      2
      bInterfaceProtocol      3
      iInterface              0
      Endpoint Descriptor:
        bLength                7
        bDescriptorType        5
        bEndpointAddress    0x87  EP 7 IN
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type              None
          Usage Type              Data
        wMaxPacketSize    0x0002  1x 2 bytes
        bInterval              0
      Endpoint Descriptor:
        bLength                7
        bDescriptorType        5
        bEndpointAddress    0x07  EP 7 OUT
        bmAttributes            2
          Transfer Type            Bulk
          Synch Type              None
          Usage Type              Data
        wMaxPacketSize    0x0002  1x 2 bytes
        bInterval            255
</pre>


ptr = data;
===Device Initialization===
memcpy(ptr, my_mac_addr, sizeof(my_mac_addr));


data_size = 0x6;
* LV2 does 2 control transfers to EP0 during WLAN initialization
* First control transfer sends magic '''0x20''' data to device as '''CLEAR_FEATURE''' request.
* Second control transfer reads '''0x2''' bytes device status. On my PS3 slim, the status data is always '''0x2031''' if you send the right magic.
* Magic data sent in first control transfer is stored in LV2.
* '''If you send wrong magic, the first control transfer will fail !!!'''
* LV2 uses a state machine to initialize the Jupiter device. The state machine has 17 states.


error = usb_wlan_cmd_send(0x1041, data, data_size);
==== Magic Data in Control Transfer ====
if (error) {
fprintf(stderr, "%s:%d: could not send command 0x1041 (%d)\n",
__func__, __LINE__, error);
return error;
}


sleep(2);
<pre>
unsigned char ps3_usb_wlan_magic_data[] = {
0x76, 0x4e, 0x4b, 0x07, 0x24, 0x42, 0x53, 0xfb, 0x5a, 0xc7, 0xcc, 0x1d, 0xae, 0x00, 0xc6, 0xd8,
0x14, 0x40, 0x61, 0x8b, 0x13, 0x17, 0x4d, 0x7c, 0x3b, 0xb6, 0x90, 0xb8, 0x6e, 0x8b, 0xbb, 0x1d,
};
</pre>


/* state 0xa */
==== Initialization State Machine ====


memset(data, 0, sizeof(data));
* Implemented in LV2.


ptr = data;
=====State 1=====


*ptr++ = 0x2;
* Command '''0x114f''' is sent to WLAN device.
*ptr++ = 0x2;


data_size = 0x2;
=====State 2=====


error = usb_wlan_cmd_send(0x29, data, data_size);
* Command '''0x1171''' is sent to WLAN device.
if (error) {
fprintf(stderr, "%s:%d: could not send command 0x29 (%d)\n",
__func__, __LINE__, error);
return error;
}


sleep(2);
=====State 3=====


memset(data, 0, sizeof(data));
* LV2 waits for an event from WLAN device.


ptr = data;
=====State 4=====


*ptr++ = 0x1;
* Command '''0x116f''' is sent to WLAN device.


ptr = data + 8;
=====State 5=====


*ptr++ = 0x20;
* Command '''0x115b''' is sent to WLAN device.
* Command data sent to WLAN device contains MAC address.


data_size = 0xc;
=====State 6=====


error = usb_wlan_cmd_send(0x110b, data, data_size);
* Command '''0x1161''' is sent to WLAN device.
if (error) {
* Sets multicast address filter.
fprintf(stderr, "%s:%d: could not send command 0x110b (%d)\n",
__func__, __LINE__, error);
return error;
}


sleep(2);
=====State 7=====


memset(data, 0, sizeof(data));
* Command '''0x110d''' is sent to WLAN device.


ptr = data;
=====State 8=====


*ptr++ = 0x1;
* Command '''0x1031''' is sent to WLAN device.


ptr = data + 0x4;
=====State 9=====


*ptr++ = 0x15;
* Command '''0x1041''' is sent to WLAN device.
*ptr++ = 0x27;
* Command data sent to WLAN device contains MAC address.


*ptr++ = 0x12;
=====State 10=====
*ptr++ = 0x0;


*ptr++ = 0x6;
* Command '''0x29''' is sent to WLAN device.
*ptr++ = 0x0;
* Sets antenna.


ptr = data + 0xc;
=====State 11=====


*ptr++ = 0x9;
* Command '''0x110b''' is sent to WLAN device.
*ptr++ = 0x0;
*ptr++ = 0x1;


ptr = data + 0x10;
=====State 12=====


*ptr++ = 0xff;
* Command '''0x1109''' is sent to WLAN device.
*ptr++ = 0xff;
*ptr++ = 0xff;
*ptr++ = 0xff;
*ptr++ = 0xff;
*ptr++ = 0xff;


data_size = 0x16;
=====State 13=====


error = usb_wlan_cmd_send(0x1109, data, data_size);
* Command '''0x207''' is sent to WLAN device.
if (error) {
fprintf(stderr, "%s:%d: could not send command 0x1109 (%d)\n",
__func__, __LINE__, error);
return error;
}


sleep(2);
=====State 14=====


memset(data, 0, sizeof(data));
* Command '''0x203''' is sent to WLAN device.


ptr = data;
=====State 15=====


*ptr++ = 0x1;
* Command '''0x105f''' is sent to WLAN device.
* Command data sent to WLAN device contains MAC address, channel info and region code.


data_size = 0x4;
=====State 16=====


error = usb_wlan_cmd_send(0x207, data, data_size);
* LV2 waits for an event from WLAN device.
if (error) {
fprintf(stderr, "%s:%d: could not send command 0x207 (%d)\n",
__func__, __LINE__, error);
return error;
}


sleep(2);
=====State 17=====


memset(data, 0, sizeof(data));
* LV2 accepts commands sent by LV2 syscall 726.


ptr = data;
===Test Program===


*ptr++ = 0x4;
* Here is a small program which executes a WLAN scan.
* I used libusb.


data_size = 0x4;
====Source Code====
<pre>


error = usb_wlan_cmd_send(0x203, data, data_size);
/*
if (error) {
* PS3 USB WLAN
fprintf(stderr, "%s:%d: could not send command 0x203 (%d)\n",
*
__func__, __LINE__, error);
* Copyright (C) 2011 glevand ([email protected])
return error;
* All rights reserved.
}
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published
* by the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/


sleep(2);
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>
#include <stdint.h>
#include <unistd.h>
#include <pthread.h>


/* state 0xf */
#include <libusb-1.0/libusb.h>


memset(data, 0, sizeof(data));
#define USB_VENDOR_ID 0x054c /* $ONY */
#define USB_PRODUCT_ID 0x036f
#define USB_IFACE_NUMBER 3


ptr = data;
#define USB_INTR_TRANSFER_EP5_IN_BUF_SIZE 0x800
#define USB_INTR_TRANSFER_EP5_OUT_BUF_SIZE 0x800


*ptr++ = 0xff;
struct wlan_cmd_pkt_hdr {
*ptr++ = 0x1f;
uint8_t unknown1;
uint8_t unknown2;
uint8_t unknown3;
uint8_t unknown4;
uint16_t unknown5;
uint8_t res1[2];
uint16_t tag;
uint8_t res2[14];
} __attribute__ ((packed));


memcpy(ptr, my_mac_addr, sizeof(my_mac_addr));
struct wlan_cmd_hdr {
 
uint16_t command;
ptr = data + 0x8;
uint16_t tag;
uint16_t status;
uint16_t payload_size;
uint8_t res[4];
} __attribute__ ((packed));


*ptr++ = 0x2;
struct wlan_event_pkt_hdr {
*ptr++ = 0x2;
uint8_t unknown1;
uint8_t unknown2;
uint8_t unknown3;
uint8_t event_count;
} __attribute__ ((packed));
 
static libusb_context *usb_ctx;
static libusb_device_handle *usb_dev_handle;
 
static struct libusb_transfer *usb_intr_transfer_ep5_in;
static unsigned char usb_intr_transfer_ep5_in_buf[USB_INTR_TRANSFER_EP5_IN_BUF_SIZE];
 
static unsigned char usb_intr_transfer_ep5_out_buf[USB_INTR_TRANSFER_EP5_OUT_BUF_SIZE];
 
static pthread_mutex_t usb_wlan_cmd_mutex;
static pthread_cond_t usb_wlan_cmd_cond;
static int volatile usb_wlan_cmd_busy;
static uint16_t usb_wlan_cmd;
static void *usb_wlan_cmd_data;


data_size = 0xa;
static int volatile usb_wlan_cmd_thread_done;


error = usb_wlan_cmd_send(0x105f, data, data_size);
/*
if (error) {
* WLAN won't work without this magic !!!
fprintf(stderr, "%s:%d: could not send command 0x105f (%d)\n",
*/
__func__, __LINE__, error);
static unsigned char usb_magic_data[] = {
return error;
0x76, 0x4e, 0x4b, 0x07, 0x24, 0x42, 0x53, 0xfb, 0x5a, 0xc7, 0xcc, 0x1d, 0xae, 0x00, 0xc6, 0xd8,
}
0x14, 0x40, 0x61, 0x8b, 0x13, 0x17, 0x4d, 0x7c, 0x3b, 0xb6, 0x90, 0xb8, 0x6e, 0x8b, 0xbb, 0x1d,
};


return 0;
static unsigned char my_mac_addr[] = {
}
0x00, 0x11, 0x22, 0x33, 0x44, 0x55,
};


/*
/*
  * usb_wlan_cmd_thread
  * hexdump
  */
  */
static void *usb_wlan_cmd_thread(void *arg)
static void hexdump(const unsigned char *data, unsigned int data_size)
{
{
int error;
int i, j;


error = usb_wlan_init();
for (i = 0; i < data_size; i += 16) {
if (error) {
fprintf(stdout, "%08x:", i);
fprintf(stderr, "%s:%d: could not initialize device (%d)\n",
__func__, __LINE__, error);
goto done;
}


sleep(5);
for (j = 0; j < 16; j++) {
 
if (i + j < data_size) {
error = usb_wlan_cmd_0x99();
fprintf(stdout, " %02x", data[i + j]);
if (error) {
} else {
fprintf(stderr, "%s:%d: could not start scanning (%d)\n",
fprintf(stdout, "  ");
__func__, __LINE__, error);
}
goto done;
}
}


error = usb_wlan_cmd_start_scan();
fprintf(stdout, " |");
if (error) {
fprintf(stderr, "%s:%d: could not start scanning (%d)\n",
__func__, __LINE__, error);
goto done;
}


sleep(10);
for (j = 0; j < 16; j++) {
if (i + j < data_size) {
if (isprint(data[i + j]))
fprintf(stdout, "%c", data[i + j]);
else
fprintf(stdout, ".");
} else {
fprintf(stdout, " ");
}
}


error = usb_wlan_cmd_get_scan_results();
fprintf(stdout, "|\n");
if (error) {
fprintf(stderr, "%s:%d: could not get scan results (%d)\n",
__func__, __LINE__, error);
goto done;
}
}
}


sleep(10);
/*
* usb_handle_wlan_event
*/
static void usb_handle_wlan_event(struct wlan_event_pkt_hdr *wlan_event_pkt_hdr)
{
fprintf(stdout, "%s:%d: === got WLAN event ===\n", __func__, __LINE__);


done:
/*
fprintf(stdout, "%s:%d: event packet header:\n", __func__, __LINE__);
fprintf(stdout, "%s:%d: unknown1 (0x%02x)\n", __func__, __LINE__,
wlan_event_pkt_hdr->unknown1);
fprintf(stdout, "%s:%d: unknown2 (0x%02x)\n", __func__, __LINE__,
wlan_event_pkt_hdr->unknown2);
fprintf(stdout, "%s:%d: unknown3 (0x%02x)\n", __func__, __LINE__,
wlan_event_pkt_hdr->unknown3);
*/
fprintf(stdout, "%s:%d: event_count (0x%02x)\n", __func__, __LINE__,
wlan_event_pkt_hdr->event_count);


usb_wlan_cmd_thread_done = 1;
hexdump((unsigned char *) (wlan_event_pkt_hdr + 1), wlan_event_pkt_hdr->event_count * 64);
 
return NULL;
}
}


/*
/*
  * main
  * usb_handle_wlan_cmd_response
  */
  */
int main(int argc, char **argv)
static void usb_handle_wlan_cmd_response(struct wlan_cmd_pkt_hdr *wlan_cmd_pkt_hdr)
{
{
unsigned char buf[256];
struct wlan_cmd_hdr *wlan_cmd_hdr;
pthread_t tid;
uint8_t *wlan_cmd_payload;
struct timeval tv;
int error;


pthread_mutex_init(&usb_wlan_cmd_mutex, NULL);
fprintf(stdout, "%s:%d: === got WLAN command response ===\n", __func__, __LINE__);
pthread_cond_init(&usb_wlan_cmd_cond, NULL);


error = libusb_init(&usb_ctx);
wlan_cmd_hdr = (struct wlan_cmd_hdr *) (wlan_cmd_pkt_hdr + 1);
if (error) {
wlan_cmd_payload = (uint8_t *) (wlan_cmd_hdr + 1);
fprintf(stderr, "%s:%d: libusb_init failed (%d)\n", __func__, __LINE__, error);
exit(1);
}


libusb_set_debug(usb_ctx, 5);
/* convert all header fields to big-endian byte order !!! */


usb_dev_handle = libusb_open_device_with_vid_pid(usb_ctx, USB_VENDOR_ID, USB_PRODUCT_ID);
wlan_cmd_pkt_hdr->unknown5 = le16toh(wlan_cmd_pkt_hdr->unknown5);
if (!usb_dev_handle) {
wlan_cmd_pkt_hdr->tag = le16toh(wlan_cmd_pkt_hdr->tag); /* returned from request */
fprintf(stderr, "%s:%d: could not open device\n", __func__, __LINE__);
exit(1);
}


if(libusb_kernel_driver_active(usb_dev_handle, USB_IFACE_NUMBER)) {
wlan_cmd_hdr->command = le16toh(wlan_cmd_hdr->command); /* request command + 1 */
fprintf(stdout, "%s:%d: kernel driver is attached\n", __func__, __LINE__);
wlan_cmd_hdr->tag = le16toh(wlan_cmd_hdr->tag); /* returned from request */
wlan_cmd_hdr->status = le16toh(wlan_cmd_hdr->status); /* 1 - success
  2 - invalid parameters ???
  3 - invalid command ??? */
wlan_cmd_hdr->payload_size = le16toh(wlan_cmd_hdr->payload_size); /* length of data that follows the header */


error = libusb_detach_kernel_driver(usb_dev_handle, USB_IFACE_NUMBER);
/*
if (error) {
fprintf(stdout, "%s:%d: command packet header:\n", __func__, __LINE__);
fprintf(stderr, "%s:%d: could not detach kernel driver (%d)\n",
fprintf(stdout, "%s:%d: unknown1 (0x%02x)\n", __func__, __LINE__,
__func__, __LINE__, error);
wlan_cmd_pkt_hdr->unknown1);
exit(1);
fprintf(stdout, "%s:%d: unknown2 (0x%02x)\n", __func__, __LINE__,
}
wlan_cmd_pkt_hdr->unknown2);
fprintf(stdout, "%s:%d: unknown3 (0x%02x)\n", __func__, __LINE__,
wlan_cmd_pkt_hdr->unknown3);
fprintf(stdout, "%s:%d: unknown4 (0x%02x)\n", __func__, __LINE__,
wlan_cmd_pkt_hdr->unknown4);
fprintf(stdout, "%s:%d: unknown5 (0x%04x)\n", __func__, __LINE__,
wlan_cmd_pkt_hdr->unknown5);
fprintf(stdout, "%s:%d: tag (0x%04x)\n", __func__, __LINE__,
wlan_cmd_pkt_hdr->tag);
*/


fprintf(stdout, "%s:%d: kernel driver dettached\n", __func__, __LINE__);
fprintf(stdout, "%s:%d: command header:\n", __func__, __LINE__);
}
fprintf(stdout, "%s:%d: command (0x%04x)\n", __func__, __LINE__,
wlan_cmd_hdr->command);


error = libusb_claim_interface(usb_dev_handle, USB_IFACE_NUMBER);
if ((usb_wlan_cmd + 1) != wlan_cmd_hdr->command)
if (error) {
fprintf(stdout, "%s:%d: ==> command does not match, got (0x%04x) expected (0x%04x)\n",
fprintf(stderr, "%s:%d: could not claim interface (%d)\n",
__func__, __LINE__, wlan_cmd_hdr->command, usb_wlan_cmd + 1);
__func__, __LINE__, error);
exit(1);
}


error = libusb_control_transfer(usb_dev_handle, 0x40, 0x1, 0x9, 0x0,
fprintf(stdout, "%s:%d: tag (0x%04x)\n", __func__, __LINE__,
usb_magic_data, sizeof(usb_magic_data), 0);
wlan_cmd_hdr->tag);
if (error < 0) {
fprintf(stdout, "%s:%d: status (0x%04x)\n", __func__, __LINE__,
fprintf(stderr, "%s:%d: could not do control transfer (%d)\n",
wlan_cmd_hdr->status);
__func__, __LINE__, error);
 
exit(1);
if (wlan_cmd_hdr->status != 0x1)
}
fprintf(stdout, "%s:%d: ==> command status != 0x1\n", __func__, __LINE__);
 
fprintf(stdout, "%s:%d: payload_size (0x%04x)\n", __func__, __LINE__,
wlan_cmd_hdr->payload_size);
 
fprintf(stdout, "%s:%d: command payload:\n", __func__, __LINE__);
 
hexdump(wlan_cmd_payload, wlan_cmd_hdr->payload_size);
 
memcpy(usb_wlan_cmd_data, wlan_cmd_payload, wlan_cmd_hdr->payload_size);
 
pthread_mutex_lock(&usb_wlan_cmd_mutex);
 
usb_wlan_cmd_busy = 0;
 
pthread_cond_signal(&usb_wlan_cmd_cond);
 
pthread_mutex_unlock(&usb_wlan_cmd_mutex);
}


fprintf(stdout, "%s:%d: number of bytes transferred (%d)\n", __func__, __LINE__, error);
/*
* usb_intr_transfer_ep5_in_cb
*/
static void usb_intr_transfer_ep5_in_cb(struct libusb_transfer *transfer)
{
struct wlan_cmd_pkt_hdr *wlan_cmd_pkt_hdr;
int error;


error = libusb_control_transfer(usb_dev_handle, 0xc0, 0x0, 0x2, 0x0, buf, 2, 0);
fprintf(stdout, "%s:%d: === got interrupt transfer ===\n", __func__, __LINE__);
if (error < 0) {
fprintf(stderr, "%s:%d: could not do control transfer (%d)\n",
__func__, __LINE__, error);
exit(1);
}


fprintf(stdout, "%s:%d: number of bytes received (%d)\n", __func__, __LINE__, error);
fprintf(stdout, "%s:%d: transfer status (%d) length (%d)\n",
__func__, __LINE__, transfer->status, transfer->actual_length);


fprintf(stdout, "%s:%d: 0x%02x 0x%02x\n", __func__, __LINE__, buf[0], buf[1]);
wlan_cmd_pkt_hdr = (struct wlan_cmd_pkt_hdr *) transfer->buffer;


usb_intr_transfer_ep5_in = libusb_alloc_transfer(0);
if (wlan_cmd_pkt_hdr->unknown3 == 0x6)
if (!usb_intr_transfer_ep5_in) {
usb_handle_wlan_cmd_response(wlan_cmd_pkt_hdr);
fprintf(stderr, "%s:%d: could not allocate transfer\n", __func__, __LINE__);
else if (wlan_cmd_pkt_hdr->unknown3 == 0x8)
exit(1);
usb_handle_wlan_event((struct wlan_event_pkt_hdr *) transfer->buffer);
}
else
fprintf(stdout, "%s:%d: got unknown packet (0x%02x)\n",
__func__, __LINE__, wlan_cmd_pkt_hdr->unknown3);


memset(usb_intr_transfer_ep5_in_buf, 0, sizeof(usb_intr_transfer_ep5_in_buf));
memset(usb_intr_transfer_ep5_in_buf, 0, sizeof(usb_intr_transfer_ep5_in_buf));
Line 8,101: Line 8,969:
exit(1);
exit(1);
}
}
}


error = pthread_create(&tid, NULL, usb_wlan_cmd_thread, NULL);
/*
if (error) {
* usb_intr_transfer_ep5_out_cb
fprintf(stderr, "%s:%d: could not create WLAN command thread (%d)\n",
*/
__func__, __LINE__, error);
static void usb_intr_transfer_ep5_out_cb(struct libusb_transfer *transfer)
exit(1);
{
}
/*
fprintf(stdout, "%s:%d: sent interrupt transfer\n", __func__, __LINE__);


while (!usb_wlan_cmd_thread_done) {
fprintf(stdout, "%s:%d: transfer status (%d)\n", __func__, __LINE__, transfer->status);
tv.tv_sec = 1;
*/
tv.tv_usec = 0;


error = libusb_handle_events_timeout(usb_ctx, &tv);
libusb_free_transfer(transfer);
if (error) {
}
fprintf(stderr, "%s:%d: could not handle events (%d)\n",
__func__, __LINE__, error);
exit(1);
}
}


libusb_free_transfer(usb_intr_transfer_ep5_in);
/*
* usb_wlan_cmd_send
*/
static int usb_wlan_cmd_send(uint16_t command, const uint8_t *data, unsigned int data_size)
{
struct wlan_cmd_pkt_hdr *wlan_cmd_pkt_hdr;
struct wlan_cmd_hdr *wlan_cmd_hdr;
uint8_t *wlan_cmd_payload;
struct libusb_transfer *transfer;
int error;


error = libusb_release_interface(usb_dev_handle, USB_IFACE_NUMBER);
fprintf(stdout, "%s:%d: sending command (0x%04x) data size (0x%04x) command size (0x%04x)\n",
if (error)
__func__, __LINE__, command, data_size, data_size + sizeof(struct wlan_cmd_hdr));
fprintf(stderr, "%s:%d: could not release interface (%d)\n",
__func__, __LINE__, error);


libusb_close(usb_dev_handle);
transfer = libusb_alloc_transfer(0);
if (!transfer) {
fprintf(stderr, "%s:%d: could not allocate transfer\n", __func__, __LINE__);
error = -1;
goto fail;
}


libusb_exit(usb_ctx);
wlan_cmd_pkt_hdr = (struct wlan_cmd_pkt_hdr *) usb_intr_transfer_ep5_out_buf;
wlan_cmd_hdr = (struct wlan_cmd_hdr *) (wlan_cmd_pkt_hdr + 1);
wlan_cmd_payload = (uint8_t *) (wlan_cmd_hdr + 1);


exit(0);
wlan_cmd_pkt_hdr->unknown1 = 0x1;
}
wlan_cmd_pkt_hdr->unknown2 = 0x1;
</pre>
wlan_cmd_pkt_hdr->unknown3 = 0x6;
wlan_cmd_pkt_hdr->unknown4 = 0x0;
wlan_cmd_pkt_hdr->unknown5 = 0x1;
wlan_cmd_pkt_hdr->tag = 0xf00d; /* returned in response */


====Output====
wlan_cmd_hdr->command = command;
wlan_cmd_hdr->tag = 0xcafe; /* returned in response */
wlan_cmd_hdr->status = 0xa;
wlan_cmd_hdr->payload_size = data_size;


<pre>
memcpy(wlan_cmd_payload, data, data_size);
glevand@debian-hdd:~/ps3_usb_wlan$ sudo ./ps3_usb_wlan
 
sudo: unable to resolve host debian-hdd
usb_wlan_cmd = command;
main:824: number of bytes transferred (32)
usb_wlan_cmd_data = (void *) data;
main:833: number of bytes received (2)
 
main:835: 0x20 0x31
libusb_fill_interrupt_transfer(transfer, usb_dev_handle, LIBUSB_ENDPOINT_OUT | 0x5,
usb_wlan_cmd_send:288: sending command (0x114f) data size (0x0518) command size (0x0524)
usb_intr_transfer_ep5_out_buf,
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
sizeof(struct wlan_cmd_pkt_hdr) + sizeof(struct wlan_cmd_hdr) + wlan_cmd_hdr->payload_size,
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
usb_intr_transfer_ep5_out_cb, NULL, 0);
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
 
usb_handle_wlan_cmd_response:191: command header:
/* convert all header fields to little-endian byte order !!! */
usb_handle_wlan_cmd_response:192: command (0x1150)
 
usb_handle_wlan_cmd_response:199: tag (0xcafe)
wlan_cmd_pkt_hdr->unknown5 = htole16(wlan_cmd_pkt_hdr->unknown5);
usb_handle_wlan_cmd_response:201: status (0x0006)
wlan_cmd_pkt_hdr->tag = htole16(wlan_cmd_pkt_hdr->tag);
usb_handle_wlan_cmd_response:205: ==> command status != 0x1
 
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
wlan_cmd_hdr->command = htole16(wlan_cmd_hdr->command);
usb_handle_wlan_cmd_response:210: command payload:
wlan_cmd_hdr->tag = htole16(wlan_cmd_hdr->tag);
usb_wlan_cmd_send:288: sending command (0x1171) data size (0x0000) command size (0x000c)
wlan_cmd_hdr->status = htole16(wlan_cmd_hdr->status);
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
wlan_cmd_hdr->payload_size = htole16(wlan_cmd_hdr->payload_size);
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
 
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
error = libusb_submit_transfer(transfer);
usb_handle_wlan_cmd_response:191: command header:
if (error) {
usb_handle_wlan_cmd_response:192: command (0x1172)
fprintf(stderr, "%s:%d: could not submit transfer (%d)\n",
usb_handle_wlan_cmd_response:199: tag (0xcafe)
__func__, __LINE__, error);
usb_handle_wlan_cmd_response:201: status (0x0001)
goto fail_free_transfer;
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
}
usb_handle_wlan_cmd_response:210: command payload:
 
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
pthread_mutex_lock(&usb_wlan_cmd_mutex);
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (68)
 
usb_handle_wlan_event:133: === got WLAN event ===
usb_wlan_cmd_busy = 1;
usb_handle_wlan_event:144: event_count (0x01)
 
00000000: 00 04 00 00 10 00 00 00 3c 22 02 00 00 00 00 00 |........<"......|
while (usb_wlan_cmd_busy)
00000010: fc 90 02 c0 00 00 00 00 00 00 00 00 00 00 00 00 |................|
pthread_cond_wait(&usb_wlan_cmd_cond, &usb_wlan_cmd_mutex);
00000020: 13 00 00 20 00 00 00 00 00 00 00 00 00 00 00 00 |... ............|
 
00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
pthread_mutex_unlock(&usb_wlan_cmd_mutex);
usb_wlan_cmd_send:288: sending command (0x116f) data size (0x0004) command size (0x0010)
 
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
return 0;
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
 
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
fail_free_transfer:
usb_handle_wlan_cmd_response:191: command header:
 
usb_handle_wlan_cmd_response:192: command (0x1170)
libusb_free_transfer(transfer);
usb_handle_wlan_cmd_response:199: tag (0xcafe)
 
usb_handle_wlan_cmd_response:201: status (0x0001)
fail:
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
 
usb_handle_wlan_cmd_response:210: command payload:
return error;
usb_wlan_cmd_send:288: sending command (0x115b) data size (0x005e) command size (0x006a)
}
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
 
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
/*
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
* usb_wlan_cmd_start_scan
usb_handle_wlan_cmd_response:191: command header:
*/
usb_handle_wlan_cmd_response:192: command (0x115c)
static int usb_wlan_cmd_start_scan(void)
usb_handle_wlan_cmd_response:199: tag (0xcafe)
{
usb_handle_wlan_cmd_response:201: status (0x0001)
unsigned char data[256], *ptr;
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
unsigned int data_size;
usb_handle_wlan_cmd_response:210: command payload:
 
usb_wlan_cmd_send:288: sending command (0x1161) data size (0x0020) command size (0x002c)
memset(data, 0, sizeof(data));
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
 
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
ptr = data;
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
*ptr++ = 0x0;
usb_handle_wlan_cmd_response:191: command header:
*ptr++ = 0x1;
usb_handle_wlan_cmd_response:192: command (0x1162)
*ptr++ = 0x64;
usb_handle_wlan_cmd_response:199: tag (0xcafe)
*ptr++ = 0x0;
usb_handle_wlan_cmd_response:201: status (0x0001)
 
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
ptr = data + 0xa;
usb_handle_wlan_cmd_response:210: command payload:
*ptr++ = 0x3;
usb_wlan_cmd_send:288: sending command (0x110d) data size (0x0080) command size (0x008c)
 
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
*ptr++ = 13; /* number of channels */
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
*ptr++ = 1; /* channels */
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
*ptr++ = 2;
usb_handle_wlan_cmd_response:191: command header:
*ptr++ = 3;
usb_handle_wlan_cmd_response:192: command (0x110e)
*ptr++ = 4;
usb_handle_wlan_cmd_response:199: tag (0xcafe)
*ptr++ = 5;
usb_handle_wlan_cmd_response:201: status (0x0001)
*ptr++ = 6;
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
*ptr++ = 7;
usb_handle_wlan_cmd_response:210: command payload:
*ptr++ = 8;
usb_wlan_cmd_send:288: sending command (0x1031) data size (0x0002) command size (0x000e)
*ptr++ = 9;
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
*ptr++ = 10;
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (38)
*ptr++ = 11;
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
*ptr++ = 12;
usb_handle_wlan_cmd_response:191: command header:
*ptr++ = 13;
usb_handle_wlan_cmd_response:192: command (0x1032)
 
usb_handle_wlan_cmd_response:199: tag (0xcafe)
data_size = ptr - data;
usb_handle_wlan_cmd_response:201: status (0x0001)
 
usb_handle_wlan_cmd_response:207: payload_size (0x0002)
return usb_wlan_cmd_send(0x1035, data, data_size);
usb_handle_wlan_cmd_response:210: command payload:
}
00000000: 00 00                                          |..              |
 
usb_wlan_cmd_send:288: sending command (0x1041) data size (0x0006) command size (0x0012)
/*
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
* usb_wlan_cmd_get_scan_results
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (42)
*/
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
static int usb_wlan_cmd_get_scan_results(void)
usb_handle_wlan_cmd_response:191: command header:
{
usb_handle_wlan_cmd_response:192: command (0x1042)
unsigned char data[1456];
usb_handle_wlan_cmd_response:199: tag (0xcafe)
unsigned int data_size;
usb_handle_wlan_cmd_response:201: status (0x0001)
 
usb_handle_wlan_cmd_response:207: payload_size (0x0006)
memset(data, 0, sizeof(data));
usb_handle_wlan_cmd_response:210: command payload:
 
00000000: 00 11 22 33 44 55                              |.."3DU          |
data_size = sizeof(data);
usb_wlan_cmd_send:288: sending command (0x0029) data size (0x0002) command size (0x000e)
 
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
return usb_wlan_cmd_send(0x1033, data, data_size);
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (38)
}
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
 
usb_handle_wlan_cmd_response:191: command header:
/*
usb_handle_wlan_cmd_response:192: command (0x002a)
* usb_wlan_cmd_0x99
usb_handle_wlan_cmd_response:199: tag (0xcafe)
*/
usb_handle_wlan_cmd_response:201: status (0x0001)
static int usb_wlan_cmd_0x99(void)
usb_handle_wlan_cmd_response:207: payload_size (0x0002)
{
usb_handle_wlan_cmd_response:210: command payload:
unsigned char data[0x3e];
00000000: 02 02                                          |..              |
unsigned int data_size;
usb_wlan_cmd_send:288: sending command (0x110b) data size (0x000c) command size (0x0018)
 
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
memset(data, 0, sizeof(data));
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (48)
 
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
data_size = sizeof(data);
usb_handle_wlan_cmd_response:191: command header:
 
usb_handle_wlan_cmd_response:192: command (0x110c)
return usb_wlan_cmd_send(0x99, data, data_size);
usb_handle_wlan_cmd_response:199: tag (0xcafe)
}
usb_handle_wlan_cmd_response:201: status (0x0001)
 
usb_handle_wlan_cmd_response:207: payload_size (0x000c)
/*
usb_handle_wlan_cmd_response:210: command payload:
* usb_wlan_init
00000000: 01 00 00 00 00 00 00 00 20 00 00 00            |........ ...    |
*/
usb_wlan_cmd_send:288: sending command (0x1109) data size (0x0016) command size (0x0022)
static int usb_wlan_init(void)
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
{
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (58)
unsigned char data[1456], *ptr;
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
unsigned int data_size;
usb_handle_wlan_cmd_response:191: command header:
int error;
usb_handle_wlan_cmd_response:192: command (0x110a)
 
usb_handle_wlan_cmd_response:199: tag (0xcafe)
/* state 0x1 */
usb_handle_wlan_cmd_response:201: status (0x0001)
 
usb_handle_wlan_cmd_response:207: payload_size (0x0016)
memset(data, 0, sizeof(data));
usb_handle_wlan_cmd_response:210: command payload:
 
00000000: 01 00 00 00 15 27 12 00 06 00 00 00 09 00 01 00 |.....'..........|
data_size = 0x518;
00000010: ff ff ff ff ff ff                              |......          |
 
usb_wlan_cmd_send:288: sending command (0x0207) data size (0x0004) command size (0x0010)
error = usb_wlan_cmd_send(0x114f, data, data_size);
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
if (error) {
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (40)
fprintf(stderr, "%s:%d: could not send command 0x114f (%d)\n",
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
__func__, __LINE__, error);
usb_handle_wlan_cmd_response:191: command header:
return error;
usb_handle_wlan_cmd_response:192: command (0x0208)
}
usb_handle_wlan_cmd_response:199: tag (0xcafe)
 
usb_handle_wlan_cmd_response:201: status (0x0001)
sleep(2);
usb_handle_wlan_cmd_response:207: payload_size (0x0004)
 
usb_handle_wlan_cmd_response:210: command payload:
/* state 0x2 */
00000000: 01 00 00 00                                    |....            |
 
usb_wlan_cmd_send:288: sending command (0x0203) data size (0x0004) command size (0x0010)
memset(data, 0, sizeof(data));
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
 
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (40)
data_size = 0;
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
 
usb_handle_wlan_cmd_response:191: command header:
error = usb_wlan_cmd_send(0x1171, data, data_size);
usb_handle_wlan_cmd_response:192: command (0x0204)
if (error) {
usb_handle_wlan_cmd_response:199: tag (0xcafe)
fprintf(stderr, "%s:%d: could not send command 0x1171 (%d)\n",
usb_handle_wlan_cmd_response:201: status (0x0001)
__func__, __LINE__, error);
usb_handle_wlan_cmd_response:207: payload_size (0x0004)
return error;
usb_handle_wlan_cmd_response:210: command payload:
}
00000000: 04 00 00 00                                    |....            |
 
usb_wlan_cmd_send:288: sending command (0x105f) data size (0x000a) command size (0x0016)
sleep(2);
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
 
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
/* wait for a WLAN event */
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
 
usb_handle_wlan_cmd_response:191: command header:
/* state 0x4 */
usb_handle_wlan_cmd_response:192: command (0x1060)
 
usb_handle_wlan_cmd_response:199: tag (0xcafe)
memset(data, 0, sizeof(data));
usb_handle_wlan_cmd_response:201: status (0x0001)
 
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
ptr = data;
usb_handle_wlan_cmd_response:210: command payload:
 
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
*ptr++ = 0x1;
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (68)
usb_handle_wlan_event:133: === got WLAN event ===
usb_handle_wlan_event:144: event_count (0x01)
00000000: 80 00 00 00 00 10 00 00 9e 2b 02 00 04 00 00 00 |.........+......|
00000010: fc 90 02 c0 01 00 00 00 00 00 00 00 00 00 00 00 |................|
00000020: 13 00 00 20 00 00 00 00 00 00 00 00 00 00 00 00 |... ............|
00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
usb_wlan_cmd_send:288: sending command (0x0099) data size (0x003e) command size (0x004a)
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (98)
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
usb_handle_wlan_cmd_response:191: command header:
usb_handle_wlan_cmd_response:192: command (0x009a)
usb_handle_wlan_cmd_response:199: tag (0xcafe)
usb_handle_wlan_cmd_response:201: status (0x0001)
usb_handle_wlan_cmd_response:207: payload_size (0x003e)
usb_handle_wlan_cmd_response:210: command payload:
00000000: 4a 55 50 49 54 45 52 2d 54 57 4f 2d 46 57 2d 32 |JUPITER-TWO-FW-2|
00000010: 30 2e 30 2e 31 32 2e 70 30 28 4a 61 6e 20 31 39 |0.0.12.p0(Jan 19|
00000020: 20 32 30 31 30 20 32 31 3a 32 30 3a 35 33 29 00 | 2010 21:20:53).|
00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00      |..............  |
usb_wlan_cmd_send:288: sending command (0x1035) data size (0x0019) command size (0x0025)
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (61)
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
usb_handle_wlan_cmd_response:191: command header:
usb_handle_wlan_cmd_response:192: command (0x1036)
usb_handle_wlan_cmd_response:199: tag (0xcafe)
usb_handle_wlan_cmd_response:201: status (0x0001)
usb_handle_wlan_cmd_response:207: payload_size (0x0019)
usb_handle_wlan_cmd_response:210: command payload:
00000000: 00 01 64 00 00 00 00 00 00 00 03 0d 01 02 03 04 |..d.............|
00000010: 05 06 07 08 09 0a 0b 0c 0d                      |.........      |
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (68)
usb_handle_wlan_event:133: === got WLAN event ===
usb_handle_wlan_event:144: event_count (0x01)
00000000: 80 00 00 00 04 00 00 00 96 2e 02 00 01 00 00 00 |................|
00000010: fc 90 02 c0 00 00 00 00 00 00 00 00 00 00 00 00 |................|
00000020: 13 00 00 20 00 00 00 00 00 00 00 00 00 00 00 00 |... ............|
00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
usb_wlan_cmd_send:288: sending command (0x1033) data size (0x05b0) command size (0x05bc)
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (1403)
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
usb_handle_wlan_cmd_response:191: command header:
usb_handle_wlan_cmd_response:192: command (0x1034)
usb_handle_wlan_cmd_response:199: tag (0xcafe)
usb_handle_wlan_cmd_response:201: status (0x0001)
usb_handle_wlan_cmd_response:207: payload_size (0x0557)
usb_handle_wlan_cmd_response:210: command payload:
...
Here is scan output (removed by me)
...
</pre>


===Associate with AP===
data_size = 0x4;


* I got association with AP working.
error = usb_wlan_cmd_send(0x116f, data, data_size);
* If  WLAN device is connected to an AP then the green LED is on, when data is received then the LED blinks.
if (error) {
* '''Data reception works finally !!!'''
fprintf(stderr, "%s:%d: could not send command 0x116f (%d)\n",
__func__, __LINE__, error);
return error;
}


====How to Associate with WPA AP====
sleep(2);
* Set common configuration (command 0x1005)
* Set WPA configuration (command 0x1019)
* Set rate configuration (command 0x1ed)
* Associate (command 0x1001)


===Packet Reception===
/* state 0x5 */


* EP6 IN and EP7 IN endpoints are used for packet reception
memset(data, 0, sizeof(data));
* LV2 sends bulk transfers to both endpoints
* '''4''' bulk transfers are sent simultaneously for each enpoint
* Every bulk transfer is of size '''0x620'''
* '''Make sure you set multicast address filter properly or else you won't receive broadcast packets !!!'''
* Bulk transfers returned by the host controller which do not contain any data have size of '''0x10''' bytes else transfers contain valid Ethernet frame. All 802.11 related data is stripped by the WLAN Gelic device.
* '''Make sure you set right MAC address with command 0x115b else device won't be able to receive packets destined to its own MAC address !!!'''


====Test with libusb====
ptr = data;


<pre>
*ptr++ = 0x1;
usb_bulk_transfer_ep6_in_cb:318: === got data transfer ===
usb_bulk_transfer_ep6_in_cb:321: transfer status (0) length (98)
00000000: ff ff ff ff ff ff ?? ?? ?? ?? ?? ?? 08 00 45 00 |..............E.|
00000010: 00 54 00 00 40 00 40 01 b5 fe c0 a8 01 5b c0 a8 |.T..@.@......[..|
00000020: 01 ff 08 00 9c 69 0d 45 00 e2 4e 5d 34 26 00 07 |.....i.E..N]4&..|
00000030: df e1 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 |................|
00000040: 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 |.......... !"#$%|
00000050: 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 |&'()*+,-./012345|
00000060: 36 37                                          |67              |
usb_bulk_transfer_ep6_in_cb:318: === got data transfer ===
usb_bulk_transfer_ep6_in_cb:321: transfer status (0) length (16)
00000000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 00 |................|
usb_bulk_transfer_ep6_in_cb:318: === got data transfer ===
usb_bulk_transfer_ep6_in_cb:321: transfer status (0) length (16)
00000000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 |................|
usb_bulk_transfer_ep6_in_cb:318: === got data transfer ===
usb_bulk_transfer_ep6_in_cb:321: transfer status (0) length (16)
00000000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 |................|
</pre>


====Multicast Address Filter====
ptr = data + 0x4;
memcpy(ptr, my_mac_addr, sizeof(my_mac_addr));


* WLAN Gelic device supports hardware multicast address filtering
data_size = 0x5e;
* Multicast address filtering is implemented with MAC address hashing and filter bitmap
* Filter bitmap is of size '''4 * 8''' bytes
* Multicast address filter is set with command '''0x1161'''


=====MAC Address Hash Function=====
error = usb_wlan_cmd_send(0x115b, data, data_size);
if (error) {
fprintf(stderr, "%s:%d: could not send command 0x115b (%d)\n",
__func__, __LINE__, error);
return error;
}


* Used by LV2
sleep(2);


<pre>
/* state 0x6 */
unsigned char hash(unsigned char *data, unsigned int size)
{
        unsigned int hash;
        int i, j;


        /*XXX: reverse data bits */
memset(data, 0, sizeof(data));


        hash = 0xffffffff;
ptr = data + 0x1c;


        for (i = 0; i < size; i++) {
*ptr++ = 0x20;
                hash = (((unsigned int) data[i]) << 24) ^ hash;


                for (j = 0; j < 8; j++) {
data_size = 0x20;
                        if (((int) hash) >= 0) {
                                hash = hash << 1;
                        } else {
                                hash = (hash << 1) ^ 0x04c10000;
                                hash = hash ^ 0x00001db7;
                        }
                }
        }


        hash = ((hash >> 24) & 0xf8) | (hash & 0x7);
error = usb_wlan_cmd_send(0x1161, data, data_size);
if (error) {
fprintf(stderr, "%s:%d: could not send command 0x1161 (%d)\n",
__func__, __LINE__, error);
return error;
}


        return hash & 0xff;
sleep(2);
}


h = hash(mac_addr, 6);
memset(data, 0, sizeof(data));
v = 1 << (h & 0x1f);   /* word value in filter */
p = h >> 5;            /* word position in filter */


ptr = data + 0xc;
memset(ptr, 0xff, 7 * 4);


For broadcast address:
data_size = 0x80;
------------------------


v = 0x20000000
error = usb_wlan_cmd_send(0x110d, data, data_size);
p = 7
if (error) {
fprintf(stderr, "%s:%d: could not send command 0x110d (%d)\n",
__func__, __LINE__, error);
return error;
}


That's why 0x20 is used with command 0x1161 !!! Without it the device won't deliver broadcast traffic.
sleep(2);
Learned it the hard way, after 2 days of trying to get packet reception working :)
</pre>


===Packet Transmission===
memset(data, 0, sizeof(data));


* Tx packets are sent to EP6 OUT
data_size = 0x2;
* Tx packets are normal Ethernet frames, they don't contain any WLAN data or other headers


===AP Mode===
error = usb_wlan_cmd_send(0x1031, data, data_size);
if (error) {
fprintf(stderr, "%s:%d: could not send command 0x1031 (%d)\n",
__func__, __LINE__, error);
return error;
}


* I got AP mode working with security disabled for now
sleep(2);


====AP Mode with Security Disabled====
memset(data, 0, sizeof(data));


* Set AP SSID (command 0x5)
ptr = data;
* Set channel (command 0x11)
memcpy(ptr, my_mac_addr, sizeof(my_mac_addr));
* Set AP opmode (command 0xb9)
* Configure rate control (command 0x1ed)
* Set AP WEP Configuration (command 0x5b, all 0s)
* Command 0x61 (param 0x0)
* Command 0xc5 (param 0x0)
* Command 0x1 (param 0x1)
* Command 0x1dd (param 0x2)
* Now green LED should be on


===ps3-jupiter Linux Drivers===
data_size = 0x6;


* ps3_jupiter.ko is the common part of STA and AP mode. It implements a command interface to WLAN Gelic device and disptaches events to STA and AP drivers.
error = usb_wlan_cmd_send(0x1041, data, data_size);
* ps3_jupiter_sta.ko is a STA mode implementation.
if (error) {
* ps3_jupiter_ap.ko is a AP mode implementation.
fprintf(stderr, "%s:%d: could not send command 0x1041 (%d)\n",
* Simple scanning works already in STA mode (try it out with '''iwlist scan''')
__func__, __LINE__, error);
* Packet reception works
return error;
* Packet transmission works
}
* '''WPA/WPA2''' fully working and usable with '''wpa_supplicant'''


sleep(2);


'''Finally, after several weeks of hard programming and reversing, the WLAN driver ps3_jupiter_sta achieved the milestone where i can use it with WPA2 :) I actually use it currently with WPA2 on my PS3 slim. It works damn !!! Try it out and report bugs and problems to me.'''
/* state 0xa */


====TODO====
memset(data, 0, sizeof(data));


* Implement association in STA mode (finished)
ptr = data;
* Implement packet reception and transmission in STA mode (finished)
* Implement WEP support
* Implement AP mode
* Find out if Jupiter supports Monitor mode and if yes how to enable it
* Implement EURUS driver for PHATs (has many advantages over the old OtherOS approach, e.g. AP mode)
* Port to FreeBSD


==LV2 Network Stack==
*ptr++ = 0x2;
*ptr++ = 0x2;


* LV2 uses BSD network stack, e.g. '''struct mbuf'''
data_size = 0x2;
* It's almost identical to FreeBSD network stack.


===Network Device===
error = usb_wlan_cmd_send(0x29, data, data_size);
if (error) {
fprintf(stderr, "%s:%d: could not send command 0x29 (%d)\n",
__func__, __LINE__, error);
return error;
}


====IOCTLs====
sleep(2);


=====Set Multicast Address Filter (0x81012000)=====
memset(data, 0, sizeof(data));


* Sets multicast address filter
ptr = data;
* Uses LV1 calls '''lv1_net_remove_multicast_address''' and '''lv1_net_add_multicast_address''' for Ethernet Gelic device
* Uses Eurus commands '''0x1161''', '''0x1163''' and '''0x1165''' for WLAN Gelic device


=====Unknown (0x8101200E)=====
*ptr++ = 0x1;


* Uses LV1 call '''lv1_net_control(0x8000000000000001)'''
ptr = data + 8;


=====Unknown (0x81040000)=====
*ptr++ = 0x20;


* Uses LV1 call '''lv1_net_control(0x8, [0x0, 0x1 or 0x2])''' for Ethernet Gelic device
data_size = 0xc;
* Uses Eurus commands '''0x116F''', '''0x115D''' and '''0x115B''' for WLAN Gelic device


=====Enable/Disable WOL Magic Packet (0x81080000)=====
error = usb_wlan_cmd_send(0x110b, data, data_size);
if (error) {
fprintf(stderr, "%s:%d: could not send command 0x110b (%d)\n",
__func__, __LINE__, error);
return error;
}


* Enables/Disables WOL Magic Packet
sleep(2);
* Uses LV1 call '''lv1_net_control(0x5 /* GELIC_LV1_SET_WOL */, 0x1 /* GELIC_LV1_WOL_MAGIC_PACKET */)''' for Ethernet Gelic device
* Uses Eurus commands '''0x1139''' and '''0x1155''' for WLAN Gelic device


=====Unknown (0x81080001)=====
memset(data, 0, sizeof(data));


* Uses LV1 call '''lv1_net_control(0x5 /* GELIC_LV1_SET_WOL */, 0x2)''' for Ethernet Gelic device
ptr = data;
* Uses Eurus commands '''0x113B''' and '''0x1157''' for WLAN Gelic device


=====Unknown (0x81080002)=====
*ptr++ = 0x1;


* Uses LV1 call '''lv1_net_control(0x5 /* GELIC_LV1_SET_WOL */, 0x3)''' for Ethernet Gelic device
ptr = data + 0x4;
* Uses Eurus commands '''0x113D''' and '''0x1159''' for WLAN Gelic device


=====Unknown (0x81080003)=====
*ptr++ = 0x15;
*ptr++ = 0x27;


* Uses LV1 call '''lv1_net_control(0x5 /* GELIC_LV1_SET_WOL */, 0x4)''' for Ethernet Gelic device
*ptr++ = 0x12;
* Uses Eurus command '''0x1161''' for WLAN Gelic device
*ptr++ = 0x0;


=====Unknown (0x81080005)=====
*ptr++ = 0x6;
*ptr++ = 0x0;


* Uses LV1 call '''lv1_net_control(0x5 /* GELIC_LV1_SET_WOL */, 0x6 /* GELIC_LV1_WOL_ADD_MATCH_ADDR */)''' for Ethernet Gelic device
ptr = data + 0xc;
* Uses Eurus commands '''0x116D''' and '''0x1167''' for WLAN Gelic device


===Network Packet===
*ptr++ = 0x9;
*ptr++ = 0x0;
*ptr++ = 0x1;


* LV2 network packet is represented by '''struct mbuf'''
ptr = data + 0x10;


=RSX=
*ptr++ = 0xff;
Crossreference: [http://wiki.gitbrew.org/index.php/PS3:HvReverseEngineering#RSX gitbrew.org::RSX] <br />
*ptr++ = 0xff;
*ptr++ = 0xff;
*ptr++ = 0xff;
*ptr++ = 0xff;
*ptr++ = 0xff;


==HV Calls==
data_size = 0x16;


===lv1_gpu_memory_allocate===
error = usb_wlan_cmd_send(0x1109, data, data_size);
if (error) {
fprintf(stderr, "%s:%d: could not send command 0x1109 (%d)\n",
__func__, __LINE__, error);
return error;
}


* LV1 supports 16 memory handles simultaneously.
sleep(2);
* LV1 uses a bitmap to manage GPU VRAM.
* The bitmap is located in LV1 memory, 4 double words.
* Each bit corresponds to 1MB VRAM, 256bit = 256MB VRAM.
* 2MB at the top of VRAM are preallocated as you can see below.


<pre>
memset(data, 0, sizeof(data));
<memory handle> = 0x5a5a5a5a xor <memory handle index>
</pre>


====Memory Context Object====
ptr = data;


offset 0x8 - memory handle (4 bytes)
*ptr++ = 0x1;


offset 0x10 - VRAM LPAR start address (8 bytes)
data_size = 0x4;


offset 0x18 - VRAM LPAR end address (8 bytes)
error = usb_wlan_cmd_send(0x207, data, data_size);
if (error) {
fprintf(stderr, "%s:%d: could not send command 0x207 (%d)\n",
__func__, __LINE__, error);
return error;
}


====Test====
sleep(2);


* The offset of bitmap could be different on your system because it's allocated dynamically.
memset(data, 0, sizeof(data));
* '''First 9MB of VRAM were allocated by ps3fb Linux driver.'''


Before allocating VRAM:
ptr = data;
<pre>
glevand@debian-hdd:~$ sudo dd if=/dev/ps3ram bs=1 count=$((0x20)) skip=$((0x1f85b0)) | hexdump -C
00000000  00 00 00 00 00 00 01 ff  00 00 00 00 00 00 00 00  |.......ÿ........|
00000010  00 00 00 00 00 00 00 00  c0 00 00 00 00 00 00 00  |........À.......|
</pre>


After allocating 32 MB VRAM:
*ptr++ = 0x4;
<pre>
glevand@debian-hdd:~$ sudo dd if=/dev/ps3ram bs=1 count=$((0x20)) skip=$((0x1f85b0)) | hexdump -C
00000000  00 00 01 ff ff ff ff ff  00 00 00 00 00 00 00 00  |...ÿÿÿÿÿ........|
00000010  00 00 00 00 00 00 00 00  c0 00 00 00 00 00 00 00  |........À.......|
</pre>


===lv1_gpu_context_allocate===
data_size = 0x4;


* Register %r4 is flags.
error = usb_wlan_cmd_send(0x203, data, data_size);
* '''Found the place in LV1 where LV1 sets IO page size for GART memory mapping. We could patch it and set to 4KB. That would make a lot of things easier for RSX developers on Linux.'''
if (error) {
* 1MB pages make RSX driver for Linux hard to implement because allocating 1Mb contiguous memory chunk on Linux is very very hard especially on a system with only 256MB and which was running for some time.
fprintf(stderr, "%s:%d: could not send command 0x203 (%d)\n",
__func__, __LINE__, error);
return error;
}


* LV1 supports 16 contexts simultaneously.
sleep(2);
* LV1 has an array of context pointers.
* Each context has an index and a handle. The handle is derived from the index of the context.


<pre>
/* state 0xf */
<context handle> = 0x55555555 xor <context index>
</pre>


* Thats why first created context will have handle 0x55555555.
memset(data, 0, sizeof(data));


====Context Object====
ptr = data;


offset 0x8 - handle (4 bytes)
*ptr++ = 0xff;
*ptr++ = 0x1f;


offset 0x48 - IO page size, valid range is 4kB, 64KB and 1MB (8 bytes)
memcpy(ptr, my_mac_addr, sizeof(my_mac_addr));


====Flags====
ptr = data + 0x8;


'''0x2 - tells LV1 to use 64KB pages for GART memory mapping else LV1 uses 1MB pages'''
*ptr++ = 0x2;
*ptr++ = 0x2;


===lv1_gpu_context_iomap===
data_size = 0xa;


* Internally uses lv1_put_iopte function
error = usb_wlan_cmd_send(0x105f, data, data_size);
* IO page size is the one set during lv1_gpu_context_allocate
if (error) {
* IO address space id is 0x0. IO id is 0x1.
fprintf(stderr, "%s:%d: could not send command 0x105f (%d)\n",
__func__, __LINE__, error);
return error;
}


===lv1_gpu_context_attribute===
return 0;
}


====Attribute 0x1====
/*
* usb_wlan_cmd_thread
*/
static void *usb_wlan_cmd_thread(void *arg)
{
int error;


=====FIFO Command Buffer Setup=====
error = usb_wlan_init();
if (error) {
fprintf(stderr, "%s:%d: could not initialize device (%d)\n",
__func__, __LINE__, error);
goto done;
}


<pre>
sleep(5);
lv1_gpu_context_attribute(context handle, 0x1, PUT offset, GET offset, 0x0, 0x0)
</pre>


====Attribute 0x101====
error = usb_wlan_cmd_0x99();
if (error) {
fprintf(stderr, "%s:%d: could not start scanning (%d)\n",
__func__, __LINE__, error);
goto done;
}


=====Set Flip Mode=====
error = usb_wlan_cmd_start_scan();
if (error) {
fprintf(stderr, "%s:%d: could not start scanning (%d)\n",
__func__, __LINE__, error);
goto done;
}


<pre>
sleep(10);
lv1_gpu_attribute(0x2, 0x1 /* head */, 0x0, 0x0)
lv1_gpu_context_attribute(context handle, 0x101, 0x1 /* head */, sync mode, 0x0, 0x0)
</pre>


====Attribute 0x104====
error = usb_wlan_cmd_get_scan_results();
 
if (error) {
=====Set Display Buffer=====
fprintf(stderr, "%s:%d: could not get scan results (%d)\n",
__func__, __LINE__, error);
goto done;
}


<pre>
sleep(10);
lv1_gpu_context_attribute(context handle, 0x104, id, width << 32 | height, pitch << 32 | offset, 0x0)
</pre>


====Attribute 0x10a====
done:


=====Get Flip Status=====
usb_wlan_cmd_thread_done = 1;


* Reads a value at offset '''0x10C0 + 0x1 * 0x40''' in lpar_reports memory.
return NULL;
}


=====Reset Flip Status=====
/*
* main
*/
int main(int argc, char **argv)
{
unsigned char buf[256];
pthread_t tid;
struct timeval tv;
int error;


<pre>
pthread_mutex_init(&usb_wlan_cmd_mutex, NULL);
lv1_gpu_context_attribute(context handle, 0x10a, 0x1 /* id */, 0x7fffffff /* mask */, 0x0 /* value */, 0x0)
pthread_cond_init(&usb_wlan_cmd_cond, NULL);
</pre>


* The LV1 call '''lv1_gpu_context_attribute(0x10a)''' accesses LPAR memory returned in '''lpar_reports''' by LV1 call '''lv1_gpu_context_allocate'''.
error = libusb_init(&usb_ctx);
* Offset into lpar_reports is '''0x10C0 + id * 0x40 = 0x10C0 + 0x1 * 0x40'''.
if (error) {
* Why not access lpar_reports memory directly and use LV1 call instead ???
fprintf(stderr, "%s:%d: libusb_init failed (%d)\n", __func__, __LINE__, error);
exit(1);
}


====Attribute 0x10b====
libusb_set_debug(usb_ctx, 5);


* '''This attribute is NOT available on 3.15 LV1 e.g. but on 3.41 it's implemented.'''
usb_dev_handle = libusb_open_device_with_vid_pid(usb_ctx, USB_VENDOR_ID, USB_PRODUCT_ID);
if (!usb_dev_handle) {
fprintf(stderr, "%s:%d: could not open device\n", __func__, __LINE__);
exit(1);
}


=====Set Cursor Position=====
if(libusb_kernel_driver_active(usb_dev_handle, USB_IFACE_NUMBER)) {
fprintf(stdout, "%s:%d: kernel driver is attached\n", __func__, __LINE__);


<pre>
error = libusb_detach_kernel_driver(usb_dev_handle, USB_IFACE_NUMBER);
lv1_gpu_context_attribute(context handle, 0x10b, 0x1, 0x3, x, y)
if (error) {
</pre>
fprintf(stderr, "%s:%d: could not detach kernel driver (%d)\n",
__func__, __LINE__, error);
exit(1);
}


=====Set Cursor Image Offset=====
fprintf(stdout, "%s:%d: kernel driver dettached\n", __func__, __LINE__);
}


<pre>
error = libusb_claim_interface(usb_dev_handle, USB_IFACE_NUMBER);
lv1_gpu_context_attribute(context handle, 0x10b, 0x1, 0x2, offset, 0x0)
if (error) {
</pre>
fprintf(stderr, "%s:%d: could not claim interface (%d)\n",
__func__, __LINE__, error);
exit(1);
}


====Attribute 0x10c====
error = libusb_control_transfer(usb_dev_handle, 0x40, 0x1, 0x9, 0x0,
usb_magic_data, sizeof(usb_magic_data), 0);
if (error < 0) {
fprintf(stderr, "%s:%d: could not do control transfer (%d)\n",
__func__, __LINE__, error);
exit(1);
}


* '''This attribute is NOT available on 3.15 LV1 e.g. but on 3.41 it's implemented.'''
fprintf(stdout, "%s:%d: number of bytes transferred (%d)\n", __func__, __LINE__, error);


=====Cursor Function 1=====
error = libusb_control_transfer(usb_dev_handle, 0xc0, 0x0, 0x2, 0x0, buf, 2, 0);
if (error < 0) {
fprintf(stderr, "%s:%d: could not do control transfer (%d)\n",
__func__, __LINE__, error);
exit(1);
}


<pre>
fprintf(stdout, "%s:%d: number of bytes received (%d)\n", __func__, __LINE__, error);
lv1_gpu_context_attribute(context handle, 0x10c, 0x1, 0x1, 0x0, 0x0)
</pre>


=====Cursor Function 2=====
fprintf(stdout, "%s:%d: 0x%02x 0x%02x\n", __func__, __LINE__, buf[0], buf[1]);


<pre>
usb_intr_transfer_ep5_in = libusb_alloc_transfer(0);
lv1_gpu_context_attribute(context handle, 0x10c, 0x1, 0x2, 0x0, 0x0)
if (!usb_intr_transfer_ep5_in) {
</pre>
fprintf(stderr, "%s:%d: could not allocate transfer\n", __func__, __LINE__);
exit(1);
}


====Attribute 0x10d====
memset(usb_intr_transfer_ep5_in_buf, 0, sizeof(usb_intr_transfer_ep5_in_buf));


* '''This attribute is NOT available on 3.15 LV1 e.g. but on 3.41 it's implemented.'''
libusb_fill_interrupt_transfer(usb_intr_transfer_ep5_in, usb_dev_handle, LIBUSB_ENDPOINT_IN | 0x5,
usb_intr_transfer_ep5_in_buf, sizeof(usb_intr_transfer_ep5_in_buf),
usb_intr_transfer_ep5_in_cb, NULL, 0);


=====Cursor Function 1=====
error = libusb_submit_transfer(usb_intr_transfer_ep5_in);
if (error) {
fprintf(stderr, "%s:%d: could not submit transfer (%d)\n",
__func__, __LINE__, error);
exit(1);
}


<pre>
error = pthread_create(&tid, NULL, usb_wlan_cmd_thread, NULL);
lv1_gpu_context_attribute(context handle, 0x10d, 0x1, 0x1, 0x0, 0x0)
if (error) {
</pre>
fprintf(stderr, "%s:%d: could not create WLAN command thread (%d)\n",
__func__, __LINE__, error);
exit(1);
}


====Attribute 0x300====
while (!usb_wlan_cmd_thread_done) {
tv.tv_sec = 1;
tv.tv_usec = 0;


=====Set Tile=====
error = libusb_handle_events_timeout(usb_ctx, &tv);
if (error) {
fprintf(stderr, "%s:%d: could not handle events (%d)\n",
__func__, __LINE__, error);
exit(1);
}
}


=====Set Invalidate Tile=====
libusb_free_transfer(usb_intr_transfer_ep5_in);


=====Bind Tile=====
error = libusb_release_interface(usb_dev_handle, USB_IFACE_NUMBER);
if (error)
fprintf(stderr, "%s:%d: could not release interface (%d)\n",
__func__, __LINE__, error);


=====Unbind Tile=====
libusb_close(usb_dev_handle);


====Attribute 0x301====
libusb_exit(usb_ctx);


=====Set Zcull=====
exit(0);
}
</pre>


=====Bind Zcull=====
====Output====
 
=====Unbind Zcull=====
 
====Attribute 0x601====
 
* Copies data from GART memory to VRAM.
* LV1 uses internally the FIFO command buffer passed by ps3fb driver with lv1_gpu_context_iomap.


FIFO commands:
<pre>
<pre>
0x0004C184
glevand@debian-hdd:~/ps3_usb_wlan$ sudo ./ps3_usb_wlan
0xFEED0001
sudo: unable to resolve host debian-hdd
 
main:824: number of bytes transferred (32)
0x0004C198
main:833: number of bytes received (2)
0x313371C3
main:835: 0x20 0x31
 
usb_wlan_cmd_send:288: sending command (0x114f) data size (0x0518) command size (0x0524)
0x00046300
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
0x0000000A
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
 
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
for ()
usb_handle_wlan_cmd_response:191: command header:
{
usb_handle_wlan_cmd_response:192: command (0x1150)
    for ()
usb_handle_wlan_cmd_response:199: tag (0xcafe)
    {
usb_handle_wlan_cmd_response:201: status (0x0006)
        0x0004630C
usb_handle_wlan_cmd_response:205: ==> command status != 0x1
        <param>
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
 
usb_handle_wlan_cmd_response:210: command payload:
        0x00046304
usb_wlan_cmd_send:288: sending command (0x1171) data size (0x0000) command size (0x000c)
        <param>
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
 
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
        0x0024C2FC
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
        0x00000001
usb_handle_wlan_cmd_response:191: command header:
        0x00000003
usb_handle_wlan_cmd_response:192: command (0x1172)
        0x00000003
usb_handle_wlan_cmd_response:199: tag (0xcafe)
        <param1>
usb_handle_wlan_cmd_response:201: status (0x0001)
        <param2>
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
        <param3>
usb_handle_wlan_cmd_response:210: command payload:
        <param4>
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
        0x00010000
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (68)
        0x00010000
usb_handle_wlan_event:133: === got WLAN event ===
 
usb_handle_wlan_event:144: event_count (0x01)
        0x0001C400
00000000: 00 04 00 00 10 00 00 00 3c 22 02 00 00 00 00 00 |........<"......|
        <param1>
00000010: fc 90 02 c0 00 00 00 00 00 00 00 00 00 00 00 00 |................|
        <param2>
00000020: 13 00 00 20 00 00 00 00 00 00 00 00 00 00 00 00 |... ............|
        <param3>
00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
        0x00000000
usb_wlan_cmd_send:288: sending command (0x116f) data size (0x0004) command size (0x0010)
    }
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
}
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
 
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
0x00040110
usb_handle_wlan_cmd_response:191: command header:
0x00000000
usb_handle_wlan_cmd_response:192: command (0x1170)
</pre>
usb_handle_wlan_cmd_response:199: tag (0xcafe)
 
usb_handle_wlan_cmd_response:201: status (0x0001)
==FIFO Command Buffer==
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
 
usb_handle_wlan_cmd_response:210: command payload:
===FIFO Control Registers===
usb_wlan_cmd_send:288: sending command (0x115b) data size (0x005e) command size (0x006a)
 
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
* LV1 call '''lv1_gpu_context_allocate''' returns LPAR address of FIFO control registers.
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
* You have to map it into Linux address space before you can access FIFO control registers.
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
* Value of PUT and GET registers are NOT expressed in Linux address space but in RSX address space. You have to convert it to RSX address space.
usb_handle_wlan_cmd_response:191: command header:
* GET register is read-only and is modified by RSX while it's processing FIFO commands.
usb_handle_wlan_cmd_response:192: command (0x115c)
 
usb_handle_wlan_cmd_response:199: tag (0xcafe)
===Kicking FIFO Command Buffer===
usb_handle_wlan_cmd_response:201: status (0x0001)
 
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
* As long as values of GET and PUT FIFO control registers are equal, RSX doesn't process commands from the FIFO command buffer.
usb_handle_wlan_cmd_response:210: command payload:
* When the value of PUT register is not equal to the value of GET register, RSX starts processing commands in the FIFO command buffer.
usb_wlan_cmd_send:288: sending command (0x1161) data size (0x0020) command size (0x002c)
* To execute FIFO commands, place them in the FIFO command buffer and change the value of PUT register.
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
 
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
===FIFO Setup Programs of emer_init.self===
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
 
usb_handle_wlan_cmd_response:191: command header:
* [[PS3:HvReverseEngineering:emer_init.self:Program 1]]
usb_handle_wlan_cmd_response:192: command (0x1162)
* [[PS3:HvReverseEngineering:emer_init.self:Program 2]]
usb_handle_wlan_cmd_response:199: tag (0xcafe)
* [[PS3:HvReverseEngineering:emer_init.self:Program 3]]
usb_handle_wlan_cmd_response:201: status (0x0001)
 
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
===FIFO Commands===
usb_handle_wlan_cmd_response:210: command payload:
 
usb_wlan_cmd_send:288: sending command (0x110d) data size (0x0080) command size (0x008c)
[[PS3:HvReverseEngineering:RSXFIFOCommands]]
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
 
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
===Example How to Use FIFO Command Buffer===
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
 
usb_handle_wlan_cmd_response:191: command header:
Here is a small Linux kernel module which shows you how to use FIFO command buffer on Linux.
usb_handle_wlan_cmd_response:192: command (0x110e)
 
usb_handle_wlan_cmd_response:199: tag (0xcafe)
* RSX allows to create multiple contexts.
usb_handle_wlan_cmd_response:201: status (0x0001)
* This kernel module should run without problems with '''ps3fb''' driver already running.
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
* Make sure you unload '''ps3vram''' driver before running this module because '''ps3vram''' allocates all available RSX memory for itself and because of this, '''lv1_gpu_memory_allocate''' will always fail.
usb_handle_wlan_cmd_response:210: command payload:
* This kernel module lets the RSX execute a simple program which contains only NOP (No Operation) commands.
usb_wlan_cmd_send:288: sending command (0x1031) data size (0x0002) command size (0x000e)
 
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
Download source code: [http://lol.notsoldierx.com/~glevand/ps3/linux/ps3rsx.tar.gz]
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (38)
 
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
====Source Code====
usb_handle_wlan_cmd_response:191: command header:
 
usb_handle_wlan_cmd_response:192: command (0x1032)
<pre>
usb_handle_wlan_cmd_response:199: tag (0xcafe)
/*
usb_handle_wlan_cmd_response:201: status (0x0001)
* PS3 RSX
usb_handle_wlan_cmd_response:207: payload_size (0x0002)
*
usb_handle_wlan_cmd_response:210: command payload:
* This program is free software; you can redistribute it and/or modify it
00000000: 00 00                                          |..              |
* under the terms of the GNU General Public License as published
usb_wlan_cmd_send:288: sending command (0x1041) data size (0x0006) command size (0x0012)
* by the Free Software Foundation; version 2 of the License.
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
*
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (42)
* This program is distributed in the hope that it will be useful, but
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
* WITHOUT ANY WARRANTY; without even the implied warranty of
usb_handle_wlan_cmd_response:191: command header:
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
usb_handle_wlan_cmd_response:192: command (0x1042)
* General Public License for more details.
usb_handle_wlan_cmd_response:199: tag (0xcafe)
*
usb_handle_wlan_cmd_response:201: status (0x0001)
* You should have received a copy of the GNU General Public License along
usb_handle_wlan_cmd_response:207: payload_size (0x0006)
* with this program; if not, write to the Free Software Foundation, Inc.,
usb_handle_wlan_cmd_response:210: command payload:
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
00000000: 00 11 22 33 44 55                              |.."3DU          |
*/
usb_wlan_cmd_send:288: sending command (0x0029) data size (0x0002) command size (0x000e)
 
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
#include <linux/module.h>
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (38)
#include <linux/kernel.h>
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
#include <linux/init.h>
usb_handle_wlan_cmd_response:191: command header:
#include <linux/slab.h>
usb_handle_wlan_cmd_response:192: command (0x002a)
#include <linux/io.h>
usb_handle_wlan_cmd_response:199: tag (0xcafe)
#include <linux/delay.h>
usb_handle_wlan_cmd_response:201: status (0x0001)
 
usb_handle_wlan_cmd_response:207: payload_size (0x0002)
#include <asm/abs_addr.h>
usb_handle_wlan_cmd_response:210: command payload:
#include <asm/cell-regs.h>
00000000: 02 02                                          |..             |
#include <asm/lv1call.h>
usb_wlan_cmd_send:288: sending command (0x110b) data size (0x000c) command size (0x0018)
#include <asm/ps3.h>
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
 
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (48)
#define RSX_FIFO_CMD_BUF_SIZE (1 * 1024 * 1024)
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
 
usb_handle_wlan_cmd_response:191: command header:
#define RSX_MEM_SIZE (32 * 1024 * 1024)
usb_handle_wlan_cmd_response:192: command (0x110c)
 
usb_handle_wlan_cmd_response:199: tag (0xcafe)
#define RSX_GPU_IOIF (0x0e000000ul)
usb_handle_wlan_cmd_response:201: status (0x0001)
 
usb_handle_wlan_cmd_response:207: payload_size (0x000c)
#define RSX_FIFO_CTRL_SIZE (4 * 1024)
usb_handle_wlan_cmd_response:210: command payload:
 
00000000: 01 00 00 00 00 00 00 00 20 00 00 00            |........ ...   |
struct rsx_fifo_ctrl {
usb_wlan_cmd_send:288: sending command (0x1109) data size (0x0016) command size (0x0022)
u8 res[0x40];
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
u32 put;
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (58)
u32 get;
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
};
usb_handle_wlan_cmd_response:191: command header:
 
usb_handle_wlan_cmd_response:192: command (0x110a)
static u32 *rsx_fifo_cmd_buf;
usb_handle_wlan_cmd_response:199: tag (0xcafe)
static u64 rsx_fifo_cmd_buf_lpar;
usb_handle_wlan_cmd_response:201: status (0x0001)
 
usb_handle_wlan_cmd_response:207: payload_size (0x0016)
static u64 rsx_mem_handle, rsx_mem_lpar;
usb_handle_wlan_cmd_response:210: command payload:
static u64 rsx_ctx_handle;
00000000: 01 00 00 00 15 27 12 00 06 00 00 00 09 00 01 00 |.....'..........|
static u64 rsx_fifo_ctrl_lpar;
00000010: ff ff ff ff ff ff                              |......          |
static u64 rsx_drv_info_lpar;
usb_wlan_cmd_send:288: sending command (0x0207) data size (0x0004) command size (0x0010)
static u64 rsx_reports_lpar, rsx_reports_size;
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
 
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (40)
static struct rsx_fifo_ctrl *rsx_fifo_ctrl;
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
 
usb_handle_wlan_cmd_response:191: command header:
/*
usb_handle_wlan_cmd_response:192: command (0x0208)
* FIFO program
usb_handle_wlan_cmd_response:199: tag (0xcafe)
*/
usb_handle_wlan_cmd_response:201: status (0x0001)
static u32 rsx_fifo_prg[] = {
usb_handle_wlan_cmd_response:207: payload_size (0x0004)
0x00000000, /* nop */
usb_handle_wlan_cmd_response:210: command payload:
0x00000000, /* nop */
00000000: 01 00 00 00                                    |....            |
0x00000000, /* nop */
usb_wlan_cmd_send:288: sending command (0x0203) data size (0x0004) command size (0x0010)
};
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
 
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (40)
/*
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
* ps3rsx_init
usb_handle_wlan_cmd_response:191: command header:
*/
usb_handle_wlan_cmd_response:192: command (0x0204)
static int __init ps3rsx_init(void)
usb_handle_wlan_cmd_response:199: tag (0xcafe)
{
usb_handle_wlan_cmd_response:201: status (0x0001)
unsigned long timeout;
usb_handle_wlan_cmd_response:207: payload_size (0x0004)
int res;
usb_handle_wlan_cmd_response:210: command payload:
 
00000000: 04 00 00 00                                    |....            |
/* FIFO command buffer must be allocated in XDR memory */
usb_wlan_cmd_send:288: sending command (0x105f) data size (0x000a) command size (0x0016)
 
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
rsx_fifo_cmd_buf = kmalloc(RSX_FIFO_CMD_BUF_SIZE, GFP_KERNEL);
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (36)
if (!rsx_fifo_cmd_buf) {
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
printk(KERN_INFO"could not allocate FIFO command buffer\n");
usb_handle_wlan_cmd_response:191: command header:
res = -ENOMEM;
usb_handle_wlan_cmd_response:192: command (0x1060)
goto fail;
usb_handle_wlan_cmd_response:199: tag (0xcafe)
}
usb_handle_wlan_cmd_response:201: status (0x0001)
 
usb_handle_wlan_cmd_response:207: payload_size (0x0000)
res = lv1_gpu_memory_allocate(RSX_MEM_SIZE, 0, 0, 0, 0,
usb_handle_wlan_cmd_response:210: command payload:
&rsx_mem_handle, &rsx_mem_lpar);
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
if (res) {
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (68)
printk(KERN_INFO"lv1_gpu_memory_allocate failed (%d)\n", res);
usb_handle_wlan_event:133: === got WLAN event ===
res = -ENXIO;
usb_handle_wlan_event:144: event_count (0x01)
goto fail_free_fifo_cmd_buf_mem;
00000000: 80 00 00 00 00 10 00 00 9e 2b 02 00 04 00 00 00 |.........+......|
}
00000010: fc 90 02 c0 01 00 00 00 00 00 00 00 00 00 00 00 |................|
 
00000020: 13 00 00 20 00 00 00 00 00 00 00 00 00 00 00 00 |... ............|
res = lv1_gpu_context_allocate(rsx_mem_handle, 0,
00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
&rsx_ctx_handle, &rsx_fifo_ctrl_lpar, &rsx_drv_info_lpar,
usb_wlan_cmd_send:288: sending command (0x0099) data size (0x003e) command size (0x004a)
&rsx_reports_lpar, &rsx_reports_size);
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
if (res) {
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (98)
printk(KERN_INFO"lv1_gpu_context_allocate failed (%d)\n", res);
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
res = -ENXIO;
usb_handle_wlan_cmd_response:191: command header:
goto fail_free_gpu_mem;
usb_handle_wlan_cmd_response:192: command (0x009a)
}
usb_handle_wlan_cmd_response:199: tag (0xcafe)
usb_handle_wlan_cmd_response:201: status (0x0001)
/* map FIFO command buffer into RSX address space */
usb_handle_wlan_cmd_response:207: payload_size (0x003e)
usb_handle_wlan_cmd_response:210: command payload:
00000000: 4a 55 50 49 54 45 52 2d 54 57 4f 2d 46 57 2d 32 |JUPITER-TWO-FW-2|
00000010: 30 2e 30 2e 31 32 2e 70 30 28 4a 61 6e 20 31 39 |0.0.12.p0(Jan 19|
00000020: 20 32 30 31 30 20 32 31 3a 32 30 3a 35 33 29 00 | 2010 21:20:53).|
00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00      |..............  |
usb_wlan_cmd_send:288: sending command (0x1035) data size (0x0019) command size (0x0025)
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (61)
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
usb_handle_wlan_cmd_response:191: command header:
usb_handle_wlan_cmd_response:192: command (0x1036)
usb_handle_wlan_cmd_response:199: tag (0xcafe)
usb_handle_wlan_cmd_response:201: status (0x0001)
usb_handle_wlan_cmd_response:207: payload_size (0x0019)
usb_handle_wlan_cmd_response:210: command payload:
00000000: 00 01 64 00 00 00 00 00 00 00 03 0d 01 02 03 04 |..d.............|
00000010: 05 06 07 08 09 0a 0b 0c 0d                      |.........      |
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (68)
usb_handle_wlan_event:133: === got WLAN event ===
usb_handle_wlan_event:144: event_count (0x01)
00000000: 80 00 00 00 04 00 00 00 96 2e 02 00 01 00 00 00 |................|
00000010: fc 90 02 c0 00 00 00 00 00 00 00 00 00 00 00 00 |................|
00000020: 13 00 00 20 00 00 00 00 00 00 00 00 00 00 00 00 |... ............|
00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
usb_wlan_cmd_send:288: sending command (0x1033) data size (0x05b0) command size (0x05bc)
usb_intr_transfer_ep5_in_cb:233: === got interrupt transfer ===
usb_intr_transfer_ep5_in_cb:236: transfer status (0) length (1403)
usb_handle_wlan_cmd_response:158: === got WLAN command response ===
usb_handle_wlan_cmd_response:191: command header:
usb_handle_wlan_cmd_response:192: command (0x1034)
usb_handle_wlan_cmd_response:199: tag (0xcafe)
usb_handle_wlan_cmd_response:201: status (0x0001)
usb_handle_wlan_cmd_response:207: payload_size (0x0557)
usb_handle_wlan_cmd_response:210: command payload:
...
Here is scan output (removed by me)
...
</pre>


rsx_fifo_cmd_buf_lpar = ps3_mm_phys_to_lpar(__pa(rsx_fifo_cmd_buf));
===Associate with AP===


res = lv1_gpu_context_iomap(rsx_ctx_handle,
* I got association with AP working.
RSX_GPU_IOIF, rsx_fifo_cmd_buf_lpar, RSX_FIFO_CMD_BUF_SIZE,
* If  WLAN device is connected to an AP then the green LED is on, when data is received then the LED blinks.
CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | CBE_IOPTE_M);
* '''Data reception works finally !!!'''
if (res) {
printk(KERN_INFO"lv1_gpu_context_iomap failed (%d)\n", res);
res = -ENXIO;
goto fail_free_gpu_mem;
}


/* map RSX FIFO control registers */
====How to Associate with WPA AP====
* Set common configuration (command 0x1005)
* Set WPA configuration (command 0x1019)
* Set rate configuration (command 0x1ed)
* Associate (command 0x1001)


rsx_fifo_ctrl = (struct rsx_fifo_ctrl *) ioremap(rsx_fifo_ctrl_lpar, RSX_FIFO_CTRL_SIZE);
===Packet Reception===
if (!rsx_fifo_ctrl) {
printk(KERN_INFO"could not map FIFO control\n");
res = -ENXIO;
goto fail_free_gpu_mem;
}


/* PUT and GET offsets are in RSX address space */
* EP6 IN and EP7 IN endpoints are used for packet reception
* LV2 sends bulk transfers to both endpoints
* '''4''' bulk transfers are sent simultaneously for each enpoint
* Every bulk transfer is of size '''0x620'''
* '''Make sure you set multicast address filter properly or else you won't receive broadcast packets !!!'''
* Bulk transfers returned by the host controller which do not contain any data have size of '''0x10''' bytes else transfers contain valid Ethernet frame. All 802.11 related data is stripped by the WLAN Gelic device.
* '''Make sure you set right MAC address with command 0x115b else device won't be able to receive packets destined to its own MAC address !!!'''


res = lv1_gpu_context_attribute(rsx_ctx_handle, 0x1,
====Test with libusb====
RSX_GPU_IOIF + 0x0 /* PUT offset */, RSX_GPU_IOIF + 0x0 /* GET offset */,
0x0, 0x0);
if (res) {
printk(KERN_INFO"lv1_gpu_context_attribute(0x1) failed (%d)\n", res);
res = -ENXIO;
goto fail_unmap_fifo_ctrl;
}


/* copy FIFO commands to FIFO command buffer */
<pre>
usb_bulk_transfer_ep6_in_cb:318: === got data transfer ===
usb_bulk_transfer_ep6_in_cb:321: transfer status (0) length (98)
00000000: ff ff ff ff ff ff ?? ?? ?? ?? ?? ?? 08 00 45 00 |..............E.|
00000010: 00 54 00 00 40 00 40 01 b5 fe c0 a8 01 5b c0 a8 |.T..@.@......[..|
00000020: 01 ff 08 00 9c 69 0d 45 00 e2 4e 5d 34 26 00 07 |.....i.E..N]4&..|
00000030: df e1 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 |................|
00000040: 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 |.......... !"#$%|
00000050: 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 |&'()*+,-./012345|
00000060: 36 37                                          |67              |
usb_bulk_transfer_ep6_in_cb:318: === got data transfer ===
usb_bulk_transfer_ep6_in_cb:321: transfer status (0) length (16)
00000000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 00 |................|
usb_bulk_transfer_ep6_in_cb:318: === got data transfer ===
usb_bulk_transfer_ep6_in_cb:321: transfer status (0) length (16)
00000000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02 00 |................|
usb_bulk_transfer_ep6_in_cb:318: === got data transfer ===
usb_bulk_transfer_ep6_in_cb:321: transfer status (0) length (16)
00000000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 |................|
</pre>


memcpy(rsx_fifo_cmd_buf, rsx_fifo_prg, sizeof(rsx_fifo_prg));
====Multicast Address Filter====


printk(KERN_INFO"GET offset (0x%08x) PUT offset (0x%08x)\n", rsx_fifo_ctrl->get, rsx_fifo_ctrl->put);
* WLAN Gelic device supports hardware multicast address filtering
* Multicast address filtering is implemented with MAC address hashing and filter bitmap
* Filter bitmap is of size '''4 * 8''' bytes
* Multicast address filter is set with command '''0x1161'''


/* kick FIFO */
=====MAC Address Hash Function=====


rsx_fifo_ctrl->put = RSX_GPU_IOIF + sizeof(rsx_fifo_prg);
* Used by LV2


/* poll until RSX is done processing FIFO commands */
<pre>
unsigned char hash(unsigned char *data, unsigned int size)
{
        unsigned int hash;
        int i, j;


timeout = 100;
        /*XXX: reverse data bits */


while (timeout--) {
        hash = 0xffffffff;
if (rsx_fifo_ctrl->get == rsx_fifo_ctrl->put)
break;


msleep(1);
        for (i = 0; i < size; i++) {
}
                hash = (((unsigned int) data[i]) << 24) ^ hash;


printk(KERN_INFO"GET offset (0x%08x) PUT offset (0x%08x)\n", rsx_fifo_ctrl->get, rsx_fifo_ctrl->put);
                for (j = 0; j < 8; j++) {
                        if (((int) hash) >= 0) {
                                hash = hash << 1;
                        } else {
                                hash = (hash << 1) ^ 0x04c10000;
                                hash = hash ^ 0x00001db7;
                        }
                }
        }


if (rsx_fifo_ctrl->get != rsx_fifo_ctrl->put) {
        hash = ((hash >> 24) & 0xf8) | (hash & 0x7);
printk(KERN_INFO"FIFO command buffer timeout\n");
res = -ENXIO;
goto fail_unmap_fifo_ctrl;
}


return 0;
        return hash & 0xff;
}


fail_unmap_fifo_ctrl:
h = hash(mac_addr, 6);
v = 1 << (h & 0x1f);    /* word value in filter */
p = h >> 5;            /* word position in filter */


iounmap(rsx_fifo_ctrl);


For broadcast address:
------------------------


fail_free_gpu_mem:
v = 0x20000000
p = 7


lv1_gpu_memory_free(rsx_mem_handle);
That's why 0x20 is used with command 0x1161 !!! Without it the device won't deliver broadcast traffic.
Learned it the hard way, after 2 days of trying to get packet reception working :)
</pre>


fail_free_fifo_cmd_buf_mem:
===Packet Transmission===


kfree(rsx_fifo_cmd_buf);
* Tx packets are sent to EP6 OUT
* Tx packets are normal Ethernet frames, they don't contain any WLAN data or other headers


fail:
===AP Mode===


return res;
* I got AP mode working with security disabled for now
}


/*
====AP Mode with Security Disabled====
* ps3rsx_exit
*/
static void __exit ps3rsx_exit(void)
{
iounmap(rsx_fifo_ctrl);


lv1_gpu_context_iomap(rsx_ctx_handle, RSX_GPU_IOIF, rsx_fifo_cmd_buf_lpar,
* Set AP SSID (command 0x5)
RSX_FIFO_CMD_BUF_SIZE, CBE_IOPTE_M);
* Set channel (command 0x11)
* Set AP opmode (command 0xb9)
* Configure rate control (command 0x1ed)
* Set AP WEP Configuration (command 0x5b, all 0s)
* Command 0x61 (param 0x0)
* Command 0xc5 (param 0x0)
* Command 0x1 (param 0x1)
* Command 0x1dd (param 0x2)
* Now green LED should be on


lv1_gpu_context_free(rsx_ctx_handle);
===ps3-jupiter Linux Drivers===


lv1_gpu_memory_free(rsx_mem_handle);
* ps3_jupiter.ko is the common part of STA and AP mode. It implements a command interface to WLAN Gelic device and disptaches events to STA and AP drivers.
* ps3_jupiter_sta.ko is a STA mode implementation.
* ps3_jupiter_ap.ko is a AP mode implementation.
* Simple scanning works already in STA mode (try it out with '''iwlist scan''')
* Packet reception works
* Packet transmission works
* '''WPA/WPA2''' fully working and usable with '''wpa_supplicant'''


kfree(rsx_fifo_cmd_buf);
}


module_init(ps3rsx_init);
'''Finally, after several weeks of hard programming and reversing, the WLAN driver ps3_jupiter_sta achieved the milestone where i can use it with WPA2 :) I actually use it currently with WPA2 on my PS3 slim. It works damn !!! Try it out and report bugs and problems to me.'''
module_exit(ps3rsx_exit);


MODULE_LICENSE("GPL");
====TODO====
MODULE_DESCRIPTION("PS3 RSX");
MODULE_AUTHOR("glevand");
</pre>


====Test====
* Implement association in STA mode (finished)
* Implement packet reception and transmission in STA mode (finished)
* Implement WEP support
* Implement AP mode
* Find out if Jupiter supports Monitor mode and if yes how to enable it
* Implement EURUS driver for PHATs (has many advantages over the old OtherOS approach, e.g. AP mode)
* Port to FreeBSD


<pre>
==LV2 Network Stack==
# insmod ./ps3rsx.ko
# dmesg


GET offset (0x0e000000) PUT offset (0x0e000000)  # GET and PUT offsets before kicking FIFO
* LV2 uses BSD network stack, e.g. '''struct mbuf'''
GET offset (0x0e00000c) PUT offset (0x0e00000c)  # GET and PUT offsets after kicking FIFO
* It's almost identical to FreeBSD network stack.
</pre>


As you see, RSX processed our FIFO commands :)
===Network Device===


==Linux Driver==
====IOCTLs====


* '''DRI/DRM is the ONLY way to go !!! No hacks like kernel modules with tons of IOCTLs !!!'''
=====Set Multicast Address Filter (0x81012000)=====
* First implement 2D acceleration and then add 3D support
* The driver consists of 2 parts: '''DDX driver''' for X11 (user space) and '''DRM driver''' for Linux Kernel (kernel space)
* First implement DRM driver and test it from user space without DDX and libdrm by talking to it directly


===DDX Driver===
* Sets multicast address filter
* Uses LV1 calls '''lv1_net_remove_multicast_address''' and '''lv1_net_add_multicast_address''' for Ethernet Gelic device
* Uses Eurus commands '''0x1161''', '''0x1163''' and '''0x1165''' for WLAN Gelic device


* Use '''libdrm'''
=====Unknown (0x8101200E)=====
* Use '''EXA API''' for 2D acceleration on X11 (or maybe use '''XAA API''')
* Use '''Kernel Mode Setting'''


===DRM Driver===
* Uses LV1 call '''lv1_net_control(0x8000000000000001)'''


* Extend '''nouveau''' driver or create a new one ???
=====Unknown (0x81040000)=====
* '''Decision: create new DRM driver in order to learn how DRM framework in Linux kernel works and because we have to use LV1 calls to access RSX (and because it's a lot more fun to do it on my own). But use nouveau as an example for DRM driver. Maybe i should better use radeon DRM driver as an example beacuse it seems to be better designed and implemnted !!!'''
* The driver is very low level and allows direct access to almost all RSX funtions, e.g. FIFO buffer, to achieve maximum performance.
* All data buffers, e.g. vertices and textures, are managed by DRM framework (Linux kernel). To avoid copying from user to kernel space, the buffers will be mmaped into user space.
* Provides an interface to manage graphic objects in VRAM.
* Use '''TTM''' or '''GEM''' ??? TTM is used by radeon and nouvea drivers, so i guess we could use it too. GEM is for Intel chips.
* Extend '''libdrm''' library to support new DRM driver.
* Fences can be implemented with '''RSX REF Control Register'''


====Memory Management====
* Uses LV1 call '''lv1_net_control(0x8, [0x0, 0x1 or 0x2])''' for Ethernet Gelic device
* Uses Eurus commands '''0x116F''', '''0x115D''' and '''0x115B''' for WLAN Gelic device


* Size of all memory objects must be multiple of the page size (4096 bytes) even if a smaller size is requested by user
=====Enable/Disable WOL Magic Packet (0x81080000)=====
* Nouveau driver uses IOCTL '''DRM_NOUVEAU_GEM_NEW''' to allocate memory objects in VRAM or GART. The IOCTL returns the handle of the newly allocated memory object.
 
* An example from Mesa how memory objects are used: [http://fxr.watson.org/fxr/source/external/bsd/drm/dist/libdrm/nouveau/nouveau_bo.c?v=NETBSD;im=10] [http://www.opensource.apple.com/source/X11libs/X11libs-60/mesa/Mesa-7.8.2/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.c]
* Enables/Disables WOL Magic Packet
* Uses LV1 call '''lv1_net_control(0x5 /* GELIC_LV1_SET_WOL */, 0x1 /* GELIC_LV1_WOL_MAGIC_PACKET */)''' for Ethernet Gelic device
* Uses Eurus commands '''0x1139''' and '''0x1155''' for WLAN Gelic device


====Video RAM====
=====Unknown (0x81080001)=====


* VRAM is allocated once during context creating and cannot be changed during the whole life of the context.
* Uses LV1 call '''lv1_net_control(0x5 /* GELIC_LV1_SET_WOL */, 0x2)''' for Ethernet Gelic device
* '''lv1_gpu_memory_allocate''' returns LPAR address of allocated VRAM which can be mapped into kernel address space.
* Uses Eurus commands '''0x113B''' and '''0x1157''' for WLAN Gelic device
* '''VRAM starts at offset 0x0 in GPU address space.'''
* VRAM heap management is necessary, use e.g. TTM (ttm_bo_init_mm).
* This memory type is used e.g. for vertices or textures.
* It should be mappable from user space in order to allow user to put data there.
* GameOS calls it '''Local Memory'''.
* VRAM can be mapped into kernel-space with '''ioremap'''.
* To map VRAM into user-space map it first into kernel-space with '''ioremap''' and then use '''remap_pfn_range''' to map into user-space.
* Use '''VM_IO''' flag for this kind of memory when mapping it into user-space.
* Mapping examples: [http://www.scs.ch/~frey/linux/memorymap.html] [http://www.cs.fsu.edu/~baker/devices/projects/antgeo/avnet_june19/pci_avnet.c]


====GART Memory====
=====Unknown (0x81080002)=====


* GART memory region is a memory region in System Memory but accessible by RSX through GART [http://dri.freedesktop.org/wiki/GART].
* Uses LV1 call '''lv1_net_control(0x5 /* GELIC_LV1_SET_WOL */, 0x3)''' for Ethernet Gelic device
* GameOS calls it '''Main Memory'''.
* Uses Eurus commands '''0x113D''' and '''0x1159''' for WLAN Gelic device
* '''Problem: lv1_gpu_context_iomap supports ONLY 1MB and 64kB pages'''
* Size of system memory objects mapped into GPU address space should be either multiple of 1MB which means wasting lots of RAM and we don't have enough of it anyways. This solution is NOT suitable.
* Or place several GART memory objects into 1 MB page and map it. That would mean we have to use memory manager for each 1MB page.
* That means, we have to allocate 1MB page even if user requested a smaller memory region. Then initialize a heap manager for this 1MB page and return ONLY requested size. The following requests for GART memory regions can be satisfied from the previously allocated 1MB pages which still have enough free memory.
* FIFO command buffer is an example of a GART memory object which has to be mapped into GPU address space with lv1_gpu_context_iomap before it can be used by RSX.
* User allocates FIFO command buffer in GART address space, maps it into user space, write commands into it and then pushes it to DRM driver which maps it into RSX address space and CALLs it.
* '''TTM: TTM_PL_FLAG_TT for GART memory'''
* '''GameOS applications using GCM library map GART memory beginning at offset 0x10000000 or 0x20000000, just after where the whole VRAM is mapped.'''
* '''Don't use kmalloc for this type of memory. Use __get_free_pages and mark pages with flag VM_RESERVED before exporting it to user-space else they can be swapped out.'''
* TTM uses '''struct ttm_backend_func''' to call driver specific GART mapping functions. '''nouveau_sgdma.c''' handles GART memory mapping.


====CPU Memory====
=====Unknown (0x81080003)=====


* This type of memory cannot be accessed by RSX at all.
* Uses LV1 call '''lv1_net_control(0x5 /* GELIC_LV1_SET_WOL */, 0x4)''' for Ethernet Gelic device
* Because this type of memory is not mapped into RSX address space through GART we don't need to allocate it in 1MB multiples.
* Uses Eurus command '''0x1161''' for WLAN Gelic device
* What do we need it for ???


====Mapping Memory Objects into Kernel-Space====
=====Unknown (0x81080005)=====


* Nouveau driver uses '''ttm_bo_kmap''' to map memory objects into kernel-space (see '''ttm_bo_util.c''').
* Uses LV1 call '''lv1_net_control(0x5 /* GELIC_LV1_SET_WOL */, 0x6 /* GELIC_LV1_WOL_ADD_MATCH_ADDR */)''' for Ethernet Gelic device
* Nouveau driver uses '''ttm_bo_ioremap''' to map IO memory into kernel-space, e.g. VRAM or GPU registers (see '''ttm_bo_util.c''') which uses '''ioremp_wc''' or '''ioremp_nocache'''.
* Uses Eurus commands '''0x116D''' and '''0x1167''' for WLAN Gelic device
* TTM uses page-wise allocation for buffers. The buffers are contiguous ONLY in a single page. That has a huge advantage over allocating 1MB contiguous memory blocks in kernel space. It's far easier to allocate a single page in Linux kernel than 1MB memory chunk, especially on PS3 arch which has only 256MB.
* '''Problem: lv1_gpu_context_iomap allows ONLY 1MB pages. Use lv1_put_iopte ???'''. See [http://lwn.net/Articles/304188/], [http://lxr.free-electrons.com/source/arch/powerpc/platforms/ps3/mm.c?a=sh#L562],  [http://wiki.ps2dev.org/ps3:hypervisor:lv1_put_iopte ] and [http://wiki.ps2dev.org/ps3:hypervisor:lv1_gpu_context_iomap].
* Yes, we can use '''lv1_put_iopte''' instead of '''lv1_gpu_context_iomap'''. That would solve the problem with 1MB pages on Linux. Both LV1 calls use the same internal LV1 function to map memory pages.
* '''lv1_gpu_context_iomap uses IOAS_ID 0 and IOID 1.'''
* TTM allows to map a buffer multiple times. Mapping information is stored in '''struct ttm_bo_kmap_obj'''.
* '''To make single allocated pages look contiguous to kernel-space, TTM uses vmap'''.
* '''It is possible to use 64KB pages for GART mapping without patching LV1. To enable 4KB pages support we have to patch LV1.'''
* Tested with 64kB IO page size. It works fine.


====Mapping Memory Objects into User-Space====
===Network Packet===


* User-space programs should be able to allocate memory objects in VRAM or GART and map it with '''mmap syscall'''.
* LV2 network packet is represented by '''struct mbuf'''
* See '''nouveau_ttm.c:nouveau_ttm_mmap'''.
 
* Mapping memory objects into user-space avoids copying of data between user/kernel spaces.
=RSX=
* Problem: how to identify memory objects ???
Crossreference: [http://wiki.gitbrew.org/index.php/PS3:HvReverseEngineering#RSX gitbrew.org::RSX] <br />
* '''libdrm''' uses handles which are returned by DRM kernel driver when a new memory object is created. The handle is passed to mmap syscall as parameter '''offset'''. DRM driver looks up the handle and identifies the appropriate memory object which is mapped into user-space then.
 
* Nouveau driver uses TTM framework to map memory objects into user-space. TTM doesn't map all pages owned by the memory object at once but installs '''VM operation fault''' which maps single pages on demand. It makes sense because user application rarely accesses all pages of the mapped memory object at once.
==HV Calls==
* To map memory objects located in VRAM we have to map it into kernel space first with '''ioremap'''.


====FIFO Command Buffer====
===lv1_gpu_memory_allocate===


* Every context has its own one main FIFO command buffer which is NOT accessible directly by user space.
* LV1 supports 16 memory handles simultaneously.
* User-space applications can allocate additional FIFO command buffers in GART memory space, map it into user space, store commands there and submit to DRM driver.
* LV1 uses a bitmap to manage GPU VRAM.
* Nouveau driver uses IOCTL '''NOUVEAU_GEM_PUSHBUF''' to execute FIFO command buffers. See '''nouveau_gem.c:nouveau_gem_ioctl_pushbuf'''.
* The bitmap is located in LV1 memory, 4 double words.
* By user applications submitted FIFO command buffers are mapped by DRM driver into RSX address space first and then executed with CALL command.
* Each bit corresponds to 1MB VRAM, 256bit = 256MB VRAM.
* '''Problem: All references to graphics objects contained in FIFO command buffers must be expressed in RSX address space. How does user space know the right offsets of the referenced objects ???'''
* 2MB at the top of VRAM are preallocated as you can see below.
* To solve the above problem, Nouveau driver uses relocations which are submitted to DRM driver together with FIFO command buffers. The DRM driver applies the specified relocations before executing the FIFO command buffer. See '''nouveau_gem.c:nouveau_gem_pushbuf_reloc_apply'''.
* Relocations contain memory object handles which they apply to. The DRM driver looks up the memory object by its handle and the memory objects contain GPU address space offsets.


=====Example=====
<pre>
<pre>
      ---------------------------------------------------------------
<memory handle> = 0x5a5a5a5a xor <memory handle index>
      |                                                              |
      |                                                              |
    \|/    Main FIFO command buffer (one per allocated context)    |
------------------------------        ------------------------------------
|          |        |                    |          |          |          |
|    ...    |  CALL  |        ...        |  CALL  |  ...    |  JMP    |
|          |        |                    |          |          |          |
------------------------------        ------------------------------------
                |      /|\                    |        /|\
    -------------|        |                    |          |
    |              ------|            --------|          |
  \|/              |                  |              ---|
-----------------------                |              |
|      |      |      |              |              |
|  ...  |  ...  |  RET  |              |              |
|      |      |      |              |              |
-----------------------                |              |
  FIFO command buffer 1                |              |
  (allocated by user space)            \|/              |
                                    -----------------------
                                    |      |      |      |
                                    |  ...  |  ...  |  RET  |
                                    |      |      |      |
                                    -----------------------
                                      FIFO command buffer 2
                                    (allocated by user space)
</pre>
</pre>


====Fences====
====Memory Context Object====


* Nouveau driver implements DRM fences with REF control register. See '''nouveau_fence.c:nouveau_fence_new'''.
offset 0x8 - memory handle (4 bytes)
* Newer Nvidia chips support semaphores. Nouveau driver uses semaphores for fences if they are supported.
* libgcm functions '''SetWriteCommandLabel''' and '''SetWaitLabel''' use semaphores.
* '''SetWriteCommandLabel''' releases semaphore and '''SetWaitLabel''' acquires semaphore.
* Semaphores are placed in VRAM. Nouveau driver creates a small VRAM heap for semaphores. See '''nouveau_fence.c:nouveau_fence_channel_init'''.


====IOCTLs====
offset 0x10 - VRAM LPAR start address (8 bytes)


=====Context Create=====
offset 0x18 - VRAM LPAR end address (8 bytes)


* Creates new RSX context
====Test====
* Allocates VRAM and memory for FIFO buffer
 
* Needed VRAM size and FIFO buffer size must be known during context creation
* The offset of bitmap could be different on your system because it's allocated dynamically.
* '''First 9MB of VRAM were allocated by ps3fb Linux driver.'''


=====Context Destroy=====
Before allocating VRAM:
<pre>
glevand@debian-hdd:~$ sudo dd if=/dev/ps3ram bs=1 count=$((0x20)) skip=$((0x1f85b0)) | hexdump -C
00000000  00 00 00 00 00 00 01 ff  00 00 00 00 00 00 00 00  |.......ÿ........|
00000010  00 00 00 00 00 00 00 00  c0 00 00 00 00 00 00 00  |........À.......|
</pre>


* Destroys previously allocated context
After allocating 32 MB VRAM:
<pre>
glevand@debian-hdd:~$ sudo dd if=/dev/ps3ram bs=1 count=$((0x20)) skip=$((0x1f85b0)) | hexdump -C
00000000  00 00 01 ff ff ff ff ff  00 00 00 00 00 00 00 00  |...ÿÿÿÿÿ........|
00000010  00 00 00 00 00 00 00 00  c0 00 00 00 00 00 00 00  |........À.......|
</pre>


=====Context Attribute=====
===lv1_gpu_context_allocate===


* Changes context attributes
* Register %r4 is flags.
* '''Found the place in LV1 where LV1 sets IO page size for GART memory mapping. We could patch it and set to 4KB. That would make a lot of things easier for RSX developers on Linux.'''
* 1MB pages make RSX driver for Linux hard to implement because allocating 1Mb contiguous memory chunk on Linux is very very hard especially on a system with only 256MB and which was running for some time.


=====Graphic Object Creatre=====
* LV1 supports 16 contexts simultaneously.
* LV1 has an array of context pointers.
* Each context has an index and a handle. The handle is derived from the index of the context.


* Create a graphic object either in VRAM or in XDR
<pre>
* Used to create FIFO command buffers too (only in XDR of course because RSX supoorts FIFO command buffer in XDR only)
<context handle> = 0x55555555 xor <context index>
</pre>


=====Graphic Object Destroy=====
* Thats why first created context will have handle 0x55555555.


* Frees previously created graphic object
====Context Object====


=====FIFO Execute=====
offset 0x8 - handle (4 bytes)


* Allows user space applications to execute FIFO commands.
offset 0x48 - IO page size, valid range is 4kB, 64KB and 1MB (8 bytes)
* To avoid copying of buffers allocated by user space to main FIFO command buffer use CALL and RET RSX FIFO commands to execute FIFO commands in buffers allocated by user space.
* Several FIFO command buffers can be submitted at once.


=====Framebuffer=====
====Flags====


* Kernel DRM driver has to implement a frame buffer driver too
'''0x2 - tells LV1 to use 64KB pages for GART memory mapping else LV1 uses 1MB pages'''
* Nouvea driver allocates frame buffer in video RAM and maps it into kernel address space (see '''nouveau_fbcon.c:nouveau_fbcon_create'''). Current ps3fb Linux driver doesn't allocate frame buffer in vide RAM but in system RAM.
* Direct access to video RAM from kernel is very very slow but some of frame buffer functions in Nouvea driver are hardware accelerated. We could do it the same way on Linux and get a hardware accelerated frame buffer this way. Not sure why ps3fb authors didn't add hardware acceleration to frame buffer. The reason why it was not implemnted in ps3fb is because LV1 doesn't create 2D graphic objects needed for 2D hardware acceleration.
* '''lv1_gpu_allocate_memory''' returns LPAR address of video RAM allocated for the RSX context.
* Unfortunately '''lv1_gpu_context_allocate''' doesn't initialize 2D ROP objects but we could use 3D operations to implement 2D ROPs.


===libdrm===
===lv1_gpu_context_iomap===


* Add support for RSX DRM to '''libdrm'''
* Internally uses lv1_put_iopte function
* IO page size is the one set during lv1_gpu_context_allocate
* IO address space id is 0x0. IO id is 0x1.


===Test Kernel Module and Program===
===lv1_gpu_context_attribute===


* I uploaded here a test kernel module and a test user application: [http://www.gitbrew.org/~glevand/ps3/linux/ps3rsx_kernel.tar.gz] and [http://www.gitbrew.org/~glevand/ps3/linux/ps3rsx_user.tar.gz]
====Attribute 0x1====
* I used a similar technique for mapping GPU resources into user-space like Linux kernel DRM drivers do it, e.g. Nouveau. But of course everything is very simplified in comparison with Nouveau driver. All GPU resources are mapped to user-space with mmap and there is no data copying between user and kernel space, for performance reasons. Mapping GPU resources into user-space like this is more flexible than IOCTLs.
 
* '''The purpose of the kernel module and the user application is to test how RSX works, to test FIFO commands and other stuff i reversed from Lv2. It's NOT for end users.'''
=====FIFO Command Buffer Setup=====
* Before loading the kernel module make sure ps3vram kernel module is NOT loaded.
 
* I used 64kB IO pages for GPU context. 4kB IO page size would be definitely a lot better for that we have to patch LV1. I will add this patch to my ps3mfw tasks for LV1.
<pre>
* Just load the kernel module and then run the user application.
lv1_gpu_context_attribute(context handle, 0x1, PUT offset, GET offset, 0x0, 0x0)
* The user application maps all context resources and executes some simple FIFO commands, like JMP or SET REF.
</pre>
* I will add more examples later.
 
* By default, the kernel module allocates 8MB VRAM, 64kB FIFO and 1MB GART memory. You can change it by using kernel module parameters.
====Attribute 0x101====
* Take a look at how i made non-contiguous allocated GART memory look contiguous to GPU, kernel-space and user-space.
* The kernel module needs some IOCTLs, e.g. for setting display buffers or flip status, because it can be done ONLY with LV1 calls. I will add it later.


===Links===
=====Set Flip Mode=====


* http://yangman.ca/blog/2009/10/linux-graphics-driver-stack-explained
<pre>
* http://www.bitwiz.org.uk/s/how-dri-and-drm-work.html
lv1_gpu_attribute(0x2, 0x1 /* head */, 0x0, 0x0)
* http://dri.sourceforge.net/doc/drm_low_level.html
lv1_gpu_context_attribute(context handle, 0x101, 0x1 /* head */, sync mode, 0x0, 0x0)
* http://www.botchco.com/agd5f/?p=50
</pre>
* http://webcvs.freedesktop.org/xorg/xc/programs/Xserver/hw/xfree86/doc/DESIGN?view=co
* http://www.x.org/wiki/ModularDevelopersGuide
* http://www.xfree86.org/current/DESIGN20.html
* http://nouveau.freedesktop.org/wiki/GraphicStackOverview
* http://cgit.freedesktop.org/nouveau/xf86-video-nouveau/tree/
* http://cgit.freedesktop.org/xorg/xserver/tree/hw/xfree86/doc/exa-driver.txt
* http://cgit.freedesktop.org/xorg/xserver/tree/hw/xfree86/xaa/XAA.HOWTO
* http://cgit.freedesktop.org/nouveau/linux-2.6/tree/drivers/gpu/drm
* http://kernel.org/doc/htmldocs/drm/drmInternals.html
* http://paginas.fe.up.pt/~mei04010/dri-architecture.pdf
* http://www.ecsl.cs.sunysb.edu/tr/TR222.pdf
* http://www.freesoftwaremagazine.com/columns/the_new_xorg_features
* http://www.freesoftwaremagazine.com/columns/xorgs_x_window_innovation_its_not_all_about_graphics#
* http://www.virtuousgeek.org/exa-driver.txt
* http://www.x.org/wiki/ttm
* http://nouveau.freedesktop.org/wiki/NvObjectTypes
* TTM: [http://lwn.net/Articles/257417/] [http://nouveau.freedesktop.org/wiki/TTMMemoryManager?action=AttachFile&do=get&target=mm.pdf]
* GEM: [http://lwn.net/Articles/283798/]
* TTM vs GEM: [http://lwn.net/Articles/283793/]
* OMAP DRM Driver: https://github.com/robclark/kernel-omap4/tree/omap_gpu-android/drivers/gpu/drm/omap


=BD Drive=
====Attribute 0x104====
Crossreference: [http://wiki.gitbrew.org/wikibrew/PS3:HvReverseEngineering#BD_Drive gitbrew.org::HV#BD Drive] <br />


=====Set Display Buffer=====


==Profile==
<pre>
lv1_gpu_context_attribute(context handle, 0x104, id, width << 32 | height, pitch << 32 | offset, 0x0)
</pre>


* BD profile can be read with '''GET PROFILE''' device command or SCSI command '''GET CONFIGURATION'''
====Attribute 0x10a====


===Profile Table===
=====Get Flip Status=====


{| class="wikitable"
* Reads a value at offset '''0x10C0 + 0x1 * 0x40''' in lpar_reports memory.
|-
 
! Profile !! Description
=====Reset Flip Status=====
|-
| 0x0 || No Current Profile
|-
| 0x2 || Removable Disk
|-
| 0x8 || CD-ROM
|-
| 0x9 || CD-R
|-
| 0xa || CD-RW
|-
| 0x10 || DVD-ROM
|-
| 0x11 || DVD-R Sequential recording
|-
| 0x12 || DVD-RAM
|-
| 0x13 || DVD-RW Restricted Overwrite
|-
| 0x14 || DVD-RW Sequential recording
|-
| 0x1a || DVD+RW
|-
| 0x1b || DVD+R
|-
| 0x40 || BD-ROM
|-
| 0x41 || BD-R Sequential Recording(TBD)
|-
| 0x42 || BD-R Random Recording(TBD)
|-
| 0x43 || BD-RE
|-
| 0x50 || PS1 CD-ROM
|-
| 0x60 || PS2 CD-ROM
|-
| 0x61 || PS2 DVD-ROM
|-
| 0x70 || PS3 DVD-ROM
|-
| 0x71 || PS3 BD-ROM
|-
| 0x10000 || CD-DA
|-
| 0x20000 || SACD
|-
| 0x100000 || Dual Layer (Parallel)
|-
| 0x200000 || Dual Layer (else Parallel)
|}


==Buffer==
<pre>
lv1_gpu_context_attribute(context handle, 0x10a, 0x1 /* id */, 0x7fffffff /* mask */, 0x0 /* value */, 0x0)
</pre>


* BD drive has several buffers associated with internal flash
* The LV1 call '''lv1_gpu_context_attribute(0x10a)''' accesses LPAR memory returned in '''lpar_reports''' by LV1 call '''lv1_gpu_context_allocate'''.
* Buffer can be read and written with SCSI commands '''READ/WRITE BUFFER'''
* Offset into lpar_reports is '''0x10C0 + id * 0x40 = 0x10C0 + 0x1 * 0x40'''.
* Writing buffer is enabled with SCSI command '''MODE SELECT 10''' first
* Why not access lpar_reports memory directly and use LV1 call instead ???


===Buffer Table===
====Attribute 0x10b====


{| class="wikitable"
* '''This attribute is NOT available on 3.15 LV1 e.g. but on 3.41 it's implemented.'''
|-
! ID !! Size !! Description
|-
| 0x0 || 0x8000 || Used to transfer firmware to BD drive
|-
| 0x1 || 0x800 || Serial Flash
|-
| 0x2 || 0x60 || P-Block
|-
| 0x3 || 0x670 || S-Block
|-
| 0x4 || 0x8000 || Host Revocation List (HRL) Empty
|-
| 0x5 || 0x8000 || Host Revocation List (HRL) Current
|-
| 0x6 || 0x670 || S-Block
|-
| 0x7 || 0x8000 || Host Revocation List (HRL)
|}


===HRL Buffer===
=====Set Cursor Position=====


* Size is 32KB just like AACS specifications prescribes (See AACS Common Specification 3.2.5.2 Host Revocation List Record)
<pre>
* '''We could replace HRL with an older one in BD drive flash and restore revoked Host Certificates !!!'''
lv1_gpu_context_attribute(context handle, 0x10b, 0x1, 0x3, x, y)
</pre>


==Device Commands==
=====Set Cursor Image Offset=====


===Get Profile (0x11)===
<pre>
lv1_gpu_context_attribute(context handle, 0x10b, 0x1, 0x2, offset, 0x0)
</pre>


* BD profile can be read with LV1 call '''lv1_send_storage_device_command''' and command '''0x11'''
====Attribute 0x10c====
* LV1 sends SCSI command '''GET CONFIGURATION''' to BD drive with '''requested type 0x0''', '''starting feature number 0x0''' and '''allocation length 0x8'''
* See SCSI command '''GET CONFIGURATION'''


===Auto Request Sense Mode On/Off (0x30)===
* '''This attribute is NOT available on 3.15 LV1 e.g. but on 3.41 it's implemented.'''


* LV1 expects a 4 byte value: 0x0 - On, 0x1 - Off
=====Cursor Function 1=====
* can be get/set via GameOS sc0x25C/604: sys_storage_send_device_command(fd of bdvd,0x30,value,4,0,0 )


==SCSI Commands==
<pre>
lv1_gpu_context_attribute(context handle, 0x10c, 0x1, 0x1, 0x0, 0x0)
</pre>


===Get Configuration===
=====Cursor Function 2=====


Getting the profile of a BD movie disc:
<pre>
<pre>
# sg_raw -r 0x8 /dev/sr0 46 02 00 00 00 00 00 00 08 00
lv1_gpu_context_attribute(context handle, 0x10c, 0x1, 0x2, 0x0, 0x0)
SCSI Status: Good
</pre>


Sense Information:
====Attribute 0x10d====
sense buffer empty


Received 8 bytes of data:
* '''This attribute is NOT available on 3.15 LV1 e.g. but on 3.41 it's implemented.'''
00    00 00 00 38 00 00 00 40                            ...8...@ 


# 0x40 means BD-ROM
=====Cursor Function 1=====
</pre>


Getting the profile of a PS3 game disc:
<pre>
<pre>
# sg_raw -r 0x8 /dev/sr0 46 02 00 00 00 00 00 00 08 00
lv1_gpu_context_attribute(context handle, 0x10d, 0x1, 0x1, 0x0, 0x0)
SCSI Status: Good
</pre>


Sense Information:
====Attribute 0x300====
sense buffer empty
 
=====Set Tile=====
 
=====Set Invalidate Tile=====
 
=====Bind Tile=====
 
=====Unbind Tile=====
 
====Attribute 0x301====
 
=====Set Zcull=====
 
=====Bind Zcull=====


Received 8 bytes of data:
=====Unbind Zcull=====
00    00 00 00 38 00 00 ff 71                            ...8...q
# 0x71 means PS3 BD-ROM
</pre>


===Get SS Key===
====Attribute 0x601====


* By SCSI standard undocumented parameters are used
* Copies data from GART memory to VRAM.
* '''SCSI Report Key''' command with '''key format 0x3''' and '''key class 0xe0'''
* LV1 uses internally the FIFO command buffer passed by ps3fb driver with lv1_gpu_context_iomap.
* 8 bytes are returned by BD drive
* Used by VSH


Test with PS3 game disc:
FIFO commands:
<pre>
<pre>
# sg_raw -r 8 /dev/sr0 a4 00 00 00 00 00 00 e0 00 08 03 00
0x0004C184
SCSI Status: Good
0xFEED0001
 
0x0004C198
0x313371C3
 
0x00046300
0x0000000A
 
for ()
{
    for ()
    {
        0x0004630C
        <param>
 
        0x00046304
        <param>


Sense Information:
        0x0024C2FC
sense buffer empty
        0x00000001
        0x00000003
        0x00000003
        <param1>
        <param2>
        <param3>
        <param4>
        0x00010000
        0x00010000


Received 8 bytes of data:
        0x0001C400
  00    00 06 00 00 00 00 00 04                            ........         
        <param1>
</pre>
        <param2>
        <param3>
        0x00000000
    }
}
 
0x00040110
0x00000000
</pre>
 
==FIFO Command Buffer==
 
===FIFO Control Registers===
 
* LV1 call '''lv1_gpu_context_allocate''' returns LPAR address of FIFO control registers.
* You have to map it into Linux address space before you can access FIFO control registers.
* Value of PUT and GET registers are NOT expressed in Linux address space but in RSX address space. You have to convert it to RSX address space.
* GET register is read-only and is modified by RSX while it's processing FIFO commands.
 
===Kicking FIFO Command Buffer===
 
* As long as values of GET and PUT FIFO control registers are equal, RSX doesn't process commands from the FIFO command buffer.
* When the value of PUT register is not equal to the value of GET register, RSX starts processing commands in the FIFO command buffer.
* To execute FIFO commands, place them in the FIFO command buffer and change the value of PUT register.
 
===FIFO Setup Programs of emer_init.self===
 
* [[PS3:HvReverseEngineering:emer_init.self:Program 1]]
* [[PS3:HvReverseEngineering:emer_init.self:Program 2]]
* [[PS3:HvReverseEngineering:emer_init.self:Program 3]]
 
===FIFO Commands===
 
[[PS3:HvReverseEngineering:RSXFIFOCommands]]
 
===Example How to Use FIFO Command Buffer===
 
Here is a small Linux kernel module which shows you how to use FIFO command buffer on Linux.
 
* RSX allows to create multiple contexts.
* This kernel module should run without problems with '''ps3fb''' driver already running.
* Make sure you unload '''ps3vram''' driver before running this module because '''ps3vram''' allocates all available RSX memory for itself and because of this, '''lv1_gpu_memory_allocate''' will always fail.
* This kernel module lets the RSX execute a simple program which contains only NOP (No Operation) commands.
 
Download source code: [http://lol.notsoldierx.com/~glevand/ps3/linux/ps3rsx.tar.gz]
 
====Source Code====
 
<pre>
/*
* PS3 RSX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published
* by the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
 
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/delay.h>
 
#include <asm/abs_addr.h>
#include <asm/cell-regs.h>
#include <asm/lv1call.h>
#include <asm/ps3.h>
 
#define RSX_FIFO_CMD_BUF_SIZE (1 * 1024 * 1024)
 
#define RSX_MEM_SIZE (32 * 1024 * 1024)
 
#define RSX_GPU_IOIF (0x0e000000ul)
 
#define RSX_FIFO_CTRL_SIZE (4 * 1024)
 
struct rsx_fifo_ctrl {
u8 res[0x40];
u32 put;
u32 get;
};
 
static u32 *rsx_fifo_cmd_buf;
static u64 rsx_fifo_cmd_buf_lpar;
 
static u64 rsx_mem_handle, rsx_mem_lpar;
static u64 rsx_ctx_handle;
static u64 rsx_fifo_ctrl_lpar;
static u64 rsx_drv_info_lpar;
static u64 rsx_reports_lpar, rsx_reports_size;
 
static struct rsx_fifo_ctrl *rsx_fifo_ctrl;
 
/*
* FIFO program
*/
static u32 rsx_fifo_prg[] = {
0x00000000, /* nop */
0x00000000, /* nop */
0x00000000, /* nop */
};
 
/*
* ps3rsx_init
*/
static int __init ps3rsx_init(void)
{
unsigned long timeout;
int res;
 
/* FIFO command buffer must be allocated in XDR memory */
 
rsx_fifo_cmd_buf = kmalloc(RSX_FIFO_CMD_BUF_SIZE, GFP_KERNEL);
if (!rsx_fifo_cmd_buf) {
printk(KERN_INFO"could not allocate FIFO command buffer\n");
res = -ENOMEM;
goto fail;
}
 
res = lv1_gpu_memory_allocate(RSX_MEM_SIZE, 0, 0, 0, 0,
&rsx_mem_handle, &rsx_mem_lpar);
if (res) {
printk(KERN_INFO"lv1_gpu_memory_allocate failed (%d)\n", res);
res = -ENXIO;
goto fail_free_fifo_cmd_buf_mem;
}
 
res = lv1_gpu_context_allocate(rsx_mem_handle, 0,
&rsx_ctx_handle, &rsx_fifo_ctrl_lpar, &rsx_drv_info_lpar,
&rsx_reports_lpar, &rsx_reports_size);
if (res) {
printk(KERN_INFO"lv1_gpu_context_allocate failed (%d)\n", res);
res = -ENXIO;
goto fail_free_gpu_mem;
}
/* map FIFO command buffer into RSX address space */
 
rsx_fifo_cmd_buf_lpar = ps3_mm_phys_to_lpar(__pa(rsx_fifo_cmd_buf));
 
res = lv1_gpu_context_iomap(rsx_ctx_handle,
RSX_GPU_IOIF, rsx_fifo_cmd_buf_lpar, RSX_FIFO_CMD_BUF_SIZE,
CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | CBE_IOPTE_M);
if (res) {
printk(KERN_INFO"lv1_gpu_context_iomap failed (%d)\n", res);
res = -ENXIO;
goto fail_free_gpu_mem;
}
 
/* map RSX FIFO control registers */
 
rsx_fifo_ctrl = (struct rsx_fifo_ctrl *) ioremap(rsx_fifo_ctrl_lpar, RSX_FIFO_CTRL_SIZE);
if (!rsx_fifo_ctrl) {
printk(KERN_INFO"could not map FIFO control\n");
res = -ENXIO;
goto fail_free_gpu_mem;
}
 
/* PUT and GET offsets are in RSX address space */
 
res = lv1_gpu_context_attribute(rsx_ctx_handle, 0x1,
RSX_GPU_IOIF + 0x0 /* PUT offset */, RSX_GPU_IOIF + 0x0 /* GET offset */,
0x0, 0x0);
if (res) {
printk(KERN_INFO"lv1_gpu_context_attribute(0x1) failed (%d)\n", res);
res = -ENXIO;
goto fail_unmap_fifo_ctrl;
}
 
/* copy FIFO commands to FIFO command buffer */
 
memcpy(rsx_fifo_cmd_buf, rsx_fifo_prg, sizeof(rsx_fifo_prg));
 
printk(KERN_INFO"GET offset (0x%08x) PUT offset (0x%08x)\n", rsx_fifo_ctrl->get, rsx_fifo_ctrl->put);
 
/* kick FIFO */
 
rsx_fifo_ctrl->put = RSX_GPU_IOIF + sizeof(rsx_fifo_prg);
 
/* poll until RSX is done processing FIFO commands */
 
timeout = 100;
 
while (timeout--) {
if (rsx_fifo_ctrl->get == rsx_fifo_ctrl->put)
break;
 
msleep(1);
}
 
printk(KERN_INFO"GET offset (0x%08x) PUT offset (0x%08x)\n", rsx_fifo_ctrl->get, rsx_fifo_ctrl->put);
 
if (rsx_fifo_ctrl->get != rsx_fifo_ctrl->put) {
printk(KERN_INFO"FIFO command buffer timeout\n");
res = -ENXIO;
goto fail_unmap_fifo_ctrl;
}
 
return 0;
 
fail_unmap_fifo_ctrl:
 
iounmap(rsx_fifo_ctrl);
 
 
fail_free_gpu_mem:
 
lv1_gpu_memory_free(rsx_mem_handle);
 
fail_free_fifo_cmd_buf_mem:
 
kfree(rsx_fifo_cmd_buf);
 
fail:
 
return res;
}
 
/*
* ps3rsx_exit
*/
static void __exit ps3rsx_exit(void)
{
iounmap(rsx_fifo_ctrl);
 
lv1_gpu_context_iomap(rsx_ctx_handle, RSX_GPU_IOIF, rsx_fifo_cmd_buf_lpar,
RSX_FIFO_CMD_BUF_SIZE, CBE_IOPTE_M);
 
lv1_gpu_context_free(rsx_ctx_handle);
 
lv1_gpu_memory_free(rsx_mem_handle);
 
kfree(rsx_fifo_cmd_buf);
}
 
module_init(ps3rsx_init);
module_exit(ps3rsx_exit);
 
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("PS3 RSX");
MODULE_AUTHOR("glevand");
</pre>
 
====Test====
 
<pre>
# insmod ./ps3rsx.ko
# dmesg
 
GET offset (0x0e000000) PUT offset (0x0e000000)  # GET and PUT offsets before kicking FIFO
GET offset (0x0e00000c) PUT offset (0x0e00000c)  # GET and PUT offsets after kicking FIFO
</pre>
 
As you see, RSX processed our FIFO commands :)
 
==Linux Driver==
 
* '''DRI/DRM is the ONLY way to go !!! No hacks like kernel modules with tons of IOCTLs !!!'''
* First implement 2D acceleration and then add 3D support
* The driver consists of 2 parts: '''DDX driver''' for X11 (user space) and '''DRM driver''' for Linux Kernel (kernel space)
* First implement DRM driver and test it from user space without DDX and libdrm by talking to it directly
 
===DDX Driver===
 
* Use '''libdrm'''
* Use '''EXA API''' for 2D acceleration on X11 (or maybe use '''XAA API''')
* Use '''Kernel Mode Setting'''
 
===DRM Driver===
 
* Extend '''nouveau''' driver or create a new one ???
* '''Decision: create new DRM driver in order to learn how DRM framework in Linux kernel works and because we have to use LV1 calls to access RSX (and because it's a lot more fun to do it on my own). But use nouveau as an example for DRM driver. Maybe i should better use radeon DRM driver as an example beacuse it seems to be better designed and implemnted !!!'''
* The driver is very low level and allows direct access to almost all RSX funtions, e.g. FIFO buffer, to achieve maximum performance.
* All data buffers, e.g. vertices and textures, are managed by DRM framework (Linux kernel). To avoid copying from user to kernel space, the buffers will be mmaped into user space.
* Provides an interface to manage graphic objects in VRAM.
* Use '''TTM''' or '''GEM''' ??? TTM is used by radeon and nouvea drivers, so i guess we could use it too. GEM is for Intel chips.
* Extend '''libdrm''' library to support new DRM driver.
* Fences can be implemented with '''RSX REF Control Register'''
 
====Memory Management====
 
* Size of all memory objects must be multiple of the page size (4096 bytes) even if a smaller size is requested by user
* Nouveau driver uses IOCTL '''DRM_NOUVEAU_GEM_NEW''' to allocate memory objects in VRAM or GART. The IOCTL returns the handle of the newly allocated memory object.
* An example from Mesa how memory objects are used: [http://fxr.watson.org/fxr/source/external/bsd/drm/dist/libdrm/nouveau/nouveau_bo.c?v=NETBSD;im=10] [http://www.opensource.apple.com/source/X11libs/X11libs-60/mesa/Mesa-7.8.2/src/mesa/drivers/dri/nouveau/nouveau_bufferobj.c]
 
====Video RAM====
 
* VRAM is allocated once during context creating and cannot be changed during the whole life of the context.
* '''lv1_gpu_memory_allocate''' returns LPAR address of allocated VRAM which can be mapped into kernel address space.
* '''VRAM starts at offset 0x0 in GPU address space.'''
* VRAM heap management is necessary, use e.g. TTM (ttm_bo_init_mm).
* This memory type is used e.g. for vertices or textures.
* It should be mappable from user space in order to allow user to put data there.
* GameOS calls it '''Local Memory'''.
* VRAM can be mapped into kernel-space with '''ioremap'''.
* To map VRAM into user-space map it first into kernel-space with '''ioremap''' and then use '''remap_pfn_range''' to map into user-space.
* Use '''VM_IO''' flag for this kind of memory when mapping it into user-space.
* Mapping examples: [http://www.scs.ch/~frey/linux/memorymap.html] [http://www.cs.fsu.edu/~baker/devices/projects/antgeo/avnet_june19/pci_avnet.c]
 
====GART Memory====
 
* GART memory region is a memory region in System Memory but accessible by RSX through GART [http://dri.freedesktop.org/wiki/GART].
* GameOS calls it '''Main Memory'''.
* '''Problem: lv1_gpu_context_iomap supports ONLY 1MB and 64kB pages'''
* Size of system memory objects mapped into GPU address space should be either multiple of 1MB which means wasting lots of RAM and we don't have enough of it anyways. This solution is NOT suitable.
* Or place several GART memory objects into 1 MB page and map it. That would mean we have to use memory manager for each 1MB page.
* That means, we have to allocate 1MB page even if user requested a smaller memory region. Then initialize a heap manager for this 1MB page and return ONLY requested size. The following requests for GART memory regions can be satisfied from the previously allocated 1MB pages which still have enough free memory.
* FIFO command buffer is an example of a GART memory object which has to be mapped into GPU address space with lv1_gpu_context_iomap before it can be used by RSX.
* User allocates FIFO command buffer in GART address space, maps it into user space, write commands into it and then pushes it to DRM driver which maps it into RSX address space and CALLs it.
* '''TTM: TTM_PL_FLAG_TT for GART memory'''
* '''GameOS applications using GCM library map GART memory beginning at offset 0x10000000 or 0x20000000, just after where the whole VRAM is mapped.'''
* '''Don't use kmalloc for this type of memory. Use __get_free_pages and mark pages with flag VM_RESERVED before exporting it to user-space else they can be swapped out.'''
* TTM uses '''struct ttm_backend_func''' to call driver specific GART mapping functions. '''nouveau_sgdma.c''' handles GART memory mapping.
 
====CPU Memory====
 
* This type of memory cannot be accessed by RSX at all.
* Because this type of memory is not mapped into RSX address space through GART we don't need to allocate it in 1MB multiples.
* What do we need it for ???
 
====Mapping Memory Objects into Kernel-Space====
 
* Nouveau driver uses '''ttm_bo_kmap''' to map memory objects into kernel-space (see '''ttm_bo_util.c''').
* Nouveau driver uses '''ttm_bo_ioremap''' to map IO memory into kernel-space, e.g. VRAM or GPU registers (see '''ttm_bo_util.c''') which uses '''ioremp_wc''' or '''ioremp_nocache'''.
* TTM uses page-wise allocation for buffers. The buffers are contiguous ONLY in a single page. That has a huge advantage over allocating 1MB contiguous memory blocks in kernel space. It's far easier to allocate a single page in Linux kernel than 1MB memory chunk, especially on PS3 arch which has only 256MB.
* '''Problem: lv1_gpu_context_iomap allows ONLY 1MB pages. Use lv1_put_iopte ???'''. See [http://lwn.net/Articles/304188/], [http://lxr.free-electrons.com/source/arch/powerpc/platforms/ps3/mm.c?a=sh#L562],  [http://wiki.ps2dev.org/ps3:hypervisor:lv1_put_iopte ] and [http://wiki.ps2dev.org/ps3:hypervisor:lv1_gpu_context_iomap].
* Yes, we can use '''lv1_put_iopte''' instead of '''lv1_gpu_context_iomap'''. That would solve the problem with 1MB pages on Linux. Both LV1 calls use the same internal LV1 function to map memory pages.
* '''lv1_gpu_context_iomap uses IOAS_ID 0 and IOID 1.'''
* TTM allows to map a buffer multiple times. Mapping information is stored in '''struct ttm_bo_kmap_obj'''.
* '''To make single allocated pages look contiguous to kernel-space, TTM uses vmap'''.
* '''It is possible to use 64KB pages for GART mapping without patching LV1. To enable 4KB pages support we have to patch LV1.'''
* Tested with 64kB IO page size. It works fine.
 
====Mapping Memory Objects into User-Space====
 
* User-space programs should be able to allocate memory objects in VRAM or GART and map it with '''mmap syscall'''.
* See '''nouveau_ttm.c:nouveau_ttm_mmap'''.
* Mapping memory objects into user-space avoids copying of data between user/kernel spaces.
* Problem: how to identify memory objects ???
* '''libdrm''' uses handles which are returned by DRM kernel driver when a new memory object is created. The handle is passed to mmap syscall as parameter '''offset'''. DRM driver looks up the handle and identifies the appropriate memory object which is mapped into user-space then.
* Nouveau driver uses TTM framework to map memory objects into user-space. TTM doesn't map all pages owned by the memory object at once but installs '''VM operation fault''' which maps single pages on demand. It makes sense because user application rarely accesses all pages of the mapped memory object at once.
* To map memory objects located in VRAM we have to map it into kernel space first with '''ioremap'''.
 
====FIFO Command Buffer====
 
* Every context has its own one main FIFO command buffer which is NOT accessible directly by user space.
* User-space applications can allocate additional FIFO command buffers in GART memory space, map it into user space, store commands there and submit to DRM driver.
* Nouveau driver uses IOCTL '''NOUVEAU_GEM_PUSHBUF''' to execute FIFO command buffers. See '''nouveau_gem.c:nouveau_gem_ioctl_pushbuf'''.
* By user applications submitted FIFO command buffers are mapped by DRM driver into RSX address space first and then executed with CALL command.
* '''Problem: All references to graphics objects contained in FIFO command buffers must be expressed in RSX address space. How does user space know the right offsets of the referenced objects ???'''
* To solve the above problem, Nouveau driver uses relocations which are submitted to DRM driver together with FIFO command buffers. The DRM driver applies the specified relocations before executing the FIFO command buffer. See '''nouveau_gem.c:nouveau_gem_pushbuf_reloc_apply'''.
* Relocations contain memory object handles which they apply to. The DRM driver looks up the memory object by its handle and the memory objects contain GPU address space offsets.
 
=====Example=====
<pre>
      ---------------------------------------------------------------
      |                                                              |
      |                                                              |
    \|/    Main FIFO command buffer (one per allocated context)    |
------------------------------        ------------------------------------
|          |        |                    |          |          |          |
|    ...    |  CALL  |        ...        |  CALL  |  ...    |  JMP    |
|          |        |                    |          |          |          |
------------------------------        ------------------------------------
                |      /|\                    |        /|\
    -------------|        |                    |          |
    |              ------|            --------|          |
  \|/              |                  |              ---|
-----------------------                |              |
|      |      |      |              |              |
|  ...  |  ...  |  RET  |              |              |
|      |      |      |              |              |
-----------------------                |              |
  FIFO command buffer 1                |              |
  (allocated by user space)            \|/              |
                                    -----------------------
                                    |      |      |      |
                                    |  ...  |  ...  |  RET  |
                                    |      |      |      |
                                    -----------------------
                                      FIFO command buffer 2
                                    (allocated by user space)
</pre>
 
====Fences====
 
* Nouveau driver implements DRM fences with REF control register. See '''nouveau_fence.c:nouveau_fence_new'''.
* Newer Nvidia chips support semaphores. Nouveau driver uses semaphores for fences if they are supported.
* libgcm functions '''SetWriteCommandLabel''' and '''SetWaitLabel''' use semaphores.
* '''SetWriteCommandLabel''' releases semaphore and '''SetWaitLabel''' acquires semaphore.
* Semaphores are placed in VRAM. Nouveau driver creates a small VRAM heap for semaphores. See '''nouveau_fence.c:nouveau_fence_channel_init'''.
 
====IOCTLs====
 
=====Context Create=====
 
* Creates new RSX context
* Allocates VRAM and memory for FIFO buffer
* Needed VRAM size and FIFO buffer size must be known during context creation
 
=====Context Destroy=====
 
* Destroys previously allocated context
 
=====Context Attribute=====
 
* Changes context attributes
 
=====Graphic Object Creatre=====
 
* Create a graphic object either in VRAM or in XDR
* Used to create FIFO command buffers too (only in XDR of course because RSX supoorts FIFO command buffer in XDR only)
 
=====Graphic Object Destroy=====
 
* Frees previously created graphic object
 
=====FIFO Execute=====
 
* Allows user space applications to execute FIFO commands.
* To avoid copying of buffers allocated by user space to main FIFO command buffer use CALL and RET RSX FIFO commands to execute FIFO commands in buffers allocated by user space.
* Several FIFO command buffers can be submitted at once.
 
=====Framebuffer=====
 
* Kernel DRM driver has to implement a frame buffer driver too
* Nouvea driver allocates frame buffer in video RAM and maps it into kernel address space (see '''nouveau_fbcon.c:nouveau_fbcon_create'''). Current ps3fb Linux driver doesn't allocate frame buffer in vide RAM but in system RAM.
* Direct access to video RAM from kernel is very very slow but some of frame buffer functions in Nouvea driver are hardware accelerated. We could do it the same way on Linux and get a hardware accelerated frame buffer this way. Not sure why ps3fb authors didn't add hardware acceleration to frame buffer. The reason why it was not implemnted in ps3fb is because LV1 doesn't create 2D graphic objects needed for 2D hardware acceleration.
* '''lv1_gpu_allocate_memory''' returns LPAR address of video RAM allocated for the RSX context.
* Unfortunately '''lv1_gpu_context_allocate''' doesn't initialize 2D ROP objects but we could use 3D operations to implement 2D ROPs.
 
===libdrm===
 
* Add support for RSX DRM to '''libdrm'''
 
===Test Kernel Module and Program===
 
* I uploaded here a test kernel module and a test user application: [http://www.gitbrew.org/~glevand/ps3/linux/ps3rsx_kernel.tar.gz] and [http://www.gitbrew.org/~glevand/ps3/linux/ps3rsx_user.tar.gz]
* I used a similar technique for mapping GPU resources into user-space like Linux kernel DRM drivers do it, e.g. Nouveau. But of course everything is very simplified in comparison with Nouveau driver. All GPU resources are mapped to user-space with mmap and there is no data copying between user and kernel space, for performance reasons. Mapping GPU resources into user-space like this is more flexible than IOCTLs.
* '''The purpose of the kernel module and the user application is to test how RSX works, to test FIFO commands and other stuff i reversed from Lv2. It's NOT for end users.'''
* Before loading the kernel module make sure ps3vram kernel module is NOT loaded.
* I used 64kB IO pages for GPU context. 4kB IO page size would be definitely a lot better for that we have to patch LV1. I will add this patch to my ps3mfw tasks for LV1.
* Just load the kernel module and then run the user application.
* The user application maps all context resources and executes some simple FIFO commands, like JMP or SET REF.
* I will add more examples later.
* By default, the kernel module allocates 8MB VRAM, 64kB FIFO and 1MB GART memory. You can change it by using kernel module parameters.
* Take a look at how i made non-contiguous allocated GART memory look contiguous to GPU, kernel-space and user-space.
* The kernel module needs some IOCTLs, e.g. for setting display buffers or flip status, because it can be done ONLY with LV1 calls. I will add it later.
 
===Links===
 
* http://yangman.ca/blog/2009/10/linux-graphics-driver-stack-explained
* http://www.bitwiz.org.uk/s/how-dri-and-drm-work.html
* http://dri.sourceforge.net/doc/drm_low_level.html
* http://www.botchco.com/agd5f/?p=50
* http://webcvs.freedesktop.org/xorg/xc/programs/Xserver/hw/xfree86/doc/DESIGN?view=co
* http://www.x.org/wiki/ModularDevelopersGuide
* http://www.xfree86.org/current/DESIGN20.html
* http://nouveau.freedesktop.org/wiki/GraphicStackOverview
* http://cgit.freedesktop.org/nouveau/xf86-video-nouveau/tree/
* http://cgit.freedesktop.org/xorg/xserver/tree/hw/xfree86/doc/exa-driver.txt
* http://cgit.freedesktop.org/xorg/xserver/tree/hw/xfree86/xaa/XAA.HOWTO
* http://cgit.freedesktop.org/nouveau/linux-2.6/tree/drivers/gpu/drm
* http://kernel.org/doc/htmldocs/drm/drmInternals.html
* http://paginas.fe.up.pt/~mei04010/dri-architecture.pdf
* http://www.ecsl.cs.sunysb.edu/tr/TR222.pdf
* http://www.freesoftwaremagazine.com/columns/the_new_xorg_features
* http://www.freesoftwaremagazine.com/columns/xorgs_x_window_innovation_its_not_all_about_graphics#
* http://www.virtuousgeek.org/exa-driver.txt
* http://www.x.org/wiki/ttm
* http://nouveau.freedesktop.org/wiki/NvObjectTypes
* TTM: [http://lwn.net/Articles/257417/] [http://nouveau.freedesktop.org/wiki/TTMMemoryManager?action=AttachFile&do=get&target=mm.pdf]
* GEM: [http://lwn.net/Articles/283798/]
* TTM vs GEM: [http://lwn.net/Articles/283793/]
* OMAP DRM Driver: https://github.com/robclark/kernel-omap4/tree/omap_gpu-android/drivers/gpu/drm/omap
 
=BD Drive=
Crossreference: [http://wiki.gitbrew.org/wikibrew/PS3:HvReverseEngineering#BD_Drive gitbrew.org::HV#BD Drive] <br />
 
 
==Profile==
 
* BD profile can be read with '''GET PROFILE''' device command or SCSI command '''GET CONFIGURATION'''
 
===Profile Table===
 
{| class="wikitable"
|-
! Profile !! Description
|-
| 0x0 || No Current Profile
|-
| 0x2 || Removable Disk
|-
| 0x8 || CD-ROM
|-
| 0x9 || CD-R
|-
| 0xa || CD-RW
|-
| 0x10 || DVD-ROM
|-
| 0x11 || DVD-R Sequential recording
|-
| 0x12 || DVD-RAM
|-
| 0x13 || DVD-RW Restricted Overwrite
|-
| 0x14 || DVD-RW Sequential recording
|-
| 0x1a || DVD+RW
|-
| 0x1b || DVD+R
|-
| 0x40 || BD-ROM
|-
| 0x41 || BD-R Sequential Recording(TBD)
|-
| 0x42 || BD-R Random Recording(TBD)
|-
| 0x43 || BD-RE
|-
| 0x50 || PS1 CD-ROM
|-
| 0x60 || PS2 CD-ROM
|-
| 0x61 || PS2 DVD-ROM
|-
| 0x70 || PS3 DVD-ROM
|-
| 0x71 || PS3 BD-ROM
|-
| 0x10000 || CD-DA
|-
| 0x20000 || SACD
|-
| 0x100000 || Dual Layer (Parallel)
|-
| 0x200000 || Dual Layer (else Parallel)
|}
 
==Buffer==
 
* BD drive has several buffers associated with internal flash
* Buffer can be read and written with SCSI commands '''READ/WRITE BUFFER'''
* Writing buffer is enabled with SCSI command '''MODE SELECT 10''' first
 
===Buffer Table===
 
{| class="wikitable"
|-
! ID !! Size !! Description
|-
| 0x0 || 0x8000 || Used to transfer firmware to BD drive
|-
| 0x1 || 0x800 || Serial Flash
|-
| 0x2 || 0x60 || P-Block
|-
| 0x3 || 0x670 || S-Block
|-
| 0x4 || 0x8000 || Host Revocation List (HRL) Empty
|-
| 0x5 || 0x8000 || Host Revocation List (HRL) Current
|-
| 0x6 || 0x670 || S-Block
|-
| 0x7 || 0x8000 || Host Revocation List (HRL)
|}
 
===HRL Buffer===
 
* Size is 32KB just like AACS specifications prescribes (See AACS Common Specification 3.2.5.2 Host Revocation List Record)
* '''We could replace HRL with an older one in BD drive flash and restore revoked Host Certificates !!!'''
 
==Device Commands==
 
===Get Profile (0x11)===
 
* BD profile can be read with LV1 call '''lv1_send_storage_device_command''' and command '''0x11'''
* LV1 sends SCSI command '''GET CONFIGURATION''' to BD drive with '''requested type 0x0''', '''starting feature number 0x0''' and '''allocation length 0x8'''
* See SCSI command '''GET CONFIGURATION'''
 
===Auto Request Sense Mode On/Off (0x30)===
 
* LV1 expects a 4 byte value: 0x0 - On, 0x1 - Off
* can be get/set via GameOS sc0x25C/604: sys_storage_send_device_command(fd of bdvd,0x30,value,4,0,0 )
 
==SCSI Commands==
 
===Get Configuration===
 
Getting the profile of a BD movie disc:
<pre>
# sg_raw -r 0x8 /dev/sr0 46 02 00 00 00 00 00 00 08 00
SCSI Status: Good
 
Sense Information:
sense buffer empty
 
Received 8 bytes of data:
00    00 00 00 38 00 00 00 40                            ...8...@ 
 
# 0x40 means BD-ROM
</pre>
 
Getting the profile of a PS3 game disc:
<pre>
# sg_raw -r 0x8 /dev/sr0 46 02 00 00 00 00 00 00 08 00
SCSI Status: Good
 
Sense Information:
sense buffer empty
 
Received 8 bytes of data:
00    00 00 00 38 00 00 ff 71                            ...8...q
# 0x71 means PS3 BD-ROM
</pre>
 
===Get SS Key===
 
* By SCSI standard undocumented parameters are used
* '''SCSI Report Key''' command with '''key format 0x3''' and '''key class 0xe0'''
* 8 bytes are returned by BD drive
* Used by VSH
 
Test with PS3 game disc:
<pre>
# sg_raw -r 8 /dev/sr0 a4 00 00 00 00 00 00 e0 00 08 03 00
SCSI Status: Good
 
Sense Information:
sense buffer empty
 
Received 8 bytes of data:
  00    00 06 00 00 00 00 00 04                            ........         
</pre>
 
===Eject Media===
 
<pre>
sg_raw /dev/sr0 0x1b 00 00 00 02 00
</pre>
 
===Load Media===
 
<pre>
sg_raw /dev/sr0 0x1b 00 00 00 03 00
</pre>
 
===Mode Select 10===
 
====Enable Buffer Write====
 
* Uses '''PF 0x1''', '''SP 0x0''' and '''parameter list length 0x10'''
* Uses the following parameter list: '''0x00 0x0e 0x00 0x00 0x00 0x00 0x00 0x00 0x2d 0x6 <buffer id> 0x00 0x00 0x00 0x00 0x00'''
* '''Enables writing to BD drive flash, e.g. to HRL buffer !!!'''
 
Test with sg3-utils which enables write to HRL buffer:
<pre>
sg_raw /dev/sr0 55 10 00 00 00 00 00 00 10 00 00 0e 00 00 00 00 00 00 2d 06 04 00 00 00 00 00
</pre>
 
===Write Buffer===
 
* Used e.g. by Update Manager to send BD firmware to BD drive
* '''Mode 0x5 (Download microcode and save)''' is used e.g. to write HRL to BD drive flash
* '''Mode 0x7 (Download microcode with offsets and save)''' is used e.g. to write BD firmware to BD drive flash
 
==AACS==
 
===AACS SPU Module===
 
* BD player on GameOS uses '''AacsModule.spu.isoself''' (/dev_flash/bdplayer) to perform AACS authentication
* Tested on OtherOS++ 3.55
* Host certificate, host private key and AACS LA public key are stored encrypted with AES-256-CTR in the SPU module and are decrypted when the SPU module is loaded or when it's accessed first. The AES-256-CTR key and IV are in the SPU module too.
 
====Communication====
 
* BD player reads '''EID3''' with '''Indi Info Manager 0x17001/0x17002''' services and passes it to SPU module
* '''EID3 is NEVER used in the SPU module although BD player passes it to the SPU module'''
* Data is exchanged with the SPU module through '''SPU In Mbox''', '''SPU Out Intr Mbox''' and a data buffer in XDR memory of size '''0x2000''' bytes.
 
====Commands====
 
* The SPU module supports max '''0x78''' commands but not all are implemented
* After a command is finished by the SPU module, it sends the status of the command to PPU through '''SPU Out Intr Mbox'''. Value 0 means success.
 
=====Read 4 Bytes from XDR Buffer (0x2)=====
 
* It just reads 4 bytes of data from the XDR buffer passed to the SPU module.
 
=====Set KCD (0x1e)=====
 
* Sends KCD (Key Conversion Data) to the SPU module.
* KCD is encrypted with the Bus Key which was established previously by AACS authentication.
 
=====Init AES_H (0x34)=====
 
* Initializes AES_H hashing function.
 
=====Calculate AES_H 1 (0x35)=====
 
* Calculates AES_H hash of the data stored in XDR buffer.
 
=====Calculate AES_H 2 (0x36)=====
 
* Calculates AES_H hash of the data stored in XDR buffer.
 
=====Generate Host Nonce (0x3c)=====
 
* Generates a nonce which is returned in command '''0x3d'''
 
=====Get Host Nonce and Certificate (0x3d)=====
 
* The data returned by this command is of size '''0x14 (Nonce) + 0x5c (Host Certificate)'''
* The data returned by this command is sent by BD player with SCSI command '''SEND KEY''' to BD drive during AACS authentication
* '''Host Certificate is easy to get from the SPU module, e.g. with aacs_module on OtherOS++'''
* The data contains a nonce, host public key and host certificate signature.
 
=====Set Drive Nonce and Certificate (0x3e)=====
 
* Stores BD drive nonce and certificate in local memory of SPU
 
=====Verify Drive Certificate (0x3f)=====
 
=====Set Drive Key (0x40)=====
 
=====Sign Host Key (0x44)=====
 
=====Get Host Key (0x45)=====
 
=====Calculate Bus Key (0x46)=====
 
=====Set Volume ID (0x47)=====
 
* Sends volume id and its MAC to the SPU module
 
=====Calculate Volume ID MAC (0x48)=====
 
* Calculates MAC of the passed volume id
 
=====Verify Volume ID MAC (0x49)=====
 
* Verifies MAC of the passed volume id
 
=====Set PMSN (0x4a)=====
 
* Sends PMSN and its MAC to the SPU module
 
=====Calculate PMSN MAC (0x4b)=====
 
* Calculates MAC of the passed PMSN
 
=====Verify PMSN (0x4c)=====
 
* Verifies MAC of the passed PMSN
 
=====Set Media ID (0x4d)=====
 
* Sends media id and its MAC to the SPU module
 
=====Calculate Media ID MAC (0x4e)=====
 
* Calculates MAC of the passed media id
 
=====Verify Media ID MAC (0x4f)=====
 
* Verifies MAC of the passed media id
 
=====Unknown (0x54)=====
 
=====Verify Host/Drive Revocation (0x55)=====
 
* BD player stores HRL/DRL list entries in XDR buffer and passes it to the SPU module for verification


===Eject Media===
=====Terminate Session (0xfefefeff)=====


<pre>
sg_raw /dev/sr0 0x1b 00 00 00 02 00
</pre>
===Load Media===
<pre>
sg_raw /dev/sr0 0x1b 00 00 00 03 00
</pre>
===Mode Select 10===
====Enable Buffer Write====
* Uses '''PF 0x1''', '''SP 0x0''' and '''parameter list length 0x10'''
* Uses the following parameter list: '''0x00 0x0e 0x00 0x00 0x00 0x00 0x00 0x00 0x2d 0x6 <buffer id> 0x00 0x00 0x00 0x00 0x00'''
* '''Enables writing to BD drive flash, e.g. to HRL buffer !!!'''
Test with sg3-utils which enables write to HRL buffer:
<pre>
sg_raw /dev/sr0 55 10 00 00 00 00 00 00 10 00 00 0e 00 00 00 00 00 00 2d 06 04 00 00 00 00 00
</pre>
===Write Buffer===
* Used e.g. by Update Manager to send BD firmware to BD drive
* '''Mode 0x5 (Download microcode and save)''' is used e.g. to write HRL to BD drive flash
* '''Mode 0x7 (Download microcode with offsets and save)''' is used e.g. to write BD firmware to BD drive flash
==AACS==
===AACS SPU Module===
* BD player on GameOS uses '''AacsModule.spu.isoself''' (/dev_flash/bdplayer) to perform AACS authentication
* Tested on OtherOS++ 3.55
* Host certificate, host private key and AACS LA public key are stored encrypted with AES-256-CTR in the SPU module and are decrypted when the SPU module is loaded or when it's accessed first. The AES-256-CTR key and IV are in the SPU module too.
* 4.76 uses new Host certificate
====Communication====
* BD player reads '''EID3''' with '''Indi Info Manager 0x17001/0x17002''' services and passes it to SPU module
* '''EID3 is NEVER used in the SPU module although BD player passes it to the SPU module'''
* Data is exchanged with the SPU module through '''SPU In Mbox''', '''SPU Out Intr Mbox''' and a data buffer in XDR memory of size '''0x2000''' bytes.
====Commands====
* The SPU module supports max '''0x78''' (til 4.75, 0x57 since 4.76) commands but not all are implemented
* After a command is finished by the SPU module, it sends the status of the command to PPU through '''SPU Out Intr Mbox'''. Value 0 means success.
{| class="wikitable sortable"
|+ style="caption-side:bottom; color:#e76700;"|''No full list!''
! colspan="2" style="background-color:#FFEBAD;"| Command in FW !! rowspan="2" style="background-color:#FFEBAD;"| Name !! rowspan="2" style="background-color:#FFEBAD;"| Parameters !! rowspan="2" style="background-color:#FFEBAD;"| Info
|-
! style="background-color:#FFEBAD;"| -4.75 !! style="background-color:#FFEBAD;"| 4.76+
|-
| 0x02|| 0x34 || Read 4 Bytes from XDR Buffer || ||
* It just reads 4 bytes of data from the XDR buffer passed to the SPU module.
|-
| 0x1C|| 0x48 || Set KCD || ||
* Sends KCD (Key Conversion Data) to the SPU module.
* KCD is encrypted with the Bus Key which was established previously by AACS authentication.
|-
| 0x34|| 0x23 || Init AES_H || ||
* Initializes AES_H hashing function.
|-
| 0x35|| 0x22 || Calculate AES_H 1 || ||
* Calculates AES_H hash of the data stored in XDR buffer.
|-
| || 0x21 ||  || 2x 4 Bytes ||
Signed CSS CheckCRL
|-
| || 0x56||  || ||
Get Random Seed
|-
| || 0x32||  || ||
Unknown
|-
| 0x36|| 0x24 || Calculate AES_H 2 || ||
* Calculates AES_H hash of the data stored in XDR buffer.
|-
| 0x3C|| 0x12 || Generate Host Nonce || ||
* Generates a nonce which is returned in command '''0x3D''' / '''0x0C'''
|-
| 0x3D|| 0x0C || Get Host Nonce and Certificate || ||
* The data returned by this command is of size '''0x14 (Nonce) + 0x5c (Host Certificate)'''
* The data returned by this command is sent by BD player with SCSI command '''SEND KEY''' to BD drive during AACS authentication
* '''Host Certificate is easy to get from the SPU module, e.g. with aacs_module on OtherOS++'''
* The data contains a nonce, host public key and host certificate signature.
|-
| 0x3E|| 0x0D|| Set Drive Nonce and Certificate || ||
* Stores BD drive nonce and certificate in local memory of SPU
|-
| 0x3F|| 0x0E|| Verify Drive Certificate || ||
|-
| 0x40|| 0x0A|| Set Drive Key || ||
|-
| 0x44|| 0x10 || Sign Host Key || ||
|-
| 0x45|| 0x0B || Get Host Key || ||
|-
| 0x46|| 0x14 || Calculate Bus Key || ||
|-
| 0x47|| 0x1C || Set Volume ID || ||
* Sends volume id and its MAC to the SPU module
|-
| 0x48|| 0x1D || Calculate Volume ID MAC || ||
* Calculates MAC of the passed volume id
|-
| 0x49|| 0x15 || Verify Volume ID MAC || ||
* Verifies MAC of the passed volume id
|-
| 0x4A|| 0x1A || Set PMSN || ||
* Sends PMSN and its MAC to the SPU module
|-
| 0x4B|| 0x1B || Calculate PMSN MAC || ||
* Calculates MAC of the passed PMSN
|-
| 0x4C|| 0x16 || Verify PMSN || ||
* Sends media id and its MAC to the SPU module
|-
| 0x4D|| 0x18 || Set Media ID || ||
* Sends media id and its MAC to the SPU module
|-
| 0x4E|| 0x19 || Calculate Media ID MAC || ||
* Calculates MAC of the passed media id
|-
| 0x4F|| 0x17 || Verify Media ID MAC || ||
* Verifies MAC of the passed media id
|-
| 0x55|| 0x1F || Verify Host/Drive Revocation || ||
* BD player stores HRL/DRL list entries in XDR buffer and passes it to the SPU module for verification
|-
| 0x72|| 0x25 ||  || || OCRL related, Content Revocation List
|-
| 0x74|| 0x26 ||  || || OCRT related
|-
| 0x75|| 0x27 ||  || || OSIG related
|-
| 0xFEFEFEFF|| 0xFEFEFEFF|| Terminate Session || ||
* AACS SPU module runs and processes commands as long as you need
* AACS SPU module runs and processes commands as long as you need
* After a command is complete, the SPU module waits for the next command
* After a command is complete, the SPU module waits for the next command
* This command terminates the current session and stops SPU module
* This command terminates the current session and stops SPU module
|-
|}


===Drive Revocation List (DRL)===
===Drive Revocation List (DRL)===
Line 10,547: Line 12,006:


====P-Block====
====P-Block====
Decrypted P-Block (and EID4) contains region settings (see below)
In decrypted P-Block(bytes 0x30 and 0x32) and in EID4(first byte) these bytes match [[Product Code]]:
{| class="wikitable sortable" style="font-size:small; border:2px ridge #999999;"
|-
! Hex !! bitflag !! [[Product Code]] !! Console Type !! Remarks
|-
| 0xFF || '''11111111''' || {{TID80}} || No BD playback on that [[Product Code]]
|-
| 0xFF || '''11111111''' || {{TID81}} || No BD playback on that [[Product Code]]
|-
| 0xFF || '''11111111''' || {{TID82}} || No BD playback on that [[Product Code]]
|-
| 0x01 || 0000000'''1''' || {{TID83}} || bit 0 (Region 0: Japan?)
|-
| 0x02 || 000000'''1'''0 || {{TID84}} || bit 1 (Region 1: USA & Canada, Bermuda, and US Territories)
|-
| 0x04 || 00000'''1'''00 || {{TID85}} || bit 2 (Region 2: Europe (with the exceptions of Russia, Ukraine, Belarus), South Africa, Swaziland, Middle East, Egypt, Lesotho, and Greenland)
|-
| 0x10 || 000'''1'''0000 || {{TID86}} || bit 4 (Region 3: Southeastern Asia)
|-
| 0x04 || 00000'''1'''00 || {{TID87}} || bit 2 (Region 2: Europe (with the exceptions of Russia, Ukraine, Belarus), South Africa, Swaziland, Middle East, Egypt, Lesotho, and Greenland)
|-
| 0x08 || 0000'''1'''000 || {{TID88}} || bit 3 (Region 4: Latin America and Australia)
|-
| 0x08 || 0000'''1'''000 || {{TID89}} || bit 3 (Region 4: Latin America and Australia)
|-
| 0x20 || 00'''1'''00000 || {{TID8A}} || bit 5 (Region 5: Russia, Asia (non-southeast), and Africa)
|-
| 0x10 || 000'''1'''0000 || {{TID8B}} || bit 4 (Region 3: Southeastern Asia)
|-
| 0x20 || 00'''1'''00000 || {{TID8C}} || bit 5 (Region 5: Russia, Asia (non-southeast), and Africa)
|-
| 0x40 || 0'''1'''000000 || {{TID8D}} || bit 6? (Region 6: China)
|-
| 0x10 || 000'''1'''0000 || {{TID8E}} || bit 4  (Region 3: Southeastern Asia)
|-
| 0x08 || 0000'''1'''000 || {{TID8F}} || bit 3 (Region 4: Latin America and Australia)
|-
| 0xFF || '''11111111''' || {{TIDA0}} || No BD playback on that [[Product Code]]
|-
|}


=====Creating=====
=====Creating=====
Line 10,750: Line 12,166:
lv1_destruct_logical_spe (0x00000000)
lv1_destruct_logical_spe (0x00000000)
</pre>
</pre>
{{Reverse engineering}}<noinclude>[[Category:Main]]</noinclude>
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