Editing Flash:ROS

== ros ==
NOR: splitted into 2 seperate sections ros0 (0x0C0000) + ros1 (0x7C0000) <br />
NAND: 1 region (0x00C0000) with 2 combined sections of ros0 (0x00C0020) + ros1 (0x07C0000)
=== Header ===
Only seen on NAND, with 2 combined sections of ros0 + ros1
==== example ====
{| class="wikitable"
|-
! NOR: !! NAND: 0x00C0000 - 0x00C001F
|-
| <pre>N.A.</pre> || <pre>Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F

000C0000  00 00 00 00 00 70 00 10 00 00 00 00 00 70 00 10  .....p.......p..
000C0010  00 00 00 00 00 E0 00 00 00 00 00 00 00 00 00 00  .....à..........</pre>
|-
|}
==== structure ====
{|class="wikitable"
|-
! Address !! Length !! Value !! Description
|-
| 0x0 || 0x8 || 0x20 (ros0) or 0x700010 (ros1) || Offset to region (relative to base 0xC0000), used by lv0ldr to load lv0 from ros0 or from ros1
|-
| 0x8 || 0x8 || 0x20 (ros0) or 0x700010 (ros1) || Offset to region (relative to base 0xC0000)
|-
| 0x10 || 0x8 || 0xE00000 || The whole ros region size
|-
| 0x8 || 0x8 || 0x0 || Unknown
|-
|}

=== ros Entries ===
==== ros0 ====
===== header =====
====== example ======
{| class="wikitable"
|-
! NOR: ros00 (0x00C0000 - 0x00C001F) !! NAND: ros0 (0x00C0020 - 0x00C003F)
|-
| <pre>Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
    
000C0000  00 00 00 00 00 00 00 00 00 00 00 00 00 6F FF E0  .............oÿà
000C0010  00 00 00 01 00 00 00 18 00 00 00 00 00 6F FF E0  .............oÿà</pre> || <pre>Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
   
000C0020  00 00 00 00 00 00 00 00 00 00 00 00 00 6F FF E0  .............oÿà
000C0030  00 00 00 01 00 00 00 18 00 00 00 00 00 6F FF E0  .............oÿà</pre>
|-
|}
====== structure ======
{|class="wikitable"
|-
! Address !! Length !! Value !! Description
|-
| 0x0 || 0x8 || 0x0 || Unknown
|-
| 0x8 || 0x8 || 0x0x6FFFE0 || Length of Flash Region (relative to region start)
|-
| 0x10 || 0x4 || 0x1 || Unknown
|-
| 0x14 || 0x4 || 0x18 || Entry Count
|-
| 0x18 || 0x8 || 0x0x6FFFE0 || Length of Flash Region (relative to region start)
|-
|}

===== Entry Table =====
Then follows a 48 byte entry for each file
====== example ======
{| class="wikitable"
|-
! NOR: ros0 (0x00C0020 - ) !! NAND: ros0 (0x00C0040 - )
|-
| <pre>Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
    
000C0020  00 00 00 00 00 00 04 90 00 00 00 00 00 04 00 00  ................
000C0030  63 72 65 73 65 72 76 65 64 5F 30 00 00 00 00 00  creserved_0.....
000C0040  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0050  00 00 00 00 00 04 04 90 00 00 00 00 00 00 00 08  ................
000C0060  73 64 6B 5F 76 65 72 73 69 6F 6E 00 00 00 00 00  sdk_version.....
000C0070  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0080  00 00 00 00 00 04 05 00 00 00 00 00 00 01 E7 C8  ..............çÈ
000C0090  6C 76 31 6C 64 72 00 00 00 00 00 00 00 00 00 00  lv1ldr..........
000C00A0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C00B0  00 00 00 00 00 05 ED 00 00 00 00 00 00 01 75 F8  ......í.......uø
000C00C0  6C 76 32 6C 64 72 00 00 00 00 00 00 00 00 00 00  lv2ldr..........
000C00D0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C00E0  00 00 00 00 00 07 63 00 00 00 00 00 00 01 2F 94  ......c......./”
000C00F0  69 73 6F 6C 64 72 00 00 00 00 00 00 00 00 00 00  isoldr..........
000C0100  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0110  00 00 00 00 00 08 93 00 00 00 00 00 00 01 F6 D8  ......“.......öØ
000C0120  61 70 70 6C 64 72 00 00 00 00 00 00 00 00 00 00  appldr..........
000C0130  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0140  00 00 00 00 00 0A 89 D8 00 00 00 00 00 00 FB 4C  ......‰Ø......ûL
000C0150  73 70 75 5F 70 6B 67 5F 72 76 6B 5F 76 65 72 69  spu_pkg_rvk_veri
000C0160  66 69 65 72 2E 73 65 6C 66 00 00 00 00 00 00 00  fier.self.......
000C0170  00 00 00 00 00 0B 85 24 00 00 00 00 00 00 5A 94  ......…$......Z”
000C0180  73 70 75 5F 74 6F 6B 65 6E 5F 70 72 6F 63 65 73  spu_token_proces
000C0190  73 6F 72 2E 73 65 6C 66 00 00 00 00 00 00 00 00  sor.self........
000C01A0  00 00 00 00 00 0B DF B8 00 00 00 00 00 00 63 D0  ......ß¸......cÐ
000C01B0  73 70 75 5F 75 74 6F 6B 65 6E 5F 70 72 6F 63 65  spu_utoken_proce
000C01C0  73 73 6F 72 2E 73 65 6C 66 00 00 00 00 00 00 00  ssor.self.......
000C01D0  00 00 00 00 00 0C 43 88 00 00 00 00 00 01 53 2C  ......Cˆ......S,
000C01E0  73 63 5F 69 73 6F 2E 73 65 6C 66 00 00 00 00 00  sc_iso.self.....
000C01F0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0200  00 00 00 00 00 0D 96 B4 00 00 00 00 00 00 42 98  ......–´......B˜
000C0210  61 69 6D 5F 73 70 75 5F 6D 6F 64 75 6C 65 2E 73  aim_spu_module.s
000C0220  65 6C 66 00 00 00 00 00 00 00 00 00 00 00 00 00  elf.............
000C0230  00 00 00 00 00 0D D9 4C 00 00 00 00 00 00 D7 F0  ......ÙL......×ð
000C0240  73 70 70 5F 76 65 72 69 66 69 65 72 2E 73 65 6C  spp_verifier.sel
000C0250  66 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  f...............
000C0260  00 00 00 00 00 0E B1 3C 00 00 00 00 00 00 80 8C  ......±<......€Œ
000C0270  6D 63 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  mc_iso_spu_modul
000C0280  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
000C0290  00 00 00 00 00 0F 31 C8 00 00 00 00 00 00 88 B8  ......1È......ˆ¸
000C02A0  6D 65 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  me_iso_spu_modul
000C02B0  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
000C02C0  00 00 00 00 00 0F BA 80 00 00 00 00 00 00 C0 78  ......º€......Àx
000C02D0  73 76 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  sv_iso_spu_modul
000C02E0  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
000C02F0  00 00 00 00 00 10 7A F8 00 00 00 00 00 00 5D B0  ......zø......]°
000C0300  73 62 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  sb_iso_spu_modul
000C0310  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
000C0320  00 00 00 00 00 10 D8 A8 00 00 00 00 00 00 22 A0  ......Ø¨......" 
000C0330  64 65 66 61 75 6C 74 2E 73 70 70 00 00 00 00 00  default.spp.....
000C0340  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0350  00 00 00 00 00 10 FB 80 00 00 00 00 00 12 6A A0  ......û€......j 
000C0360  6C 76 31 2E 73 65 6C 66 00 00 00 00 00 00 00 00  lv1.self........
000C0370  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0380  00 00 00 00 00 23 66 80 00 00 00 00 00 03 E8 A8  .....#f€......è¨
000C0390  6C 76 30 00 00 00 00 00 00 00 00 00 00 00 00 00  lv0.............
000C03A0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C03B0  00 00 00 00 00 27 4F 28 00 00 00 00 00 17 4A 18  .....'O(......J.
000C03C0  6C 76 32 5F 6B 65 72 6E 65 6C 2E 73 65 6C 66 00  lv2_kernel.self.
000C03D0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C03E0  00 00 00 00 00 3E 99 40 00 00 00 00 00 07 0F 94  .....>™@.......”
000C03F0  65 75 72 75 73 5F 66 77 2E 62 69 6E 00 00 00 00  eurus_fw.bin....
000C0400  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0410  00 00 00 00 00 45 A8 D4 00 00 00 00 00 08 04 18  .....E¨Ô........
000C0420  65 6D 65 72 5F 69 6E 69 74 2E 73 65 6C 66 00 00  emer_init.self..
000C0430  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0440  00 00 00 00 00 4D AC EC 00 00 00 00 00 06 0D 78  .....M¬ì.......x
000C0450  68 64 64 5F 63 6F 70 79 2E 73 65 6C 66 00 00 00  hdd_copy.self...
000C0460  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0470  00 00 00 00 00 53 BA 64 00 00 00 00 00 00 12 A8  .....Sºd.......¨
000C0480  6D 61 6E 75 5F 69 6E 66 6F 5F 73 70 75 5F 6D 6F  manu_info_spu_mo
000C0490  64 75 6C 65 2E 73 65 6C 66 00 00 00 00 00 00 00  dule.self.......</pre> || <pre>Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
    
000C0040  00 00 00 00 00 00 04 90 00 00 00 00 00 04 00 00  ................
000C0050  63 72 65 73 65 72 76 65 64 5F 30 00 00 00 00 00  creserved_0.....
000C0060  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0070  00 00 00 00 00 04 04 90 00 00 00 00 00 00 00 08  ................
000C0080  73 64 6B 5F 76 65 72 73 69 6F 6E 00 00 00 00 00  sdk_version.....
000C0090  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C00A0  00 00 00 00 00 04 05 00 00 00 00 00 00 01 E7 C8  ..............çÈ
000C00B0  6C 76 31 6C 64 72 00 00 00 00 00 00 00 00 00 00  lv1ldr..........
000C00C0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C00D0  00 00 00 00 00 05 ED 00 00 00 00 00 00 01 6F F0  ......í.......oð
000C00E0  6C 76 32 6C 64 72 00 00 00 00 00 00 00 00 00 00  lv2ldr..........
000C00F0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0100  00 00 00 00 00 07 5D 00 00 00 00 00 00 01 2F 74  ......]......./t
000C0110  69 73 6F 6C 64 72 00 00 00 00 00 00 00 00 00 00  isoldr..........
000C0120  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0130  00 00 00 00 00 08 8C 80 00 00 00 00 00 01 E5 D4  ......Œ€......åÔ
000C0140  61 70 70 6C 64 72 00 00 00 00 00 00 00 00 00 00  appldr..........
000C0150  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0160  00 00 00 00 00 0A 72 54 00 00 00 00 00 00 FB 4C  ......rT......ûL
000C0170  73 70 75 5F 70 6B 67 5F 72 76 6B 5F 76 65 72 69  spu_pkg_rvk_veri
000C0180  66 69 65 72 2E 73 65 6C 66 00 00 00 00 00 00 00  fier.self.......
000C0190  00 00 00 00 00 0B 6D A0 00 00 00 00 00 00 5A 94  ......m ......Z”
000C01A0  73 70 75 5F 74 6F 6B 65 6E 5F 70 72 6F 63 65 73  spu_token_proces
000C01B0  73 6F 72 2E 73 65 6C 66 00 00 00 00 00 00 00 00  sor.self........
000C01C0  00 00 00 00 00 0B C8 34 00 00 00 00 00 00 63 D0  ......È4......cÐ
000C01D0  73 70 75 5F 75 74 6F 6B 65 6E 5F 70 72 6F 63 65  spu_utoken_proce
000C01E0  73 73 6F 72 2E 73 65 6C 66 00 00 00 00 00 00 00  ssor.self.......
000C01F0  00 00 00 00 00 0C 2C 04 00 00 00 00 00 01 53 2C  ......,.......S,
000C0200  73 63 5F 69 73 6F 2E 73 65 6C 66 00 00 00 00 00  sc_iso.self.....
000C0210  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0220  00 00 00 00 00 0D 7F 30 00 00 00 00 00 00 42 98  .......0......B˜
000C0230  61 69 6D 5F 73 70 75 5F 6D 6F 64 75 6C 65 2E 73  aim_spu_module.s
000C0240  65 6C 66 00 00 00 00 00 00 00 00 00 00 00 00 00  elf.............
000C0250  00 00 00 00 00 0D C1 C8 00 00 00 00 00 00 D7 F0  ......ÁÈ......×ð
000C0260  73 70 70 5F 76 65 72 69 66 69 65 72 2E 73 65 6C  spp_verifier.sel
000C0270  66 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  f...............
000C0280  00 00 00 00 00 0E 99 B8 00 00 00 00 00 00 80 8C  ......™¸......€Œ
000C0290  6D 63 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  mc_iso_spu_modul
000C02A0  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
000C02B0  00 00 00 00 00 0F 1A 44 00 00 00 00 00 00 88 B8  .......D......ˆ¸
000C02C0  6D 65 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  me_iso_spu_modul
000C02D0  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
000C02E0  00 00 00 00 00 0F A2 FC 00 00 00 00 00 00 C0 78  ......¢ü......Àx
000C02F0  73 76 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  sv_iso_spu_modul
000C0300  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
000C0310  00 00 00 00 00 10 63 74 00 00 00 00 00 00 5D B0  ......ct......]°
000C0320  73 62 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  sb_iso_spu_modul
000C0330  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
000C0340  00 00 00 00 00 10 C1 24 00 00 00 00 00 00 22 A0  ......Á$......" 
000C0350  64 65 66 61 75 6C 74 2E 73 70 70 00 00 00 00 00  default.spp.....
000C0360  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0370  00 00 00 00 00 10 E4 00 00 00 00 00 00 12 80 50  ......ä.......€P
000C0380  6C 76 31 2E 73 65 6C 66 00 00 00 00 00 00 00 00  lv1.self........
000C0390  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C03A0  00 00 00 00 00 23 64 80 00 00 00 00 00 03 E6 78  .....#d€......æx
000C03B0  6C 76 30 00 00 00 00 00 00 00 00 00 00 00 00 00  lv0.............
000C03C0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C03D0  00 00 00 00 00 27 4A F8 00 00 00 00 00 17 27 58  .....'Jø......'X
000C03E0  6C 76 32 5F 6B 65 72 6E 65 6C 2E 73 65 6C 66 00  lv2_kernel.self.
000C03F0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0400  00 00 00 00 00 3E 72 50 00 00 00 00 00 07 0F 94  .....>rP.......”
000C0410  65 75 72 75 73 5F 66 77 2E 62 69 6E 00 00 00 00  eurus_fw.bin....
000C0420  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0430  00 00 00 00 00 45 81 E4 00 00 00 00 00 08 04 18  .....E.ä........
000C0440  65 6D 65 72 5F 69 6E 69 74 2E 73 65 6C 66 00 00  emer_init.self..
000C0450  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0460  00 00 00 00 00 4D 85 FC 00 00 00 00 00 06 0D 78  .....M…ü.......x
000C0470  68 64 64 5F 63 6F 70 79 2E 73 65 6C 66 00 00 00  hdd_copy.self...
000C0480  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
000C0490  00 00 00 00 00 53 93 74 00 00 00 00 00 00 12 A8  .....S“t.......¨
000C04A0  6D 61 6E 75 5F 69 6E 66 6F 5F 73 70 75 5F 6D 6F  manu_info_spu_mo
000C04B0  64 75 6C 65 2E 73 65 6C 66 00 00 00 00 00 00 00  dule.self.......</pre>
|-
|}
====== structure ======
{|class="wikitable"
|-
! Address !! Length !! Value !! Description
|-
| 0x0 || 0x8 || 0x490 || File offset relative to Region start
|-
| 0x8 || 0x8 || 0x40000 || File length
|-
| 0x10 || 0x20 || char[32]:"creserved_0" || File name
|}

==== ros1 ====
===== header =====
====== example ======
{| class="wikitable"
|-
! NOR: ros1 (0x07C0000) !! NAND: ros1 (0x07C0010)
|-
| <pre>Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
    
007C0000  00 00 00 00 00 00 00 00 00 00 00 00 00 6F FF E0  .............oÿà
007C0010  00 00 00 01 00 00 00 16 00 00 00 00 00 6F FF E0  .............oÿà</pre> || <pre>Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
    
007C0010  00 00 00 00 00 00 00 00 00 00 00 00 00 6F FF E0  .............oÿà
007C0020  00 00 00 01 00 00 00 17 00 00 00 00 00 6F FF E0  .............oÿà</pre>
|-
|}
====== structure ======
{|class="wikitable"
|-
! Address !! Length !! Value !! Description
|-
| 0x0 || 0x8 || 0x0 || Unknown
|-
| 0x8 || 0x8 || 0x0x6FFFE0 || Length of Flash Region (relative to region start)
|-
| 0x10 || 0x4 || 0x1 || Unknown
|-
| 0x14 || 0x4 || 0x16 || Entry Count
|-
| 0x18 || 0x8 || 0x0x6FFFE0 || Length of Flash Region (relative to region start)
|-
|}
===== Entry Table =====
Then follows a 48 byte entry for each file
====== example ======
{| class="wikitable"
|-
! NOR: ros1 (0x07C0020) !! NAND: ros1 (0x07C0030)
|-
| <pre>Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
    
007C0020  00 00 00 00 00 00 04 30 00 00 00 00 00 04 00 00  .......0........
007C0030  63 72 65 73 65 72 76 65 64 5F 30 00 00 00 00 00  creserved_0.....
007C0040  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0050  00 00 00 00 00 04 04 30 00 00 00 00 00 00 00 08  .......0........
007C0060  73 64 6B 5F 76 65 72 73 69 6F 6E 00 00 00 00 00  sdk_version.....
007C0070  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0080  00 00 00 00 00 04 04 80 00 00 00 00 00 01 E5 CC  .......€......åÌ
007C0090  6C 76 31 6C 64 72 00 00 00 00 00 00 00 00 00 00  lv1ldr..........
007C00A0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C00B0  00 00 00 00 00 05 EA 80 00 00 00 00 00 01 6D B0  ......ê€......m°
007C00C0  6C 76 32 6C 64 72 00 00 00 00 00 00 00 00 00 00  lv2ldr..........
007C00D0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C00E0  00 00 00 00 00 07 58 80 00 00 00 00 00 01 2E 24  ......X€.......$
007C00F0  69 73 6F 6C 64 72 00 00 00 00 00 00 00 00 00 00  isoldr..........
007C0100  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0110  00 00 00 00 00 08 87 00 00 00 00 00 00 01 DA 04  ......‡.......Ú.
007C0120  61 70 70 6C 64 72 00 00 00 00 00 00 00 00 00 00  appldr..........
007C0130  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0140  00 00 00 00 00 0A 61 04 00 00 00 00 00 00 FA B4  ......a.......ú´
007C0150  73 70 75 5F 70 6B 67 5F 72 76 6B 5F 76 65 72 69  spu_pkg_rvk_veri
007C0160  66 69 65 72 2E 73 65 6C 66 00 00 00 00 00 00 00  fier.self.......
007C0170  00 00 00 00 00 0B 5B B8 00 00 00 00 00 00 5B FC  ......[¸......[ü
007C0180  73 70 75 5F 74 6F 6B 65 6E 5F 70 72 6F 63 65 73  spu_token_proces
007C0190  73 6F 72 2E 73 65 6C 66 00 00 00 00 00 00 00 00  sor.self........
007C01A0  00 00 00 00 00 0B B7 B4 00 00 00 00 00 00 65 B4  ......·´......e´
007C01B0  73 70 75 5F 75 74 6F 6B 65 6E 5F 70 72 6F 63 65  spu_utoken_proce
007C01C0  73 73 6F 72 2E 73 65 6C 66 00 00 00 00 00 00 00  ssor.self.......
007C01D0  00 00 00 00 00 0C 1D 68 00 00 00 00 00 01 53 2C  .......h......S,
007C01E0  73 63 5F 69 73 6F 2E 73 65 6C 66 00 00 00 00 00  sc_iso.self.....
007C01F0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0200  00 00 00 00 00 0D 70 94 00 00 00 00 00 00 44 80  ......p”......D€
007C0210  61 69 6D 5F 73 70 75 5F 6D 6F 64 75 6C 65 2E 73  aim_spu_module.s
007C0220  65 6C 66 00 00 00 00 00 00 00 00 00 00 00 00 00  elf.............
007C0230  00 00 00 00 00 0D B5 14 00 00 00 00 00 00 D7 44  ......µ.......×D
007C0240  73 70 70 5F 76 65 72 69 66 69 65 72 2E 73 65 6C  spp_verifier.sel
007C0250  66 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  f...............
007C0260  00 00 00 00 00 0E 8C 58 00 00 00 00 00 00 80 8C  ......ŒX......€Œ
007C0270  6D 63 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  mc_iso_spu_modul
007C0280  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
007C0290  00 00 00 00 00 0F 0C E4 00 00 00 00 00 00 88 B8  .......ä......ˆ¸
007C02A0  6D 65 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  me_iso_spu_modul
007C02B0  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
007C02C0  00 00 00 00 00 0F 95 9C 00 00 00 00 00 00 C0 78  ......•œ......Àx
007C02D0  73 76 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  sv_iso_spu_modul
007C02E0  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
007C02F0  00 00 00 00 00 10 56 14 00 00 00 00 00 00 5D B0  ......V.......]°
007C0300  73 62 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  sb_iso_spu_modul
007C0310  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
007C0320  00 00 00 00 00 10 B3 C4 00 00 00 00 00 00 22 A0  ......³Ä......" 
007C0330  64 65 66 61 75 6C 74 2E 73 70 70 00 00 00 00 00  default.spp.....
007C0340  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0350  00 00 00 00 00 10 D6 80 00 00 00 00 00 12 E1 60  ......Ö€......á`
007C0360  6C 76 31 2E 73 65 6C 66 00 00 00 00 00 00 00 00  lv1.self........
007C0370  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0380  00 00 00 00 00 23 B8 00 00 00 00 00 00 03 E3 58  .....#¸.......ãX
007C0390  6C 76 30 00 00 00 00 00 00 00 00 00 00 00 00 00  lv0.............
007C03A0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C03B0  00 00 00 00 00 27 9B 58 00 00 00 00 00 16 19 80  .....'›X.......€
007C03C0  6C 76 32 5F 6B 65 72 6E 65 6C 2E 73 65 6C 66 00  lv2_kernel.self.
007C03D0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C03E0  00 00 00 00 00 3D B4 D8 00 00 00 00 00 07 09 F0  .....=´Ø.......ð
007C03F0  65 75 72 75 73 5F 66 77 2E 62 69 6E 00 00 00 00  eurus_fw.bin....
007C0400  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0410  00 00 00 00 00 44 BE C8 00 00 00 00 00 08 1B 30  .....D¾È.......0
007C0420  65 6D 65 72 5F 69 6E 69 74 2E 73 65 6C 66 00 00  emer_init.self..
007C0430  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................</pre> || <pre>Offset(h) 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
    
007C0030  00 00 00 00 00 00 04 60 00 00 00 00 00 04 00 00  .......`........
007C0040  63 72 65 73 65 72 76 65 64 5F 30 00 00 00 00 00  creserved_0.....
007C0050  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0060  00 00 00 00 00 04 04 60 00 00 00 00 00 00 00 08  .......`........
007C0070  73 64 6B 5F 76 65 72 73 69 6F 6E 00 00 00 00 00  sdk_version.....
007C0080  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0090  00 00 00 00 00 04 04 68 00 00 00 00 00 00 FB 4C  .......h......ûL
007C00A0  73 70 75 5F 70 6B 67 5F 72 76 6B 5F 76 65 72 69  spu_pkg_rvk_veri
007C00B0  66 69 65 72 2E 73 65 6C 66 00 00 00 00 00 00 00  fier.self.......
007C00C0  00 00 00 00 00 04 FF B4 00 00 00 00 00 00 C9 30  ......ÿ´......É0
007C00D0  73 70 75 5F 74 6F 6B 65 6E 5F 70 72 6F 63 65 73  spu_token_proces
007C00E0  73 6F 72 2E 73 65 6C 66 00 00 00 00 00 00 00 00  sor.self........
007C00F0  00 00 00 00 00 05 C8 E4 00 00 00 00 00 00 63 D0  ......Èä......cÐ
007C0100  73 70 75 5F 75 74 6F 6B 65 6E 5F 70 72 6F 63 65  spu_utoken_proce
007C0110  73 73 6F 72 2E 73 65 6C 66 00 00 00 00 00 00 00  ssor.self.......
007C0120  00 00 00 00 00 06 2C B4 00 00 00 00 00 01 D2 D8  ......,´......ÒØ
007C0130  73 63 5F 69 73 6F 2E 73 65 6C 66 00 00 00 00 00  sc_iso.self.....
007C0140  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0150  00 00 00 00 00 07 FF 8C 00 00 00 00 00 00 42 98  ......ÿŒ......B˜
007C0160  61 69 6D 5F 73 70 75 5F 6D 6F 64 75 6C 65 2E 73  aim_spu_module.s
007C0170  65 6C 66 00 00 00 00 00 00 00 00 00 00 00 00 00  elf.............
007C0180  00 00 00 00 00 08 42 24 00 00 00 00 00 00 D7 F0  ......B$......×ð
007C0190  73 70 70 5F 76 65 72 69 66 69 65 72 2E 73 65 6C  spp_verifier.sel
007C01A0  66 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  f...............
007C01B0  00 00 00 00 00 09 1A 14 00 00 00 00 00 00 80 8C  ..............€Œ
007C01C0  6D 63 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  mc_iso_spu_modul
007C01D0  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
007C01E0  00 00 00 00 00 09 9A A0 00 00 00 00 00 00 88 B8  ......š ......ˆ¸
007C01F0  6D 65 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  me_iso_spu_modul
007C0200  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
007C0210  00 00 00 00 00 0A 23 58 00 00 00 00 00 00 C0 78  ......#X......Àx
007C0220  73 76 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  sv_iso_spu_modul
007C0230  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
007C0240  00 00 00 00 00 0A E3 D0 00 00 00 00 00 00 5D B0  ......ãÐ......]°
007C0250  73 62 5F 69 73 6F 5F 73 70 75 5F 6D 6F 64 75 6C  sb_iso_spu_modul
007C0260  65 2E 73 65 6C 66 00 00 00 00 00 00 00 00 00 00  e.self..........
007C0270  00 00 00 00 00 0B 41 80 00 00 00 00 00 00 22 A0  ......A€......" 
007C0280  64 65 66 61 75 6C 74 2E 73 70 70 00 00 00 00 00  default.spp.....
007C0290  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C02A0  00 00 00 00 00 0B 64 80 00 00 00 00 00 12 5E F0  ......d€......^ð
007C02B0  6C 76 31 2E 73 65 6C 66 00 00 00 00 00 00 00 00  lv1.self........
007C02C0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C02D0  00 00 00 00 00 1D C3 80 00 00 00 00 00 0B 54 E8  ......Ã€......Tè
007C02E0  6C 76 30 00 00 00 00 00 00 00 00 00 00 00 00 00  lv0.............
007C02F0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0300  00 00 00 00 00 29 18 80 00 00 00 00 00 00 05 00  .....).€........
007C0310  6C 76 30 2E 32 00 00 00 00 00 00 00 00 00 00 00  lv0.2...........
007C0320  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0330  00 00 00 00 00 29 1D 80 00 00 00 00 00 17 89 58  .....).€......‰X
007C0340  6C 76 32 5F 6B 65 72 6E 65 6C 2E 73 65 6C 66 00  lv2_kernel.self.
007C0350  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0360  00 00 00 00 00 40 A6 D8 00 00 00 00 00 07 0F 94  .....@¦Ø.......”
007C0370  65 75 72 75 73 5F 66 77 2E 62 69 6E 00 00 00 00  eurus_fw.bin....
007C0380  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0390  00 00 00 00 00 47 B6 6C 00 00 00 00 00 07 E2 68  .....G¶l......âh
007C03A0  65 6D 65 72 5F 69 6E 69 74 2E 73 65 6C 66 00 00  emer_init.self..
007C03B0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C03C0  00 00 00 00 00 4F 98 D4 00 00 00 00 00 06 18 18  .....O˜Ô........
007C03D0  68 64 64 5F 63 6F 70 79 2E 73 65 6C 66 00 00 00  hdd_copy.self...
007C03E0  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C03F0  00 00 00 00 00 55 B0 EC 00 00 00 00 00 00 12 A8  .....U°ì.......¨
007C0400  6D 61 6E 75 5F 69 6E 66 6F 5F 73 70 75 5F 6D 6F  manu_info_spu_mo
007C0410  64 75 6C 65 2E 73 65 6C 66 00 00 00 00 00 00 00  dule.self.......
007C0420  00 00 00 00 00 55 C3 94 00 00 00 00 00 00 02 E0  .....UÃ”.......à
007C0430  70 72 6F 67 2E 73 72 76 6B 00 00 00 00 00 00 00  prog.srvk.......
007C0440  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
007C0450  00 00 00 00 00 55 C6 74 00 00 00 00 00 00 02 40  .....UÆt.......@
007C0460  70 6B 67 2E 73 72 76 6B 00 00 00 00 00 00 00 00  pkg.srvk........
007C0470  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................</pre>
|-
|}
====== structure ======
{|class="wikitable"
|-
! Address !! Length !! Value !! Description
|-
| 0x0 || 0x8 || 0x430 || File offset relative to Region start
|-
| 0x8 || 0x8 || 0x40000 || File length
|-
| 0x10 || 0x20 || char[32]:"creserved_0" || File name
|}


{{Flash}}
<noinclude>[[Category:Main]]</noinclude>