Editing Documented SPU Channels

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!Number (hex)
!Number (hex)
!Notes
!Notes
|-
|SPU Write Outbound Interrupt Mailbox
|0x1E
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|-
|SPU Read Inbound Mailbox
|0x1D
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|-
|SPU Write Outbound Mailbox
|0x1C
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|-
|MFC Read Atomic Command Status
|0x1B
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|-
|MFC Write List Stall-and-Notify Tag Acknowledgment
|0x1A
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|-
|MFC Read List Stall-and-Notify Tag Status
|0x19
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|-
|MFC Read Tag Group Status
|0x18
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|-
|MFC Write Tag Status Update Request
|0x17
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|-
|MFC Write Tag Group Query Mask
|0x16
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|-
|-
|MFC Command Opcode
|MFC Command Opcode
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|-
|-
|SPU Read State Save-and-Restore
|0x0F
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|SPU Write State Save-and-Restore
|0x0E
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|-
|SPU Read Machine Status
|0x0D
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|-
|MFC Read Tag Group Query Mask Channel
|0x0C
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|-
|SPU Read Event Mask
|0x0B
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|-
|MFC Write Multisource Synchronization Request
|0x09
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|SPU Read Decrementer
|0x08
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|SPU Write Decrementer
|0x07
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|-
|SPU Signal Notification 2
|0x04
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|-
|SPU Signal Notification 1
|0x03
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|SPU Write Event Acknowledgment
|0x02
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|-
|SPU Write Event Mask
|0x01
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|-
|SPU Read Event Status
|0x00
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|-
|}
* The rest of the 64 channels are reserved.
* There is a total of 128 channels (some of them are [[Documented SPU Channels]] and some others are [[Undocumented SPU Channels]])
=== Resources ===
* http://www.ibm.com/developerworks/library/pa-celldmas/
: ''The MFC is discussed in Section 6 of [https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/1AEEE1270EA2776387257060006E61BA/$file/CBEA_v1.02_11Oct2007_pub.pdf Cell Broadband Engine Architecture V1.0], while the first 27 DMA channels are listed in the [http://www.diku.dk/~rehr/cell/docs/SPU_language_extensions_2.1.pdf SPU C/C++ Language Extensions V2.0]''
{{Development}}<noinclude>[[Category:Main]]</noinclude>
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