Editing CXD2981GB
Jump to navigation
Jump to search
The edit can be undone. Please check the comparison below to verify that this is what you want to do, and then publish the changes below to finish undoing the edit.
| Latest revision | Your text | ||
| Line 1: | Line 1: | ||
== CXD2981GB ([[CELL BE]] - 65nm) == | == CXD2981GB ([[CELL BE]] - 65nm) == | ||
65nm variants: [[CXD2981AGB]] · [[CXD2981GB]] · [[CXD2989]] · [[CXD2989AGB]] · [[CXD2989GB]] · [[CXD2990GB]] · [[CXD2990AGB]] | 65nm variants: [[CXD2981AGB]] · [[CXD2981GB]] · [[CXD2989]] · [[CXD2989AGB]] · [[CXD2989GB]] · [[CXD2990GB]] · [[CXD2990AGB]] | ||
{ | For pinout reference, see : [[CXD2964GB]] ([[CELL BE]] - 90nm) | ||
{| class="wikitable mw-datatable" style="width:100%" | |||
|+ CXD2981/89/90 (1342 pads) | |||
|- | |||
! Pad # !! Name !! Description | |||
|- | |||
| AV13 || SPI_SI/BE_SPI_DO || < Connected to [[Syscon Hardware|Syscon]] pad N2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin 80 ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) | |||
|- | |||
| AV23 || THERMAL_OVERLOAD/SYS_THR_ALRT || > Connected to [[Syscon Hardware|Syscon]] pad E9 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin <abbr title="Unknown>UNK</abbr> ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) through transistor | |||
|- | |||
| AW13 || SPI_EN/BE_SPI_CS || < Connected to [[Syscon Hardware|Syscon]] pad M2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin 83 ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) | |||
|- | |||
| AW18 || HARD_RESET/BE_RESET_AND || < Connected to [[Syscon Hardware|Syscon]] pad P2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin <abbr title="Unknown>UNK</abbr> ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) | |||
|- | |||
| AY13 || SPI_CLK/BE_SPI_CLK || < Connected to [[Syscon Hardware|Syscon]] pad N1 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin 82 ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) | |||
|- | |||
| BA13 || SPI_SO/BE_SPI_DI || > Connected to [[Syscon Hardware|Syscon]] pad M1 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin 81 ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) through 47 resistor | |||
|- | |||
| BA17 || ATTENTION/BE_INT || > Connected to [[Syscon Hardware|Syscon]] pad T2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin 3 ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) | |||
|- | |||
| BA19 || POWER_GOOD/BE_POWGOOD || < Connected to [[Syscon Hardware|Syscon]] pad P1 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin <abbr title="Unknown>UNK</abbr> ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) | |||
|} | |||
*Syscon pads ---> https://postimg.cc/tZKbn28z | |||
{{Wikify}} | |||
{{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude> | {{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude> | ||