DEV9C: Difference between revisions
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== Overview == | == Overview == | ||
Also known as "HDD controller" in | Controller for the DEV9 interface/SSBUS. An earlier name that was used until the introduction of non-PCMCIA variants was PCIC (PC-Card Interface Controller). Also known as "HDD controller" or "SSBUS controller" in official documentation. | ||
== Revisions == | == Revisions == | ||
PC Card Interface Controller: | |||
*?:?: M38S0210-023 (on Gmain 4.0) | |||
**OKI-branded, not Sony | |||
*1.2: CXD9546R (in DTL-T10000, MIF-2 R2.0) | |||
*2.0: CXD9566R (on all retail PCMCIA-motherboards: GH-001, GH-003, GH-008; also in DTL-T10000, MIF-2 R3.0) | |||
"HDD Controller": | "HDD Controller": | ||
*3.0: CXD9611R (GH-004, GH-005, GH-006, GH-007, GH-010, GH-012, GH-013, GH-014) | |||
*3.1: CXD9611AR (GH-006, GH-007, GH-010, GH-012, GH-013, GH-014) | |||
* 3.0: CXD9611R (GH-004, GH-005, GH-006, GH-007, GH-010, GH-012, GH-013, GH-014) | **Based on OKI MG73Q customer-structured array (at least some other revisions probably as well) | ||
* 3.1: CXD9611AR (GH-006, GH-007, GH-010, GH-012, GH-013, GH-014) | |||
** Based on OKI MG73Q customer-structured array (at least some other revisions probably as well) | |||
"SSBUS Controller": | "SSBUS Controller": | ||
* 3.1: CXD9611BR (GH-015(12-22), GH-015(31-41), GH-017, GH-018, GH-019, GH-022, GH-023, XPD-001, XPD-005) | *3.1: CXD9611BR (GH-015(12-22), GH-015(31-41), GH-016, GH-017, GH-018, GH-019, GH-022, GH-023, XPD-001, XPD-005) | ||
* 3.1: | *3.1: CXD9686R (GH-015(31), GH-017, GH-019) | ||
* 3.1: | *3.1: CXD9686AR (GH-019(31), GH-022(31)) | ||
* | *3.1: CXD9686BR (GH-015(31-41)) | ||
* 3.2: CXD2955R (GH-026, GH-027, GH-029, GH-032, GH-035) | *3.2: CXD2955R (GH-026, GH-027, GH-029, GH-032, GH-035) | ||
** Additionally also includes functionality of [[SPU2]] | **Additionally also includes functionality of [[SPU2]] | ||
Starting with GH-026, | Starting with GH-026, DEV9C and the [[SPU2]] were combined into a single chip (CXD2955R), until DEV9C ultimately became obsolete with the introduction of the L-chassis (SCPH-750XX). From a software viewpoint, these newer consoles report a v3.1 DEV9C. | ||
Latest revision as of 03:42, 24 November 2024
Overview[edit | edit source]
Controller for the DEV9 interface/SSBUS. An earlier name that was used until the introduction of non-PCMCIA variants was PCIC (PC-Card Interface Controller). Also known as "HDD controller" or "SSBUS controller" in official documentation.
Revisions[edit | edit source]
PC Card Interface Controller:
- ?:?: M38S0210-023 (on Gmain 4.0)
- OKI-branded, not Sony
- 1.2: CXD9546R (in DTL-T10000, MIF-2 R2.0)
- 2.0: CXD9566R (on all retail PCMCIA-motherboards: GH-001, GH-003, GH-008; also in DTL-T10000, MIF-2 R3.0)
"HDD Controller":
- 3.0: CXD9611R (GH-004, GH-005, GH-006, GH-007, GH-010, GH-012, GH-013, GH-014)
- 3.1: CXD9611AR (GH-006, GH-007, GH-010, GH-012, GH-013, GH-014)
- Based on OKI MG73Q customer-structured array (at least some other revisions probably as well)
"SSBUS Controller":
- 3.1: CXD9611BR (GH-015(12-22), GH-015(31-41), GH-016, GH-017, GH-018, GH-019, GH-022, GH-023, XPD-001, XPD-005)
- 3.1: CXD9686R (GH-015(31), GH-017, GH-019)
- 3.1: CXD9686AR (GH-019(31), GH-022(31))
- 3.1: CXD9686BR (GH-015(31-41))
- 3.2: CXD2955R (GH-026, GH-027, GH-029, GH-032, GH-035)
- Additionally also includes functionality of SPU2
Starting with GH-026, DEV9C and the SPU2 were combined into a single chip (CXD2955R), until DEV9C ultimately became obsolete with the introduction of the L-chassis (SCPH-750XX). From a software viewpoint, these newer consoles report a v3.1 DEV9C.