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==Specifications==
==Specifications==
* Parallel rendering processor with embedded DRAM "Graphics Synthesizer" (GS) clocked at 147.456 MHz
* Parallel rendering processor with embedded DRAM "Graphics Synthesizer" (GS) clocked at 147.456 MHz
* 279 mm² die (combined EE+GS in SCPH-7500x: 86 mm², 53.5 million transistors)
* Programmable CRT controller (PCRTC) for output
* Programmable CRT controller (PCRTC) for output
*Pixel pipelines: 16 without any texture mapping units (TMU), however half of pixel pipelines can perform texturing, so fillrate is either 16 pixels per clock with untextured 2400 Mpixels; or 8 pixels per clock with 1200 megapixels with bilinear texturing, and 1200 megatexels (bilinear).
*Pixel pipelines: 16 without any texture mapping units (TMU), however half of pixel pipelines can perform texturing, so fillrate is either 16 pixels per clock with untextured 2400 Mpixels; or 8 pixels per clock with 1200 megapixels with bilinear texturing, and 1200 megatexels (bilinear).
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