Editing Clocks
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===GMCG=== | ===GMCG=== | ||
The GMCG has a 18.432 Mhz XTAL and generates a 54 Mhz or 53.9 Mhz clock for GS (selection between 54 and 53.9 is done via control line from [[ | The GMCG has a 18.432 Mhz XTAL and generates a 54 Mhz or 53.9 Mhz clock for GS (selection between 54 and 53.9 is done via control line from [[SSBUS controller]], later from the SPU2+SSBUS-Controller combo IC) and also creates a 18.432 Mhz input clock for the DRCG-lite. Β | ||
===DRCG-lite=== | ===DRCG-lite=== |