Editing Clocks

= Overview =

= A, A+, AB, B, B', C, C', D, D' chassis =
Clock generation is based around one or two "DRCG-lite" (DRCG = Direct Rambus Clock Generator) clockgen ICs by varying manufacturers (Cypress CY2212 or TI CDCR61A).

All of these boards have an DRCG-lite IC which has an 18.432 Mhz XTAL connected to it's inputs. This DRCG-lite is set for a multiplier of 64/3 and thus creates a 393.216 Mhz clock.

Additionally, all boards (GH-001, GH-003, GH-005, GH-007, GH-012, GH-014, GH-016) that have the original [[Graphics_Synthesizer|GS]] (with metal heat spreader, CXD2934GB) have a second DRCG-lite IC (also with an 18.432 Mhz XTAL) which is set to a multiplier of 16 to generate a 294.912 Mhz which is fed into GS. ''This additional DRCG is not found on their same-chassis-counterparts (GH-004, GH-006, GH-008, GH-010, GH-013) that use the second revision GS (CXD2944GB).''

= F, G, H chassis =
Based around one "DRCG-lite" and one "GMCG" (=Graphics Media Clock Generator) clock generator. The GMCG has a 18.432 Mhz XTAL and generates both, a 54 Mhz or 53.9 Mhz (selectable) clock and also creates a 18.432 Mhz input clock for the DRCG-lite. The DRCG-lite is set for a multiplier of 64/3 and thus creates a 393.216 Mhz clock.

= I, J, K, L, M chassis =
Based around one single DRCG-lite compatible clock generator with an 18.432 Mhz XTAL, generating a 393.216 Mhz clock, which additionally also generates the selectable 54 Mhz or 53.9 Mhz clock (e.g. Cypress CY22313).

= N, P, R chassis =
Based around one single clock generator IC with an 18.432 Mhz XTAL. Part number on IC case is always (?) '''627G04LF'''. Not much else is known, since no public datasheet is available.