Editing Clocks
Jump to navigation
Jump to search
The edit can be undone. Please check the comparison below to verify that this is what you want to do, and then publish the changes below to finish undoing the edit.
| Latest revision | Your text | ||
| Line 4: | Line 4: | ||
Clock generation is based around one or two "DRCG-lite" (DRCG = Direct Rambus Clock Generator) clockgen ICs by varying manufacturers (Cypress CY2212 or TI CDCR61A). | Clock generation is based around one or two "DRCG-lite" (DRCG = Direct Rambus Clock Generator) clockgen ICs by varying manufacturers (Cypress CY2212 or TI CDCR61A). | ||
All of these boards have an DRCG-lite IC which has an 18.432 Mhz XTAL connected to it's inputs. This DRCG-lite is set for a multiplier of 64/3 and thus creates a 393.216 Mhz clock for [[Emotion Engine|EE]] and [[Rambus DRAM|RDRAM]]. | All of these boards have an DRCG-lite IC which has an 18.432 Mhz XTAL connected to it's inputs. This DRCG-lite is set for a multiplier of 64/3 and thus creates a 393.216 Mhz clock for [[Emotion Engine|EE]] and [[Rambus DRAM|RDRAM]]. | ||
Additionally, all boards that have the original [[Graphics_Synthesizer|GS]] with metal heat spreader, CXD2934GB (GH-001, GH-003, GH-005, GH-007, GH-012, GH-014, GH-016), have a second DRCG-lite IC (also with an 18.432 Mhz XTAL) which is set to a multiplier of 16 to generate a 294.912 Mhz clock which is fed into GS. ''This additional DRCG is not found on their same-chassis-counterparts (GH-004, GH-006, GH-008, GH-010, GH-013) that use the second revision GS (CXD2944GB).'' | |||
''This additional DRCG is not found on | |||
= F, G, H chassis = | = F, G, H chassis = | ||
Based around one "DRCG-lite" and one "GMCG" (=Graphics Media Clock Generator | Based around one "DRCG-lite" and one "GMCG" (=Graphics Media Clock Generator) clock generator. The GMCG has a 18.432 Mhz XTAL and generates both, a 54 Mhz or 53.9 Mhz clock for GS (selection between 54 and 53.9 is done via control line from [[SSBUS controller]], later from the SPU2+SSBUS-Controller combo IC) and also creates a 18.432 Mhz input clock for the DRCG-lite. The main clock output of DRCG-lite is set for a multiplier of 64/3 and thus creates a 393.216 Mhz clock for [[Emotion Engine|EE]] and [[Rambus DRAM|RDRAM]]. Additionally, DRCG lite generates a 9.216 Mhz clock signal for GS from the XTAL input via a multiplier of 0.5. | ||
The GMCG has a 18.432 Mhz XTAL and generates a 54 Mhz or 53.9 Mhz clock for GS (selection between 54 and 53.9 is done via control line from [[SSBUS controller]], later from the SPU2+SSBUS-Controller combo IC) and also creates a 18.432 Mhz input clock for the DRCG-lite. | |||
The main clock output of DRCG-lite is set for a multiplier of 64/3 and thus creates a 393.216 Mhz clock for [[Emotion Engine|EE]] and [[Rambus DRAM|RDRAM]]. Additionally, DRCG lite generates a 9.216 Mhz clock signal for GS from the | |||
= I, J, K, L, M chassis = | = I, J, K, L, M chassis = | ||
| Line 24: | Line 15: | ||
= N, P, R chassis = | = N, P, R chassis = | ||
Based around one single clock generator IC with an 18.432 Mhz XTAL, | Based around one single clock generator IC with an 18.432 Mhz XTAL, likely a part compatible with the "GMCG" mentioned above. Part number on IC case is always (?) '''627G04LF'''. Not much else is known, since no public datasheet is available. | ||