Editing Clocks
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= A, A+, AB, B, B', C, C', D, D' chassis = | = A, A+, AB, B, B', C, C', D, D' chassis = | ||
Clock generation is based around one or two "DRCG-lite" (DRCG = Direct Rambus Clock Generator) clockgen ICs by varying manufacturers (Cypress CY2212 or TI CDCR61A). | Clock generation differs between [[Motherboards]]. It is based around one or two "DRCG-lite" (DRCG = Direct Rambus Clock Generator) clockgen ICs by varying manufacturers (Cypress CY2212 or TI CDCR61A). | ||
===DRCG-lite #1=== | ===DRCG-lite #1=== |