Internal
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Internal Pads[edit | edit source]
It is not documented yet what use the pads have (e.g. Service Connectors, SPI, I2C, JTAG, PCIe etc.)
pads 1 (GbLAN)[edit | edit source]
GbLAN MDIO
| Pin | Name | Description |
|---|---|---|
| 1 | Vcc | Internal +5V |
| 2 | Vcc | Internal +5V |
| 3 | Vcc | Internal +5V |
| 4 | Vcc | Internal +5V |
| 5 | ||
| 6 | ||
| 7 | Gnd | Internal ground |
| 8 | ||
| 9 | Gnd | Internal ground |
| 10 | ||
| 11 | Gnd | Internal ground |
| 12 | ||
| 13 | Gnd | Internal ground |
| 14 | Gnd | Internal ground |
pads 2 (Southbridge)[edit | edit source]
Southbridge debug (No activity was detected so far. It looks to be disabled / turned off)
| Pin | Name | Description |
|---|---|---|
| 1 | ||
| 2 | Gnd | Internal ground |
| 3 | ||
| 4 | ||
| 5 | ||
| 6 | ||
| 7 | ||
| 8 | Gnd | Internal ground |
| 9 | ||
| 10 | Gnd | Internal ground |
| 11 | 3.3V when console is started | |
| 12 | ||
| 13 | ||
| 14 | ||
| 15 | ||
| 16 | ||
| 17 | Gnd | Internal ground |
| 18 | ||
| 19 | Gnd | Internal ground |
| 20 | Vcc | +3.3V_STBY power (always on, including the deep standby) |
pads 3 (A01-COL)[edit | edit source]
| Pin | Name | Description |
|---|---|---|
| 1 | ||
| 2 | ||
| 3 | ||
| 4 | ||
| 5 | ||
| 6 | Gnd | Internal ground |
| 7 | I2C | I2C bus (100 kHz clock) |
| 8 | Gnd | Internal ground |
| 9 | ||
| 10 | ||
| 11 | ||
| 12 | ||
| 13 | Gnd | Internal ground |
| 14 | ||
| 15 | ||
| 16 | ||
| 17 | Gnd | Internal ground |
| 18 | ||
| 19 | ||
| 20 | ||
| 21 | ||
| 22 | Gnd | Internal ground |
| 23 | ||
| 24 | ||
| 25 | Gnd | Internal ground |
| 26 | ||
| 27 | ||
| 28 | ||
| 29 | ||
| 30 |
UART[edit | edit source]
Same layout is used for SAA-K23, SAB-K02 / SAA-001, SAB-001 (pads are present on SAC-001 too, but layout slightly differs)
3.3V CMOS TTL - 115200, n, 8.1
UART0 Console[edit | edit source]
| Pin | Name | Description |
|---|---|---|
| GND | Ground | |
| U0C_TX | UART0 Console Transmit | |
| U0C_RX | UART0 Console Receive |
Note: You have to enable debug logs as by default the output is zeroed out by "spaces" on CEX consoles. You can enable UART0 logs by patching Serial Flash Non Volatile Storage. You can also use UART Enabler kernel plugin by SiSTRo.
Southbridge UART[edit | edit source]
| Pin | Name | Description |
|---|---|---|
| GND | Ground | |
| TX | Southbridge UART Transmit | |
| RX | Southbridge UART Receive |
Note: quite similar to PS3 Syscon UART
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